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net/mlx5: Add lag_tx_port_affinity capability bit
author
Maxim Mikityanskiy
<maximmi@mellanox.com>
Thu, 15 Aug 2019 19:46:16 +0000
(19:46 +0000)
committer
Saeed Mahameed
<saeedm@mellanox.com>
Tue, 20 Aug 2019 20:53:58 +0000
(13:53 -0700)
Add the lag_tx_port_affinity HCA capability bit that indicates that
setting port affinity of TISes is supported.
Signed-off-by: Maxim Mikityanskiy <maximmi@mellanox.com>
Reviewed-by: Tariq Toukan <tariqt@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
include/linux/mlx5/mlx5_ifc.h
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diff --git
a/include/linux/mlx5/mlx5_ifc.h
b/include/linux/mlx5/mlx5_ifc.h
index 2837fe4d8901ef73992c8bda6a34df4bc074b256..1e55cf73e88cccb4cf13ca6cc11ed1e92eee3b01 100644
(file)
--- a/
include/linux/mlx5/mlx5_ifc.h
+++ b/
include/linux/mlx5/mlx5_ifc.h
@@
-1249,7
+1249,9
@@
struct mlx5_ifc_cmd_hca_cap_bits {
u8 reserved_at_263[0x8];
u8 log_bf_reg_size[0x5];
- u8 reserved_at_270[0xb];
+ u8 reserved_at_270[0x8];
+ u8 lag_tx_port_affinity[0x1];
+ u8 reserved_at_279[0x2];
u8 lag_master[0x1];
u8 num_lag_ports[0x4];