drm/i915/icl: do not save DDI A/E sharing bit for ICL
authorJani Nikula <jani.nikula@intel.com>
Tue, 6 Mar 2018 10:41:55 +0000 (12:41 +0200)
committerJani Nikula <jani.nikula@intel.com>
Fri, 9 Mar 2018 10:26:19 +0000 (12:26 +0200)
We don't want to preserve the DDI A 4 lane bit on ICL.

Fixes: 3d2011cfa41f ("drm/i915/icl: remove port A/E lane sharing limitation.")
Cc: Mahesh Kumar <mahesh1.kumar@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180306104155.3526-1-jani.nikula@intel.com
drivers/gpu/drm/i915/intel_ddi.c

index ac8fc2a44ac69612a1230209981b7dad6f085c4f..dbcf1a0586f94308192632314f96aa58c8e2c41b 100644 (file)
@@ -3080,9 +3080,12 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
        intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
        intel_encoder->cloneable = 0;
 
-       intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) &
-                                         (DDI_BUF_PORT_REVERSAL |
-                                          DDI_A_4_LANES);
+       if (INTEL_GEN(dev_priv) >= 11)
+               intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) &
+                       DDI_BUF_PORT_REVERSAL;
+       else
+               intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) &
+                       (DDI_BUF_PORT_REVERSAL | DDI_A_4_LANES);
        intel_dig_port->dp.output_reg = INVALID_MMIO_REG;
        intel_dig_port->max_lanes = intel_ddi_max_lanes(intel_dig_port);