drm/virtio: fix byteorder handling in virtio_gpu_cmd_transfer_{from, to}_host_3d...
authorGerd Hoffmann <kraxel@redhat.com>
Wed, 23 Oct 2019 06:25:37 +0000 (08:25 +0200)
committerGerd Hoffmann <kraxel@redhat.com>
Wed, 20 Nov 2019 08:22:26 +0000 (09:22 +0100)
Be consistent with the rest of the code base.
No functional change.

v2:
 - fix sparse warnings for virtio_gpu_cmd_transfer_to_host_2d call.
 - move convert_to_hw_box helper function.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
Link: http://patchwork.freedesktop.org/patch/msgid/20191023062539.11728-2-kraxel@redhat.com
drivers/gpu/drm/virtio/virtgpu_drv.h
drivers/gpu/drm/virtio/virtgpu_ioctl.c
drivers/gpu/drm/virtio/virtgpu_vq.c

index 0b56ba005e253a9101dd2c9bf0d16968b861a3ad..eedae2a7b532da7296690a2b08d92c6c9d66927e 100644 (file)
@@ -38,6 +38,7 @@
 #include <drm/drm_gem_shmem_helper.h>
 #include <drm/drm_ioctl.h>
 #include <drm/drm_probe_helper.h>
+#include <drm/virtgpu_drm.h>
 
 #define DRIVER_NAME "virtio_gpu"
 #define DRIVER_DESC "virtio GPU"
@@ -312,13 +313,13 @@ void virtio_gpu_cmd_submit(struct virtio_gpu_device *vgdev,
 void virtio_gpu_cmd_transfer_from_host_3d(struct virtio_gpu_device *vgdev,
                                          uint32_t ctx_id,
                                          uint64_t offset, uint32_t level,
-                                         struct virtio_gpu_box *box,
+                                         struct drm_virtgpu_3d_box *box,
                                          struct virtio_gpu_object_array *objs,
                                          struct virtio_gpu_fence *fence);
 void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev,
                                        uint32_t ctx_id,
                                        uint64_t offset, uint32_t level,
-                                       struct virtio_gpu_box *box,
+                                       struct drm_virtgpu_3d_box *box,
                                        struct virtio_gpu_object_array *objs,
                                        struct virtio_gpu_fence *fence);
 void
index 9af1ec62434f2fce430308b30c68e094108cba98..205ec4abae2b9f73ac67e5a3cdc1bc22b13761ac 100644 (file)
 
 #include "virtgpu_drv.h"
 
-static void convert_to_hw_box(struct virtio_gpu_box *dst,
-                             const struct drm_virtgpu_3d_box *src)
-{
-       dst->x = cpu_to_le32(src->x);
-       dst->y = cpu_to_le32(src->y);
-       dst->z = cpu_to_le32(src->z);
-       dst->w = cpu_to_le32(src->w);
-       dst->h = cpu_to_le32(src->h);
-       dst->d = cpu_to_le32(src->d);
-}
-
 static int virtio_gpu_map_ioctl(struct drm_device *dev, void *data,
                                struct drm_file *file_priv)
 {
@@ -304,7 +293,6 @@ static int virtio_gpu_transfer_from_host_ioctl(struct drm_device *dev,
        struct virtio_gpu_fence *fence;
        int ret;
        u32 offset = args->offset;
-       struct virtio_gpu_box box;
 
        if (vgdev->has_virgl_3d == false)
                return -ENOSYS;
@@ -317,8 +305,6 @@ static int virtio_gpu_transfer_from_host_ioctl(struct drm_device *dev,
        if (ret != 0)
                goto err_put_free;
 
-       convert_to_hw_box(&box, &args->box);
-
        fence = virtio_gpu_fence_alloc(vgdev);
        if (!fence) {
                ret = -ENOMEM;
@@ -326,7 +312,7 @@ static int virtio_gpu_transfer_from_host_ioctl(struct drm_device *dev,
        }
        virtio_gpu_cmd_transfer_from_host_3d
                (vgdev, vfpriv->ctx_id, offset, args->level,
-                &box, objs, fence);
+                &args->box, objs, fence);
        dma_fence_put(&fence->f);
        return 0;
 
@@ -345,7 +331,6 @@ static int virtio_gpu_transfer_to_host_ioctl(struct drm_device *dev, void *data,
        struct drm_virtgpu_3d_transfer_to_host *args = data;
        struct virtio_gpu_object_array *objs;
        struct virtio_gpu_fence *fence;
-       struct virtio_gpu_box box;
        int ret;
        u32 offset = args->offset;
 
@@ -353,11 +338,10 @@ static int virtio_gpu_transfer_to_host_ioctl(struct drm_device *dev, void *data,
        if (objs == NULL)
                return -ENOENT;
 
-       convert_to_hw_box(&box, &args->box);
        if (!vgdev->has_virgl_3d) {
                virtio_gpu_cmd_transfer_to_host_2d
                        (vgdev, offset,
-                        box.w, box.h, box.x, box.y,
+                        args->box.w, args->box.h, args->box.x, args->box.y,
                         objs, NULL);
        } else {
                ret = virtio_gpu_array_lock_resv(objs);
@@ -372,7 +356,7 @@ static int virtio_gpu_transfer_to_host_ioctl(struct drm_device *dev, void *data,
                virtio_gpu_cmd_transfer_to_host_3d
                        (vgdev,
                         vfpriv ? vfpriv->ctx_id : 0, offset,
-                        args->level, &box, objs, fence);
+                        args->level, &args->box, objs, fence);
                dma_fence_put(&fence->f);
        }
        return 0;
index 74ad3bc3ebe8309a9d601f68e26fbd57663a638e..9274c4063c701565734b914470da2f68c04738a1 100644 (file)
                               + MAX_INLINE_CMD_SIZE             \
                               + MAX_INLINE_RESP_SIZE)
 
+static void convert_to_hw_box(struct virtio_gpu_box *dst,
+                             const struct drm_virtgpu_3d_box *src)
+{
+       dst->x = cpu_to_le32(src->x);
+       dst->y = cpu_to_le32(src->y);
+       dst->z = cpu_to_le32(src->z);
+       dst->w = cpu_to_le32(src->w);
+       dst->h = cpu_to_le32(src->h);
+       dst->d = cpu_to_le32(src->d);
+}
+
 void virtio_gpu_ctrl_ack(struct virtqueue *vq)
 {
        struct drm_device *dev = vq->vdev->priv;
@@ -965,7 +976,7 @@ virtio_gpu_cmd_resource_create_3d(struct virtio_gpu_device *vgdev,
 void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev,
                                        uint32_t ctx_id,
                                        uint64_t offset, uint32_t level,
-                                       struct virtio_gpu_box *box,
+                                       struct drm_virtgpu_3d_box *box,
                                        struct virtio_gpu_object_array *objs,
                                        struct virtio_gpu_fence *fence)
 {
@@ -987,7 +998,7 @@ void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev,
        cmd_p->hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_TRANSFER_TO_HOST_3D);
        cmd_p->hdr.ctx_id = cpu_to_le32(ctx_id);
        cmd_p->resource_id = cpu_to_le32(bo->hw_res_handle);
-       cmd_p->box = *box;
+       convert_to_hw_box(&cmd_p->box, box);
        cmd_p->offset = cpu_to_le64(offset);
        cmd_p->level = cpu_to_le32(level);
 
@@ -997,7 +1008,7 @@ void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev,
 void virtio_gpu_cmd_transfer_from_host_3d(struct virtio_gpu_device *vgdev,
                                          uint32_t ctx_id,
                                          uint64_t offset, uint32_t level,
-                                         struct virtio_gpu_box *box,
+                                         struct drm_virtgpu_3d_box *box,
                                          struct virtio_gpu_object_array *objs,
                                          struct virtio_gpu_fence *fence)
 {
@@ -1013,7 +1024,7 @@ void virtio_gpu_cmd_transfer_from_host_3d(struct virtio_gpu_device *vgdev,
        cmd_p->hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_TRANSFER_FROM_HOST_3D);
        cmd_p->hdr.ctx_id = cpu_to_le32(ctx_id);
        cmd_p->resource_id = cpu_to_le32(bo->hw_res_handle);
-       cmd_p->box = *box;
+       convert_to_hw_box(&cmd_p->box, box);
        cmd_p->offset = cpu_to_le64(offset);
        cmd_p->level = cpu_to_le32(level);