drm/amdgpu:hdp flush should be put it initialized
authorMonk Liu <Monk.Liu@amd.com>
Fri, 15 Sep 2017 07:03:24 +0000 (15:03 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 26 Sep 2017 19:14:10 +0000 (15:14 -0400)
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

index 7ca9cbec3004f646e66cc2f6d957c96731bc57c6..99147f576e765b18c74b2faa657b566c88c6aa89 100644 (file)
@@ -696,12 +696,6 @@ static int gmc_v9_0_gart_enable(struct amdgpu_device *adev)
        if (r)
                return r;
 
-       /* After HDP is initialized, flush HDP.*/
-       if (adev->flags & AMD_IS_APU)
-               nbio_v7_0_hdp_flush(adev);
-       else
-               nbio_v6_1_hdp_flush(adev);
-
        switch (adev->asic_type) {
        case CHIP_RAVEN:
                mmhub_v1_0_initialize_power_gating(adev);
@@ -724,6 +718,12 @@ static int gmc_v9_0_gart_enable(struct amdgpu_device *adev)
        tmp = RREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL);
        WREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL, tmp);
 
+       /* After HDP is initialized, flush HDP.*/
+       if (adev->flags & AMD_IS_APU)
+               nbio_v7_0_hdp_flush(adev);
+       else
+               nbio_v6_1_hdp_flush(adev);
+
        if (amdgpu_vm_fault_stop == AMDGPU_VM_FAULT_STOP_ALWAYS)
                value = false;
        else