return 0;
}
-/* enable a property of a node if the node is found */
-static inline void ft_enable_path(void *blob, const char *path)
-{
- int i = fdt_path_offset(blob, path);
- if (i >= 0) {
- debug("enabling %s\n", path);
- fdt_status_okay(blob, i);
- }
-}
-
-/* remove a property of a node if the node is found */
-static inline void ft_delprop_path(void *blob, const char *path,
- const char *name)
-{
- int i = fdt_path_offset(blob, path);
- if (i) {
- debug("removing %s/%s\n", path, name);
- fdt_delprop(blob, i, name);
- }
-}
-
#if defined(CONFIG_CMD_PCI)
#define PCI_ID(x) ( \
(PCI_BUS(x->devfn)<<16)| \
(PCI_DEV(x->devfn)<<11)| \
(PCI_FUNC(x->devfn)<<8) \
)
-#define PCIE_PATH "/soc/pcie@0x01000000"
int fdt_add_pci_node(void *blob, int par, struct pci_dev *dev)
{
uint32_t reg[5];
int k, np;
/* build list of parents */
- np = fdt_path_offset(blob, PCIE_PATH);
+ np = fdt_node_offset_by_compatible(blob, -1, "fsl,imx6q-pcie");
if (np < 0)
return np;
int i;
/* build irq-map based on host controllers map */
- host = fdt_path_offset(blob, PCIE_PATH);
+ host = fdt_node_offset_by_compatible(blob, -1, "fsl,imx6q-pcie");
if (host < 0) {
printf(" %s failed: missing host\n", __func__);
return host;
}
#endif /* if defined(CONFIG_CMD_PCI) */
-void ft_board_wdog_fixup(void *blob, const char *path)
+void ft_board_wdog_fixup(void *blob, phys_addr_t addr)
{
- ft_delprop_path(blob, path, "ext-reset-output");
- ft_delprop_path(blob, path, "fsl,ext-reset-output");
+ int off = fdt_node_offset_by_compat_reg(blob, "fsl,imx6q-wdt", addr);
+
+ if (off) {
+ fdt_delprop(blob, off, "ext-reset-output");
+ fdt_delprop(blob, off, "fsl,ext-reset-output");
+ }
}
/*
* - board (full model from EEPROM)
* - peripherals removed from DTB if not loaded on board (per EEPROM config)
*/
-#define UART1_PATH "/soc/aips-bus@02100000/serial@021ec000"
-#define WDOG1_PATH "/soc/aips-bus@02000000/wdog@020bc000"
-#define WDOG2_PATH "/soc/aips-bus@02000000/wdog@020c0000"
-#define GPIO3_PATH "/soc/aips-bus@02000000/gpio@020a4000"
+#define WDOG1_ADDR 0x20bc000
+#define WDOG2_ADDR 0x20c0000
+#define GPIO3_ADDR 0x20a4000
+#define USDHC3_ADDR 0x2198000
+#define PWM0_ADDR 0x2080000
int ft_board_setup(void *blob, bd_t *bd)
{
struct ventana_board_info *info = &ventana_info;
* errata causing wdog timer to be unreliable.
*/
if (rev >= 'A' && rev < 'C') {
- i = fdt_path_offset(blob, WDOG1_PATH);
+ i = fdt_node_offset_by_compat_reg(blob, "fsl,imx6q-wdt",
+ WDOG1_ADDR);
if (i)
fdt_status_disabled(blob, i);
}
/* GW51xx-E adds WDOG1_B external reset */
if (rev < 'E')
- ft_board_wdog_fixup(blob, WDOG1_PATH);
+ ft_board_wdog_fixup(blob, WDOG1_ADDR);
break;
case GW52xx:
"reset-gpio", NULL);
if (range) {
- i = fdt_path_offset(blob, GPIO3_PATH);
+ i = fdt_node_offset_by_compat_reg(blob,
+ "fsl,imx6q-gpio", GPIO3_ADDR);
if (i)
handle = fdt_get_phandle(blob, i);
if (handle) {
gpio_cfg[board_type].usd_vsel = 0;
/* GW522x-B adds WDOG1_B external reset */
- ft_board_wdog_fixup(blob, WDOG1_PATH);
+ if (rev < 'B')
+ ft_board_wdog_fixup(blob, WDOG1_ADDR);
}
/* GW520x-E adds WDOG1_B external reset */
else if (info->model[4] == '0' && rev < 'E')
- ft_board_wdog_fixup(blob, WDOG1_PATH);
+ ft_board_wdog_fixup(blob, WDOG1_ADDR);
break;
case GW53xx:
/* GW53xx-E adds WDOG1_B external reset */
if (rev < 'E')
- ft_board_wdog_fixup(blob, WDOG1_PATH);
+ ft_board_wdog_fixup(blob, WDOG1_ADDR);
break;
case GW54xx:
* disable serial2 node for GW54xx for compatibility with older
* 3.10.x kernel that improperly had this node enabled in the DT
*/
- i = fdt_path_offset(blob, UART1_PATH);
- if (i)
- fdt_del_node(blob, i);
+ fdt_set_status_by_alias(blob, "serial2", FDT_STATUS_DISABLED,
+ 0);
/* GW54xx-E adds WDOG2_B external reset */
if (rev < 'E')
- ft_board_wdog_fixup(blob, WDOG2_PATH);
+ ft_board_wdog_fixup(blob, WDOG2_ADDR);
break;
case GW551x:
/* GW551x-C adds WDOG1_B external reset */
if (rev < 'C')
- ft_board_wdog_fixup(blob, WDOG1_PATH);
+ ft_board_wdog_fixup(blob, WDOG1_ADDR);
break;
case GW5901:
case GW5902:
/* GW5901/GW5901 revB adds WDOG1_B as an external reset */
if (rev < 'B')
- ft_board_wdog_fixup(blob, WDOG1_PATH);
+ ft_board_wdog_fixup(blob, WDOG1_ADDR);
break;
}
continue;
if (hwconfig_subarg_cmp(arg, "mode", "pwm") && cfg->pwm_param)
{
- char path[48];
- sprintf(path, "/soc/aips-bus@02000000/pwm@%08x",
- 0x02080000 + (0x4000 * (cfg->pwm_param - 1)));
+ phys_addr_t addr;
+ int off;
+
printf(" Enabling pwm%d for DIO%d\n",
cfg->pwm_param, i);
- ft_enable_path(blob, path);
+ addr = PWM0_ADDR + (0x4000 * (cfg->pwm_param - 1));
+ off = fdt_node_offset_by_compat_reg(blob,
+ "fsl,imx6q-pwm",
+ addr);
+ if (off)
+ fdt_status_okay(blob, off);
}
}
/* remove no-1-8-v if UHS-I support is present */
if (gpio_cfg[board_type].usd_vsel) {
debug("Enabling UHS-I support\n");
- ft_delprop_path(blob, "/soc/aips-bus@02100000/usdhc@02198000",
- "no-1-8-v");
+ i = fdt_node_offset_by_compat_reg(blob, "fsl,imx6q-usdhc",
+ USDHC3_ADDR);
+ if (i)
+ fdt_delprop(blob, i, "no-1-8-v");
}
#if defined(CONFIG_CMD_PCI)