As for RETINSTR, LOADREGS is a left-over from the 26-bit days.
Remove it.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
subne r1, r1, #1
ldrneb r7, [r6, r1]
bne Lrow4bpplp
- LOADREGS(fd, sp!, {r4 - r7, pc})
+ ldmfd sp!, {r4 - r7, pc}
@
@ Smashable regs: {r0 - r3}, [r4], {r5 - r7}, (r8 - fp), [ip], (sp), {lr}, (pc)
subne r1, r1, #1
ldrneb r7, [r6, r1]
bne Lrow8bpplp
- LOADREGS(fd, sp!, {r4 - r7, pc})
+ ldmfd sp!, {r4 - r7, pc}
@
@ Smashable regs: {r0 - r3}, [r4], {r5, r6}, [r7], (r8 - fp), [ip], (sp), [lr], (pc)
strb r7, [r0], r5
mov r7, r7, lsr #8
strb r7, [r0], r5
- LOADREGS(fd, sp!, {r4 - r7, pc})
+ ldmfd sp!, {r4 - r7, pc}
.bss
ENTRY(con_charconvtable)
movne r0, #0
movs frame, r0
1: moveq r0, #-2
- LOADREGS(eqfd, sp!, {r4 - r8, pc})
+ ldmeqfd sp!, {r4 - r8, pc}
2: stmfd sp!, {pc} @ calculate offset of PC in STMIA instruction
ldr r0, [sp], #4
* A zero next framepointer means we're done.
*/
teq next, #0
- LOADREGS(eqfd, sp!, {r4 - r8, pc})
+ ldmeqfd sp!, {r4 - r8, pc}
/*
* The next framepointer must be above the
1007: ldr r0, =.Lbad
mov r1, frame
bl printk
- LOADREGS(fd, sp!, {r4 - r8, pc})
+ ldmfd sp!, {r4 - r8, pc}
.ltorg
.previous
adrne r0, .Lcr
blne printk
mov r0, stack
- LOADREGS(fd, sp!, {instr, reg, stack, r7, r8, pc})
+ ldmfd sp!, {instr, reg, stack, r7, r8, pc}
.Lfp: .asciz " r%d = %08X%c"
.Lcr: .asciz "\n"
tst r1, #1 @ x1 x0 x1 x0 x1 x0 x1
USER( strnebt r2, [r0], #1)
mov r0, #0
- LOADREGS(fd,sp!, {r1, pc})
+ ldmfd sp!, {r1, pc}
.section .fixup,"ax"
.align 0
-9001: LOADREGS(fd,sp!, {r0, pc})
+9001: ldmfd sp!, {r0, pc}
.previous
bgt 1b @ 1
PLD( ldmeqia r1!, {r3, r4, ip, lr} )
PLD( beq 2b )
- LOADREGS(fd, sp!, {r4, pc}) @ 3
+ ldmfd sp!, {r4, pc} @ 3
adcs r0, r0, r3
adcs r0, r0, r2
adcs r0, r0, #0
- LOADREGS(fd, sp!, {pc})
+ ldmfd sp!, {pc}
CPSR2SPSR(r0)
mov lr, pc
mov pc, r2
- LOADREGS(fd, sp!, {r4 - r12, pc})
+ ldmfd sp!, {r4 - r12, pc}
@ Purpose: call an expansion card loader to reset the card
@ Proto : void read_loader(int card_base, char *loader);
CPSR2SPSR(r0)
mov lr, pc
add pc, r1, #8
- LOADREGS(fd, sp!, {r4 - r12, pc})
+ ldmfd sp!, {r4 - r12, pc}
bpl .Linsb_16_lp
tst r2, #15
- LOADREGS(eqfd, sp!, {r4 - r6, pc})
+ ldmeqfd sp!, {r4 - r6, pc}
.Linsb_no_16: tst r2, #8
beq .Linsb_no_8
str r3, [r1], #4
.Linsb_no_4: ands r2, r2, #3
- LOADREGS(eqfd, sp!, {r4 - r6, pc})
+ ldmeqfd sp!, {r4 - r6, pc}
cmp r2, #2
ldrb r3, [r0]
ldrgtb r3, [r0]
strgtb r3, [r1]
- LOADREGS(fd, sp!, {r4 - r6, pc})
+ ldmfd sp!, {r4 - r6, pc}
bpl .Linsw_8_lp
tst r2, #7
- LOADREGS(eqfd, sp!, {r4, r5, r6, pc})
+ ldmeqfd sp!, {r4, r5, r6, pc}
.Lno_insw_8: tst r2, #4
beq .Lno_insw_4
movne r3, r3, lsr #8
strneb r3, [r1]
- LOADREGS(fd, sp!, {r4, r5, r6, pc})
+ ldmfd sp!, {r4, r5, r6, pc}
bpl .Loutsb_16_lp
tst r2, #15
- LOADREGS(eqfd, sp!, {r4, r5, pc})
+ ldmeqfd sp!, {r4, r5, pc}
.Loutsb_no_16: tst r2, #8
beq .Loutsb_no_8
outword r3
.Loutsb_no_4: ands r2, r2, #3
- LOADREGS(eqfd, sp!, {r4, r5, pc})
+ ldmeqfd sp!, {r4, r5, pc}
cmp r2, #2
ldrb r3, [r1], #1
ldrgtb r3, [r1]
strgtb r3, [r0]
- LOADREGS(fd, sp!, {r4, r5, pc})
+ ldmfd sp!, {r4, r5, pc}
bpl .Loutsw_8_lp
tst r2, #7
- LOADREGS(eqfd, sp!, {r4, r5, r6, pc})
+ ldmeqfd sp!, {r4, r5, r6, pc}
.Lno_outsw_8: tst r2, #4
beq .Lno_outsw_4
orrne ip, ip, ip, lsr #16
strne ip, [r0]
- LOADREGS(fd, sp!, {r4, r5, r6, pc})
+ ldmfd sp!, {r4, r5, r6, pc}
stmgeia r0!, {r1, r3, ip, lr}
stmgeia r0!, {r1, r3, ip, lr}
bgt 2b
- LOADREGS(eqfd, sp!, {pc}) @ Now <64 bytes to go.
+ ldmeqfd sp!, {pc} @ Now <64 bytes to go.
/*
* No need to correct the count; we're only testing bits from now on
*/
stmgeia r0!, {r2, r3, ip, lr} @ 4
stmgeia r0!, {r2, r3, ip, lr} @ 4
bgt 3b @ 1
- LOADREGS(eqfd, sp!, {pc}) @ 1/2 quick exit
+ ldmeqfd sp!, {pc} @ 1/2 quick exit
/*
* No need to correct the count; we're only testing bits from now on
*/
movs ip, r2
bne .Lc2u_nowords
.Lc2u_finished: mov r0, #0
- LOADREGS(fd,sp!,{r2, r4 - r7, pc})
+ ldmfd sp!, {r2, r4 - r7, pc}
.Lc2u_src_not_aligned:
bic r1, r1, #3
.section .fixup,"ax"
.align 0
-9001: LOADREGS(fd,sp!, {r0, r4 - r7, pc})
+9001: ldmfd sp!, {r0, r4 - r7, pc}
.previous
/* Prototype: unsigned long __arch_copy_from_user(void *to,const void *from,unsigned long n);
bne .Lcfu_nowords
.Lcfu_finished: mov r0, #0
add sp, sp, #8
- LOADREGS(fd,sp!,{r4 - r7, pc})
+ ldmfd sp!, {r4 - r7, pc}
.Lcfu_src_not_aligned:
bic r1, r1, #3
movne r1, r4
blne __memzero
mov r0, r4
- LOADREGS(fd,sp!, {r4 - r7, pc})
+ ldmfd sp!, {r4 - r7, pc}
.previous
stmia r0!, {r3, r4, ip, lr} @ 4
ldmneia r1!, {r3, r4, ip, lr} @ 4
bne 1b @ 1
- LOADREGS(fd, sp!, {r4, pc}) @ 3
+ ldmfd sp!, {r4, pc} @ 3
.align 5
/*
#define DEFAULT_FIQ MODE_FIQ
-/*
- * LOADREGS - ldm with PC in register list (eg, ldmfd sp!, {pc})
- */
-#ifdef __STDC__
-#define LOADREGS(cond, base, reglist...)\
- ldm##cond base,reglist
-#else
-#define LOADREGS(cond, base, reglist...)\
- ldm/**/cond base,reglist
-#endif
-
/*
* Enable and disable interrupts
*/