armv8/fsl-lsch3: Fix platform clock calculation
authorYork Sun <yorksun@freescale.com>
Sat, 21 Mar 2015 02:28:07 +0000 (19:28 -0700)
committerYork Sun <yorksun@freescale.com>
Thu, 23 Apr 2015 15:55:55 +0000 (08:55 -0700)
Platform clock is half of platform PLL. There is an additional divisor
in place. Clean up code copied from powerpc.

Signed-off-by: York Sun <yorksun@freescale.com>
arch/arm/cpu/armv8/fsl-lsch3/speed.c

index 72cd999c5fd0e2e35594eef7a5f33e3d4729e311..2b140cd76f4be1e5dba2beb5f27168ea4c7ca98c 100644 (file)
@@ -86,6 +86,8 @@ void get_sys_info(struct sys_info *sys_info)
        sys_info->freq_systembus *= (in_le32(&gur->rcwsr[0]) >>
                        FSL_CHASSIS3_RCWSR0_SYS_PLL_RAT_SHIFT) &
                        FSL_CHASSIS3_RCWSR0_SYS_PLL_RAT_MASK;
+       /* Platform clock is half of platform PLL */
+       sys_info->freq_systembus /= 2;
        sys_info->freq_ddrbus *= (in_le32(&gur->rcwsr[0]) >>
                        FSL_CHASSIS3_RCWSR0_MEM_PLL_RAT_SHIFT) &
                        FSL_CHASSIS3_RCWSR0_MEM_PLL_RAT_MASK;
@@ -102,10 +104,7 @@ void get_sys_info(struct sys_info *sys_info)
                         offsetof(struct ccsr_clk_cluster_group,
                                  pllngsr[i%3].gsr));
                ratio[i] = (in_le32(offset) >> 1) & 0x3f;
-               if (ratio[i] > 4)
-                       freq_c_pll[i] = sysclk * ratio[i];
-               else
-                       freq_c_pll[i] = sys_info->freq_systembus * ratio[i];
+               freq_c_pll[i] = sysclk * ratio[i];
        }
 
        for_each_cpu(i, cpu, cpu_numcores(), cpu_mask()) {