Add missing port X data register, and fix the offset of ports Y and Z.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
#define PUDR 0xA4050162
#define PVDR 0xA4050164
#define PWDR 0xA4050166
-#define PYDR 0xA4050168
-#define PZDR 0xA405016A
+#define PXDR 0xA4050168
+#define PYDR 0xA405016A
+#define PZDR 0xA405016C
/* UBC */
#define CBR0 0xFF200000
#define PUDR 0xA4050162
#define PVDR 0xA4050164
#define PWDR 0xA4050166
-#define PYDR 0xA4050168
-#define PZDR 0xA405016A
+#define PXDR 0xA4050168
+#define PYDR 0xA405016A
+#define PZDR 0xA405016C
/* UBC */
/* H-UDI */
#define PUDR 0xA4050162
#define PVDR 0xA4050164
#define PWDR 0xA4050166
-#define PYDR 0xA4050168
-#define PZDR 0xA405016A
+#define PXDR 0xA4050168
+#define PYDR 0xA405016A
+#define PZDR 0xA405016C
/* Ether */
#define EDMR 0xA4600000