drm/nouveau/bios/timing: pointers are 32-bit

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

diff --git a/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/timing.h b/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/timing.h
index 339a826aa176274d16224f288712a14d8e9e3ac3..38188d4c9ab57baf224a3334baf141744eba4f70 100644 (file)
--- a/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/timing.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/timing.h
@@ -2,10 +2,10 @@
 #define __NVBIOS_TIMING_H__
 #include <subdev/bios/ramcfg.h>
 
-u16 nvbios_timingTe(struct nvkm_bios *,
+u32 nvbios_timingTe(struct nvkm_bios *,
                    u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *snr, u8 *ssz);
-u16 nvbios_timingEe(struct nvkm_bios *, int idx,
+u32 nvbios_timingEe(struct nvkm_bios *, int idx,
                    u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
-u16 nvbios_timingEp(struct nvkm_bios *, int idx,
+u32 nvbios_timingEp(struct nvkm_bios *, int idx,
                    u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_ramcfg *);
 #endif

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/timing.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/timing.c
index 99f6432ac0af5bf971958e0a9e51ae6b1bdc128b..7e83c3985020e1edef5eed296bc66abbb3256922 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/timing.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/timing.c
@@ -25,19 +25,19 @@
 #include <subdev/bios/bit.h>
 #include <subdev/bios/timing.h>
 
-u16
+u32
 nvbios_timingTe(struct nvkm_bios *bios,
                u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *snr, u8 *ssz)
 {
        struct bit_entry bit_P;
-       u16 timing = 0x0000;
+       u32 timing = 0;
 
        if (!bit_entry(bios, 'P', &bit_P)) {
                if (bit_P.version == 1)
-                       timing = nvbios_rd16(bios, bit_P.offset + 4);
+                       timing = nvbios_rd32(bios, bit_P.offset + 4);
                else
                if (bit_P.version == 2)
-                       timing = nvbios_rd16(bios, bit_P.offset + 8);
+                       timing = nvbios_rd32(bios, bit_P.offset + 8);
 
                if (timing) {
                        *ver = nvbios_rd08(bios, timing + 0);
@@ -62,15 +62,15 @@ nvbios_timingTe(struct nvkm_bios *bios,
                }
        }
 
-       return 0x0000;
+       return 0;
 }
 
-u16
+u32
 nvbios_timingEe(struct nvkm_bios *bios, int idx,
                u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
 {
        u8  snr, ssz;
-       u16 timing = nvbios_timingTe(bios, ver, hdr, cnt, len, &snr, &ssz);
+       u32 timing = nvbios_timingTe(bios, ver, hdr, cnt, len, &snr, &ssz);
        if (timing && idx < *cnt) {
                timing += *hdr + idx * (*len + (snr * ssz));
                *hdr = *len;
@@ -78,14 +78,14 @@ nvbios_timingEe(struct nvkm_bios *bios, int idx,
                *len = ssz;
                return timing;
        }
-       return 0x0000;
+       return 0;
 }
 
-u16
+u32
 nvbios_timingEp(struct nvkm_bios *bios, int idx,
                u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_ramcfg *p)
 {
-       u16 data = nvbios_timingEe(bios, idx, ver, hdr, cnt, len), temp;
+       u32 data = nvbios_timingEe(bios, idx, ver, hdr, cnt, len), temp;
        p->timing_ver = *ver;
        p->timing_hdr = *hdr;
        switch (!!data * *ver) {