drm/amdgpu: enable SI DPM
authorMaruthi Srinivas Bayyavarapu <Maruthi.Bayyavarapu@amd.com>
Tue, 26 Apr 2016 15:05:36 +0000 (20:35 +0530)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 31 Aug 2016 19:21:10 +0000 (15:21 -0400)
Signed-off-by: Maruthi Bayyavarapu <maruthi.bayyavarapu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/Makefile
drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c
drivers/gpu/drm/amd/amdgpu/si.c

index 5ebea9dcc6bf1e28d02c6aac65f85d4b35b1dc73..dc6df075bafc4d65e4d92058c0e8bc7bc3df0610 100644 (file)
@@ -30,7 +30,7 @@ amdgpu-$(CONFIG_DRM_AMDGPU_CIK)+= cik.o cik_ih.o kv_smc.o kv_dpm.o \
        ci_smc.o ci_dpm.o dce_v8_0.o gfx_v7_0.o cik_sdma.o uvd_v4_2.o vce_v2_0.o \
        amdgpu_amdkfd_gfx_v7.o
 
-amdgpu-$(CONFIG_DRM_AMDGPU_SI)+= si.o gmc_v6_0.o gfx_v6_0.o si_ih.o si_dma.o dce_v6_0.o
+amdgpu-$(CONFIG_DRM_AMDGPU_SI)+= si.o gmc_v6_0.o gfx_v6_0.o si_ih.o si_dma.o dce_v6_0.o si_dpm.o si_smc.o
 
 amdgpu-y += \
        vi.o
index ecc4141cd7163251cbac7fa1b2b9cee966980118..1e7f160f23d8cfa42217f7033e2ccd5a6f44e9e6 100644 (file)
@@ -30,6 +30,7 @@
 #include "amdgpu_pm.h"
 #include <drm/amdgpu_drm.h>
 #include "amdgpu_powerplay.h"
+#include "si_dpm.h"
 #include "cik_dpm.h"
 #include "vi_dpm.h"
 
@@ -59,6 +60,15 @@ static int amdgpu_powerplay_init(struct amdgpu_device *adev)
                amd_pp->pp_handle = (void *)adev;
 
                switch (adev->asic_type) {
+#ifdef CONFIG_DRM_AMDGPU_SI
+               case CHIP_TAHITI:
+               case CHIP_PITCAIRN:
+               case CHIP_VERDE:
+               case CHIP_OLAND:
+               case CHIP_HAINAN:
+                       amd_pp->ip_funcs = &si_dpm_ip_funcs;
+               break;
+#endif
 #ifdef CONFIG_DRM_AMDGPU_CIK
                case CHIP_BONAIRE:
                case CHIP_HAWAII:
index c905470d7e81b5d093ae01db97bf82ab1b17d22d..fee76b8a536f735f6c19d5a1c6d9b15b6de90251 100644 (file)
@@ -1117,6 +1117,7 @@ static u32 si_get_xclk(struct amdgpu_device *adev)
 
        return reference_clock;
 }
+
 //xxx:not implemented
 static int si_set_uvd_clocks(struct amdgpu_device *adev, u32 vclk, u32 dclk)
 {
@@ -1850,14 +1851,13 @@ static const struct amdgpu_ip_block_version verde_ip_blocks[] =
                .rev = 0,
                .funcs = &si_ih_ip_funcs,
        },
-/*     {
+       {
                .type = AMD_IP_BLOCK_TYPE_SMC,
                .major = 6,
                .minor = 0,
                .rev = 0,
-               .funcs = &si_null_ip_funcs,
+               .funcs = &amdgpu_pp_ip_funcs,
        },
-       */
        {
                .type = AMD_IP_BLOCK_TYPE_DCE,
                .major = 6,
@@ -1925,7 +1925,7 @@ static const struct amdgpu_ip_block_version hainan_ip_blocks[] =
                .major = 6,
                .minor = 0,
                .rev = 0,
-               .funcs = &si_null_ip_funcs,
+               .funcs = &amdgpu_pp_ip_funcs,
        },
        {
                .type = AMD_IP_BLOCK_TYPE_GFX,