i2c: zynq: Add support for the second i2c controller

Initialize the second i2c controller.

Signed-off-by: Michael Burr <michael.burr@logicpd.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/drivers/i2c/zynq_i2c.c b/drivers/i2c/zynq_i2c.c
index 11ef0f8d4f9837801fbb16245de25bcf12657533..f1f65131a2a93166afffcb053e4d607029180a08 100644 (file)
--- a/drivers/i2c/zynq_i2c.c
+++ b/drivers/i2c/zynq_i2c.c
@@ -64,19 +64,21 @@ struct zynq_i2c_registers {
 #define ZYNQ_I2C_FIFO_DEPTH            16
 #define ZYNQ_I2C_TRANSFERT_SIZE_MAX    255 /* Controller transfer limit */
 
-#if defined(CONFIG_ZYNQ_I2C0)
-# define ZYNQ_I2C_BASE ZYNQ_I2C_BASEADDR0
-#else
-# define ZYNQ_I2C_BASE ZYNQ_I2C_BASEADDR1
-#endif
-
-static struct zynq_i2c_registers *zynq_i2c =
-       (struct zynq_i2c_registers *)ZYNQ_I2C_BASE;
+static struct zynq_i2c_registers *i2c_select(struct i2c_adapter *adap)
+{
+       return adap->hwadapnr ?
+               /* Zynq PS I2C1 */
+               (struct zynq_i2c_registers *)ZYNQ_I2C_BASEADDR1 :
+               /* Zynq PS I2C0 */
+               (struct zynq_i2c_registers *)ZYNQ_I2C_BASEADDR0;
+}
 
 /* I2C init called by cmd_i2c when doing 'i2c reset'. */
 static void zynq_i2c_init(struct i2c_adapter *adap, int requested_speed,
                          int slaveadd)
 {
+       struct zynq_i2c_registers *zynq_i2c = i2c_select(adap);
+
        /* 111MHz / ( (3 * 17) * 22 ) = ~100KHz */
        writel((16 << ZYNQ_I2C_CONTROL_DIV_B_SHIFT) |
                (2 << ZYNQ_I2C_CONTROL_DIV_A_SHIFT), &zynq_i2c->control);
@@ -87,7 +89,7 @@ static void zynq_i2c_init(struct i2c_adapter *adap, int requested_speed,
 }
 
 #ifdef DEBUG
-static void zynq_i2c_debug_status(void)
+static void zynq_i2c_debug_status(struct zynq_i2c_registers *zynq_i2c)
 {
        int int_status;
        int status;
@@ -129,7 +131,7 @@ static void zynq_i2c_debug_status(void)
 #endif
 
 /* Wait for an interrupt */
-static u32 zynq_i2c_wait(u32 mask)
+static u32 zynq_i2c_wait(struct zynq_i2c_registers *zynq_i2c, u32 mask)
 {
        int timeout, int_status;
 
@@ -140,7 +142,7 @@ static u32 zynq_i2c_wait(u32 mask)
                        break;
        }
 #ifdef DEBUG
-       zynq_i2c_debug_status();
+       zynq_i2c_debug_status(zynq_i2c));
 #endif
        /* Clear interrupt status flags */
        writel(int_status & mask, &zynq_i2c->interrupt_status);
@@ -154,6 +156,8 @@ static u32 zynq_i2c_wait(u32 mask)
  */
 static int zynq_i2c_probe(struct i2c_adapter *adap, u8 dev)
 {
+       struct zynq_i2c_registers *zynq_i2c = i2c_select(adap);
+
        /* Attempt to read a byte */
        setbits_le32(&zynq_i2c->control, ZYNQ_I2C_CONTROL_CLR_FIFO |
                ZYNQ_I2C_CONTROL_RW);
@@ -162,7 +166,7 @@ static int zynq_i2c_probe(struct i2c_adapter *adap, u8 dev)
        writel(dev, &zynq_i2c->address);
        writel(1, &zynq_i2c->transfer_size);
 
-       return (zynq_i2c_wait(ZYNQ_I2C_INTERRUPT_COMP |
+       return (zynq_i2c_wait(zynq_i2c, ZYNQ_I2C_INTERRUPT_COMP |
                ZYNQ_I2C_INTERRUPT_NACK) &
                ZYNQ_I2C_INTERRUPT_COMP) ? 0 : -ETIMEDOUT;
 }
@@ -177,6 +181,7 @@ static int zynq_i2c_read(struct i2c_adapter *adap, u8 dev, uint addr,
        u32 status;
        u32 i = 0;
        u8 *cur_data = data;
+       struct zynq_i2c_registers *zynq_i2c = i2c_select(adap);
 
        /* Check the hardware can handle the requested bytes */
        if ((length < 0) || (length > ZYNQ_I2C_TRANSFERT_SIZE_MAX))
@@ -198,7 +203,7 @@ static int zynq_i2c_read(struct i2c_adapter *adap, u8 dev, uint addr,
                        writel(addr >> (8 * alen), &zynq_i2c->data);
 
                /* Wait for the address to be sent */
-               if (!zynq_i2c_wait(ZYNQ_I2C_INTERRUPT_COMP)) {
+               if (!zynq_i2c_wait(zynq_i2c, ZYNQ_I2C_INTERRUPT_COMP)) {
                        /* Release the bus */
                        clrbits_le32(&zynq_i2c->control, ZYNQ_I2C_CONTROL_HOLD);
                        return -ETIMEDOUT;
@@ -214,7 +219,7 @@ static int zynq_i2c_read(struct i2c_adapter *adap, u8 dev, uint addr,
 
        /* Wait for data */
        do {
-               status = zynq_i2c_wait(ZYNQ_I2C_INTERRUPT_COMP |
+               status = zynq_i2c_wait(zynq_i2c, ZYNQ_I2C_INTERRUPT_COMP |
                        ZYNQ_I2C_INTERRUPT_DATA);
                if (!status) {
                        /* Release the bus */
@@ -243,6 +248,7 @@ static int zynq_i2c_write(struct i2c_adapter *adap, u8 dev, uint addr,
                          int alen, u8 *data, int length)
 {
        u8 *cur_data = data;
+       struct zynq_i2c_registers *zynq_i2c = i2c_select(adap);
 
        /* Write the register address */
        setbits_le32(&zynq_i2c->control, ZYNQ_I2C_CONTROL_CLR_FIFO |
@@ -254,7 +260,7 @@ static int zynq_i2c_write(struct i2c_adapter *adap, u8 dev, uint addr,
                while (alen--)
                        writel(addr >> (8 * alen), &zynq_i2c->data);
                /* Start the tranfer */
-               if (!zynq_i2c_wait(ZYNQ_I2C_INTERRUPT_COMP)) {
+               if (!zynq_i2c_wait(zynq_i2c, ZYNQ_I2C_INTERRUPT_COMP)) {
                        /* Release the bus */
                        clrbits_le32(&zynq_i2c->control, ZYNQ_I2C_CONTROL_HOLD);
                        return -ETIMEDOUT;
@@ -265,7 +271,7 @@ static int zynq_i2c_write(struct i2c_adapter *adap, u8 dev, uint addr,
        while (length--) {
                writel(*(cur_data++), &zynq_i2c->data);
                if (readl(&zynq_i2c->transfer_size) == ZYNQ_I2C_FIFO_DEPTH) {
-                       if (!zynq_i2c_wait(ZYNQ_I2C_INTERRUPT_COMP)) {
+                       if (!zynq_i2c_wait(zynq_i2c, ZYNQ_I2C_INTERRUPT_COMP)) {
                                /* Release the bus */
                                clrbits_le32(&zynq_i2c->control,
                                             ZYNQ_I2C_CONTROL_HOLD);
@@ -277,7 +283,7 @@ static int zynq_i2c_write(struct i2c_adapter *adap, u8 dev, uint addr,
        /* All done... release the bus */
        clrbits_le32(&zynq_i2c->control, ZYNQ_I2C_CONTROL_HOLD);
        /* Wait for the address and data to be sent */
-       if (!zynq_i2c_wait(ZYNQ_I2C_INTERRUPT_COMP))
+       if (!zynq_i2c_wait(zynq_i2c, ZYNQ_I2C_INTERRUPT_COMP))
                return -ETIMEDOUT;
        return 0;
 }
@@ -295,3 +301,7 @@ U_BOOT_I2C_ADAP_COMPLETE(zynq_0, zynq_i2c_init, zynq_i2c_probe, zynq_i2c_read,
                         zynq_i2c_write, zynq_i2c_set_bus_speed,
                         CONFIG_SYS_I2C_ZYNQ_SPEED, CONFIG_SYS_I2C_ZYNQ_SLAVE,
                         0)
+U_BOOT_I2C_ADAP_COMPLETE(zynq_1, zynq_i2c_init, zynq_i2c_probe, zynq_i2c_read,
+                        zynq_i2c_write, zynq_i2c_set_bus_speed,
+                        CONFIG_SYS_I2C_ZYNQ_SPEED, CONFIG_SYS_I2C_ZYNQ_SLAVE,
+                        1)

diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
index 9b6db043b577ae44dca5a45b991041abd4773261..787d32d2b801a34bc4315206decaec31cf90f3fb 100644 (file)
--- a/include/configs/zynq-common.h
+++ b/include/configs/zynq-common.h
@@ -104,13 +104,13 @@
 # define CONFIG_DOS_PARTITION
 #endif
 
+#define CONFIG_SYS_I2C_ZYNQ
 /* I2C */
-#if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1)
+#if defined(CONFIG_SYS_I2C_ZYNQ)
 # define CONFIG_CMD_I2C
 # define CONFIG_SYS_I2C
-# define CONFIG_SYS_I2C_ZYNQ
 # define CONFIG_SYS_I2C_ZYNQ_SPEED             100000
-# define CONFIG_SYS_I2C_ZYNQ_SLAVE             1
+# define CONFIG_SYS_I2C_ZYNQ_SLAVE             0
 #endif
 
 /* EEPROM */