net: fec: don't access RACC register when not available
authorGreg Ungerer <gerg@uclinux.org>
Sat, 20 Jun 2015 05:51:57 +0000 (15:51 +1000)
committerDavid S. Miller <davem@davemloft.net>
Mon, 29 Jun 2015 00:02:40 +0000 (17:02 -0700)
Not all silicon implementations of the Freescale FEC hardware module
have the RACC (Receive Accelerator Function) register, so we should not
be trying to access it on those that don't. Currently none of the ColdFire
based parts with a FEC have it.

Support for RACC was introduced by commit 4c09eed9 ("net: fec: Enable imx6
enet checksum acceleration"). A fix was introduced in commit d1391930
("net: fec: Fix build for MCF5272") that disables its use on the ColdFire
M5272 part, but it doesn't fix the general case of other ColdFire parts.

To fix we create a quirk flag, FEC_QUIRK_HAS_RACC, and check it before
working with the RACC register.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/freescale/fec.h
drivers/net/ethernet/freescale/fec_main.c

index a86af8a7485dad1be3caf4a55b6d77c7c7b5c884..1eee73cccdf58deba85c810399930ffa55dfa03c 100644 (file)
@@ -428,6 +428,8 @@ struct bufdesc_ex {
 #define FEC_QUIRK_BUG_CAPTURE          (1 << 10)
 /* Controller has only one MDIO bus */
 #define FEC_QUIRK_SINGLE_MDIO          (1 << 11)
+/* Controller supports RACC register */
+#define FEC_QUIRK_HAS_RACC             (1 << 12)
 
 struct fec_enet_priv_tx_q {
        int index;
index e464aeaeed2cd9ece504a2e1494b2869dfadd138..1f89c59b43535f9b65e946c7468cb1fcb13a2022 100644 (file)
@@ -85,28 +85,30 @@ static struct platform_device_id fec_devtype[] = {
                .driver_data = 0,
        }, {
                .name = "imx25-fec",
-               .driver_data = FEC_QUIRK_USE_GASKET,
+               .driver_data = FEC_QUIRK_USE_GASKET | FEC_QUIRK_HAS_RACC,
        }, {
                .name = "imx27-fec",
-               .driver_data = 0,
+               .driver_data = FEC_QUIRK_HAS_RACC,
        }, {
                .name = "imx28-fec",
                .driver_data = FEC_QUIRK_ENET_MAC | FEC_QUIRK_SWAP_FRAME |
-                               FEC_QUIRK_SINGLE_MDIO,
+                               FEC_QUIRK_SINGLE_MDIO | FEC_QUIRK_HAS_RACC,
        }, {
                .name = "imx6q-fec",
                .driver_data = FEC_QUIRK_ENET_MAC | FEC_QUIRK_HAS_GBIT |
                                FEC_QUIRK_HAS_BUFDESC_EX | FEC_QUIRK_HAS_CSUM |
-                               FEC_QUIRK_HAS_VLAN | FEC_QUIRK_ERR006358,
+                               FEC_QUIRK_HAS_VLAN | FEC_QUIRK_ERR006358 |
+                               FEC_QUIRK_HAS_RACC,
        }, {
                .name = "mvf600-fec",
-               .driver_data = FEC_QUIRK_ENET_MAC,
+               .driver_data = FEC_QUIRK_ENET_MAC | FEC_QUIRK_HAS_RACC,
        }, {
                .name = "imx6sx-fec",
                .driver_data = FEC_QUIRK_ENET_MAC | FEC_QUIRK_HAS_GBIT |
                                FEC_QUIRK_HAS_BUFDESC_EX | FEC_QUIRK_HAS_CSUM |
                                FEC_QUIRK_HAS_VLAN | FEC_QUIRK_HAS_AVB |
-                               FEC_QUIRK_ERR007885 | FEC_QUIRK_BUG_CAPTURE,
+                               FEC_QUIRK_ERR007885 | FEC_QUIRK_BUG_CAPTURE |
+                               FEC_QUIRK_HAS_RACC,
        }, {
                /* sentinel */
        }
@@ -970,13 +972,15 @@ fec_restart(struct net_device *ndev)
        writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
 
 #if !defined(CONFIG_M5272)
-       /* set RX checksum */
-       val = readl(fep->hwp + FEC_RACC);
-       if (fep->csum_flags & FLAG_RX_CSUM_ENABLED)
-               val |= FEC_RACC_OPTIONS;
-       else
-               val &= ~FEC_RACC_OPTIONS;
-       writel(val, fep->hwp + FEC_RACC);
+       if (fep->quirks & FEC_QUIRK_HAS_RACC) {
+               /* set RX checksum */
+               val = readl(fep->hwp + FEC_RACC);
+               if (fep->csum_flags & FLAG_RX_CSUM_ENABLED)
+                       val |= FEC_RACC_OPTIONS;
+               else
+                       val &= ~FEC_RACC_OPTIONS;
+               writel(val, fep->hwp + FEC_RACC);
+       }
 #endif
 
        /*