arm64: tls: Avoid unconditional zeroing of tpidrro_el0 for native tasks
authorWill Deacon <will.deacon@arm.com>
Tue, 14 Nov 2017 14:33:28 +0000 (14:33 +0000)
committerWill Deacon <will.deacon@arm.com>
Mon, 11 Dec 2017 13:41:03 +0000 (13:41 +0000)
When unmapping the kernel at EL0, we use tpidrro_el0 as a scratch register
during exception entry from native tasks and subsequently zero it in
the kernel_ventry macro. We can therefore avoid zeroing tpidrro_el0
in the context-switch path for native tasks using the entry trampoline.

Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Tested-by: Laura Abbott <labbott@redhat.com>
Tested-by: Shanker Donthineni <shankerd@codeaurora.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
arch/arm64/kernel/process.c

index 6b7dcf4310acf6fc04ff40cca4ccd10e27fabec9..583fd81546957e4d05de08b08473be5462a36777 100644 (file)
@@ -370,16 +370,14 @@ void tls_preserve_current_state(void)
 
 static void tls_thread_switch(struct task_struct *next)
 {
-       unsigned long tpidr, tpidrro;
-
        tls_preserve_current_state();
 
-       tpidr = *task_user_tls(next);
-       tpidrro = is_compat_thread(task_thread_info(next)) ?
-                 next->thread.tp_value : 0;
+       if (is_compat_thread(task_thread_info(next)))
+               write_sysreg(next->thread.tp_value, tpidrro_el0);
+       else if (!arm64_kernel_unmapped_at_el0())
+               write_sysreg(0, tpidrro_el0);
 
-       write_sysreg(tpidr, tpidr_el0);
-       write_sysreg(tpidrro, tpidrro_el0);
+       write_sysreg(*task_user_tls(next), tpidr_el0);
 }
 
 /* Restore the UAO state depending on next's addr_limit */