drm/amd/display: wait for set pipe mcp command completion
authorJosip Pavic <Josip.Pavic@amd.com>
Thu, 12 Sep 2019 19:40:08 +0000 (15:40 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 11 Oct 2019 00:32:32 +0000 (19:32 -0500)
[Why]
When the driver sends a pipe set command to the DMCU FW, it does not wait
for the command to complete. This can lead to unpredictable behavior if,
for example, the driver were to request a pipe disable to the FW via MCP,
then power down some hardware before the firmware has completed processing
the command.

[How]
Wait for the DMCU FW to finish processing set pipe commands

Signed-off-by: Josip Pavic <Josip.Pavic@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dce/dce_abm.c

index 9edd369c122068f42db9a7b2e49000ea377a7ce6..d759fdca7fdbafe2c222c2e5a0c5fd753981773e 100644 (file)
@@ -77,6 +77,9 @@ static bool dce_abm_set_pipe(struct abm *abm, uint32_t controller_id)
        /* notifyDMCUMsg */
        REG_UPDATE(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 1);
 
+       REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0,
+                       1, 80000);
+
        return true;
 }