#include "dce/dce_11_0_enum.h"
#include "dce/dce_11_0_sh_mask.h"
-#ifndef mmDMCU_STATUS__UC_IN_RESET__SHIFT
-#define mmDMCU_STATUS__UC_IN_RESET__SHIFT 0x0
-#endif
-
-#ifndef mmDMCU_STATUS__UC_IN_RESET_MASK
-#define mmDMCU_STATUS__UC_IN_RESET_MASK 0x00000001L
-#endif
-
#define LINK_INFO(...) \
dm_logger_write(dc_ctx->logger, LOG_HW_HOTPLUG, \
__VA_ARGS__)
return true;
}
+static bool is_dmcu_initialized(struct abm *abm)
+{
+ struct dce_abm *abm_dce = TO_DCE_ABM(abm);
+ unsigned int dmcu_uc_reset;
+
+ REG_GET(DMCU_STATUS, UC_IN_RESET, &dmcu_uc_reset);
+
+ return !dmcu_uc_reset;
+}
+
static bool dce_abm_set_backlight_level(
struct abm *abm,
unsigned int backlight_level,
unsigned int controller_id)
{
struct dce_abm *abm_dce = TO_DCE_ABM(abm);
- unsigned int dmcu_uc_reset;
dm_logger_write(abm->ctx->logger, LOG_BACKLIGHT,
"New Backlight level: %d (0x%X)\n",
backlight_level, backlight_level);
- REG_GET(DMCU_STATUS, UC_IN_RESET, &dmcu_uc_reset);
-
/* If DMCU is in reset state, DMCU is uninitialized */
- if (dmcu_uc_reset) {
- driver_set_backlight_level(abm_dce, backlight_level);
- } else {
+ if (is_dmcu_initialized(abm))
dmcu_set_backlight_level(abm_dce,
backlight_level,
frame_ramp,
controller_id);
- }
+ else
+ driver_set_backlight_level(abm_dce, backlight_level);
return true;
}
.abm_init = dce_abm_init,
.set_abm_level = dce_abm_set_level,
.init_backlight = dce_abm_init_backlight,
- .set_backlight_level = dce_abm_set_backlight_level
+ .set_backlight_level = dce_abm_set_backlight_level,
+ .is_dmcu_initialized = is_dmcu_initialized
};
static void dce_abm_construct(
#include "fixed32_32.h"
#include "bios_parser_interface.h"
#include "dc.h"
+#include "core_dc.h"
+#include "dce_abm.h"
#if defined(CONFIG_DRM_AMD_DC_DCN1_0)
#include "dcn_calcs.h"
#include "core_dc.h"
#endif
+
+
#define TO_DCE_CLOCKS(clocks)\
container_of(clocks, struct dce_disp_clk, base)
struct dce_disp_clk *clk_dce = TO_DCE_CLOCKS(clk);
struct bp_set_dce_clock_parameters dce_clk_params;
struct dc_bios *bp = clk->ctx->dc_bios;
+ struct core_dc *core_dc = DC_TO_CORE(clk->ctx->dc);
+ struct abm *abm = core_dc->res_pool->abm;
/* Prepare to program display clock*/
memset(&dce_clk_params, 0, sizeof(dce_clk_params));
bp->funcs->set_dce_clock(bp, &dce_clk_params);
-#if defined(CONFIG_DRM_AMD_DC_DCN1_0)
- dce_psr_wait_loop(clk_dce, requested_clk_khz);
-#endif
+ if (abm->funcs->is_dmcu_initialized(abm))
+ dce_psr_wait_loop(clk_dce, requested_clk_khz);
}