Add cpu support for the 8544
authorAndy Fleming <afleming@freescale.com>
Mon, 23 Apr 2007 06:32:22 +0000 (01:32 -0500)
committerAndrew Fleming-AFLEMING <afleming@freescale.com>
Tue, 24 Apr 2007 00:58:28 +0000 (19:58 -0500)
Recognize new SVR values, and add a few register definitions

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
cpu/mpc85xx/cpu.c

index 2fe4f2abba56bcf4d1f5f31a9225f47ced44db68..2fe6bdf4b942f8e38bf3485ed0fbe5765ebbf304 100644 (file)
@@ -1,5 +1,5 @@
 /*
- * Copyright 2004 Freescale Semiconductor.
+ * Copyright 2004,2007 Freescale Semiconductor, Inc.
  * (C) Copyright 2002, 2003 Motorola Inc.
  * Xianghua Xiao (X.Xiao@motorola.com)
  *
@@ -70,6 +70,12 @@ int checkcpu (void)
        case SVR_8548_E:
                puts("8548_E");
                break;
+       case SVR_8544:
+                puts("8544");
+                break;
+        case SVR_8544_E:
+                puts("8544_E");
+                break;
        default:
                puts("Unknown");
                break;
@@ -112,7 +118,7 @@ int checkcpu (void)
 #endif
        clkdiv = lcrr & 0x0f;
        if (clkdiv == 2 || clkdiv == 4 || clkdiv == 8) {
-#ifdef CONFIG_MPC8548
+#if defined(CONFIG_MPC8548) || defined(CONFIG_MPC8544)
                /*
                 * Yes, the entire PQ38 family use the same
                 * bit-representation for twice the clock divider values.