drm/i915: Fix cdclk vs. dev_cdclk mess when not recomputing things
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Mon, 14 Nov 2016 16:35:09 +0000 (18:35 +0200)
committerJani Nikula <jani.nikula@intel.com>
Mon, 5 Dec 2016 08:55:07 +0000 (10:55 +0200)
When we end up not recomputing the cdclk, we need to populate
intel_state->cdclk with the "atomic_cdclk_freq" instead of the
current cdclk_freq. When no pipes are active, the actual cdclk_freq
may be lower than what the configuration of the planes and
pipes would require from the point of view of the software state.

This fixes bogus WARNS from skl_max_scale() which is trying to check
the plane software state against the cdclk frequency. So any time
it got called during DPMS off for instance, we might have tripped
the warn if the current mode would have required a higher than
minimum cdclk.

v2: Drop the dev_cdclk stuff (Maarten)

Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Mika Kahola <mika.kahola@intel.com>
Cc: bruno.pagani@ens-lyon.org
Cc: Daniel J Blueman <daniel.blueman@gmail.com>
Cc: Paul Bolle <pebolle@tiscali.nl>
Cc: Joseph Yasi <joe.yasi@gmail.com>
Tested-by: Paul Bolle <pebolle@tiscali.nl>
Tested-by: Joseph Yasi <joe.yasi@gmail.com> (v1)
Cc: <stable@vger.kernel.org> # v4.6+
Fixes: 1a617b77658e ("drm/i915: Keep track of the cdclk as if all crtc's were active.")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98214
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1479141311-11904-2-git-send-email-ville.syrjala@linux.intel.com
(cherry picked from commit e0ca7a6be38ce603d26df5707c22e53870a623e0)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/intel_display.c

index 8d270f7650de98223eb10aa4009010f68c99369c..7b5add5e9fd9c11e30369547a1be370c8cf4610c 100644 (file)
@@ -13994,8 +13994,9 @@ static int intel_modeset_checks(struct drm_atomic_state *state)
 
                DRM_DEBUG_KMS("New cdclk calculated to be atomic %u, actual %u\n",
                              intel_state->cdclk, intel_state->dev_cdclk);
-       } else
+       } else {
                to_intel_atomic_state(state)->cdclk = dev_priv->atomic_cdclk_freq;
+       }
 
        intel_modeset_clear_plls(state);
 
@@ -14096,8 +14097,9 @@ static int intel_atomic_check(struct drm_device *dev,
 
                if (ret)
                        return ret;
-       } else
-               intel_state->cdclk = dev_priv->cdclk_freq;
+       } else {
+               intel_state->cdclk = dev_priv->atomic_cdclk_freq;
+       }
 
        ret = drm_atomic_helper_check_planes(dev, state);
        if (ret)