for (i = 0; i < context->stream_count; i++) {
const struct dc_sink *sink = context->streams[i]->sink;
- for (j = 0; j < context->stream_status[i].plane_count; j++) {
- dc->hwss.apply_ctx_for_surface(
- dc, context->streams[i],
- context->stream_status[i].plane_count,
- context);
+ dc->hwss.apply_ctx_for_surface(
+ dc, context->streams[i],
+ context->stream_status[i].plane_count,
+ context);
- /*
- * enable stereo
- * TODO rework dc_enable_stereo call to work with validation sets?
- */
- for (k = 0; k < MAX_PIPES; k++) {
- pipe = &context->res_ctx.pipe_ctx[k];
-
- for (l = 0 ; pipe && l < context->stream_count; l++) {
- if (context->streams[l] &&
- context->streams[l] == pipe->stream &&
- dc->hwss.setup_stereo)
- dc->hwss.setup_stereo(pipe, dc);
- }
+ /*
+ * enable stereo
+ * TODO rework dc_enable_stereo call to work with validation sets?
+ */
+ for (k = 0; k < MAX_PIPES; k++) {
+ pipe = &context->res_ctx.pipe_ctx[k];
+
+ for (l = 0 ; pipe && l < context->stream_count; l++) {
+ if (context->streams[l] &&
+ context->streams[l] == pipe->stream &&
+ dc->hwss.setup_stereo)
+ dc->hwss.setup_stereo(pipe, dc);
}
}
- for (j = 0; j < MAX_PIPES; j++) {
- pipe = &context->res_ctx.pipe_ctx[j];
- if (!pipe->top_pipe && pipe->stream == context->streams[i])
- dc->hwss.pipe_control_lock(dc, pipe, false);
- }
CONN_MSG_MODE(sink->link, "{%dx%d, %dx%d@%dKhz}",
context->streams[i]->timing.h_addressable,
dc_enable_stereo(dc, context, dc_streams, context->stream_count);
+ for (i = 0; i < context->stream_count; i++) {
+ for (j = 0; j < MAX_PIPES; j++) {
+ pipe = &context->res_ctx.pipe_ctx[j];
+
+ if (!pipe->top_pipe && pipe->stream == context->streams[i])
+ dc->hwss.pipe_control_lock(dc, pipe, false);
+ }
+ }
+
dc_release_state(dc->current_state);
dc->current_state = context;
return false;
}
-bool dc_add_stream_to_ctx(
+enum dc_status dc_add_stream_to_ctx(
struct dc *dc,
struct dc_state *new_ctx,
struct dc_stream_state *stream)
if (res != DC_OK)
DC_ERROR("Adding stream %p to context failed with err %d!\n", stream, res);
- return res == DC_OK;
+ return res;
}
bool dc_remove_stream_from_ctx(
/* acquire new resources */
pipe_idx = acquire_first_free_pipe(&context->res_ctx, pool, stream);
-#if defined(CONFIG_DRM_AMD_DC_DCN1_0)
if (pipe_idx < 0)
- acquire_first_split_pipe(&context->res_ctx, pool, stream);
-#endif
+ pipe_idx = acquire_first_split_pipe(&context->res_ctx, pool, stream);
+
if (pipe_idx < 0)
return DC_NO_CONTROLLER_RESOURCE;