drm/nouveau: Fixup semaphores on pre-nv50 cards.

Apparently, they generate a PFIFO interrupt each time one of the
semaphore methods is executed if its ctxdma wasn't manually marked as
valid. This patch makes it flip the valid bit in response to the
DMA_SEMAPHORE method (which triggers the IRQ even for a valid ctxdma).

Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

diff --git a/drivers/gpu/drm/nouveau/nouveau_irq.c b/drivers/gpu/drm/nouveau/nouveau_irq.c
index 3b9bad66162ac211518c51a9c01404e26e4032d0..baa9b3e0b66b1701f141564b2763c8b1d7b093a6 100644 (file)
--- a/drivers/gpu/drm/nouveau/nouveau_irq.c
+++ b/drivers/gpu/drm/nouveau/nouveau_irq.c
@@ -211,6 +211,20 @@ nouveau_fifo_irq_handler(struct drm_device *dev)
                                                                get + 4);
                }
 
+               if (status & NV_PFIFO_INTR_SEMAPHORE) {
+                       uint32_t sem;
+
+                       status &= ~NV_PFIFO_INTR_SEMAPHORE;
+                       nv_wr32(dev, NV03_PFIFO_INTR_0,
+                               NV_PFIFO_INTR_SEMAPHORE);
+
+                       sem = nv_rd32(dev, NV10_PFIFO_CACHE1_SEMAPHORE);
+                       nv_wr32(dev, NV10_PFIFO_CACHE1_SEMAPHORE, sem | 0x1);
+
+                       nv_wr32(dev, NV03_PFIFO_CACHE1_GET, get + 4);
+                       nv_wr32(dev, NV04_PFIFO_CACHE1_PULL0, 1);
+               }
+
                if (status) {
                        NV_INFO(dev, "PFIFO_INTR 0x%08x - Ch %d\n",
                                status, chid);