staging: wilc1000: fix line over 80 characters in wilc_spi_read_int()
authorAjay Singh <ajay.kathat@microchip.com>
Wed, 14 Feb 2018 11:10:14 +0000 (16:40 +0530)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 16 Feb 2018 14:31:30 +0000 (15:31 +0100)
Refactor wilc_spi_read_int() to fix the line over 80 char issues reported
by checkpatch.pl script.

Signed-off-by: Ajay Singh <ajay.kathat@microchip.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/staging/wilc1000/wilc_spi.c

index fddc0dbf0c8400157e61599d1e19698fae9aad46..7c58beb8a6901ad7d99938abeb084e429c9ddc97 100644 (file)
@@ -939,45 +939,46 @@ static int wilc_spi_read_int(struct wilc *wilc, u32 *int_status)
        int happened, j;
        u32 unknown_mask;
        u32 irq_flags;
+       int k = IRG_FLAGS_OFFSET + 5;
 
        if (g_spi.has_thrpt_enh) {
                ret = spi_internal_read(wilc, 0xe840 - WILC_SPI_REG_BASE,
                                        int_status);
-       } else {
-               ret = wilc_spi_read_reg(wilc, WILC_VMM_TO_HOST_SIZE,
-                                       &byte_cnt);
-               if (!ret) {
-                       dev_err(&spi->dev,
-                               "Failed read WILC_VMM_TO_HOST_SIZE ...\n");
-                       goto _fail_;
-               }
-               tmp = (byte_cnt >> 2) & IRQ_DMA_WD_CNT_MASK;
+               return ret;
+       }
+       ret = wilc_spi_read_reg(wilc, WILC_VMM_TO_HOST_SIZE, &byte_cnt);
+       if (!ret) {
+               dev_err(&spi->dev,
+                       "Failed read WILC_VMM_TO_HOST_SIZE ...\n");
+               goto _fail_;
+       }
+       tmp = (byte_cnt >> 2) & IRQ_DMA_WD_CNT_MASK;
 
-               j = 0;
-               do {
-                       happened = 0;
+       j = 0;
+       do {
+               happened = 0;
 
-                       wilc_spi_read_reg(wilc, 0x1a90, &irq_flags);
-                       tmp |= ((irq_flags >> 27) << IRG_FLAGS_OFFSET);
+               wilc_spi_read_reg(wilc, 0x1a90, &irq_flags);
+               tmp |= ((irq_flags >> 27) << IRG_FLAGS_OFFSET);
 
-                       if (g_spi.nint > 5) {
-                               wilc_spi_read_reg(wilc, 0x1a94,
-                                                 &irq_flags);
-                               tmp |= (((irq_flags >> 0) & 0x7) << (IRG_FLAGS_OFFSET + 5));
-                       }
+               if (g_spi.nint > 5) {
+                       wilc_spi_read_reg(wilc, 0x1a94, &irq_flags);
+                       tmp |= (((irq_flags >> 0) & 0x7) << k);
+               }
 
-                       unknown_mask = ~((1ul << g_spi.nint) - 1);
+               unknown_mask = ~((1ul << g_spi.nint) - 1);
 
-                       if ((tmp >> IRG_FLAGS_OFFSET) & unknown_mask) {
-                               dev_err(&spi->dev, "Unexpected interrupt (2): j=%d, tmp=%x, mask=%x\n", j, tmp, unknown_mask);
-                                       happened = 1;
-                       }
+               if ((tmp >> IRG_FLAGS_OFFSET) & unknown_mask) {
+                       dev_err(&spi->dev,
+                               "Unexpected interrupt(2):j=%d,tmp=%x,mask=%x\n",
+                               j, tmp, unknown_mask);
+                               happened = 1;
+               }
 
-                       j++;
-               } while (happened);
+               j++;
+       } while (happened);
 
-               *int_status = tmp;
-       }
+       *int_status = tmp;
 
 _fail_:
        return ret;