{
#ifdef AXP_GPIO
if (gpio >= SUNXI_GPIO_AXP0_START)
- return axp_gpio_direction_input(gpio - SUNXI_GPIO_AXP0_START);
+ return axp_gpio_direction_input(NULL, gpio - SUNXI_GPIO_AXP0_START);
#endif
sunxi_gpio_set_cfgpin(gpio, SUNXI_GPIO_INPUT);
{
#ifdef AXP_GPIO
if (gpio >= SUNXI_GPIO_AXP0_START)
- return axp_gpio_direction_output(gpio - SUNXI_GPIO_AXP0_START,
+ return axp_gpio_direction_output(NULL, gpio - SUNXI_GPIO_AXP0_START,
value);
#endif
sunxi_gpio_set_cfgpin(gpio, SUNXI_GPIO_OUTPUT);
{
#ifdef AXP_GPIO
if (gpio >= SUNXI_GPIO_AXP0_START)
- return axp_gpio_get_value(gpio - SUNXI_GPIO_AXP0_START);
+ return axp_gpio_get_value(NULL, gpio - SUNXI_GPIO_AXP0_START);
#endif
return sunxi_gpio_input(gpio);
}
{
#ifdef AXP_GPIO
if (gpio >= SUNXI_GPIO_AXP0_START)
- return axp_gpio_set_value(gpio - SUNXI_GPIO_AXP0_START, value);
+ return axp_gpio_set_value(NULL, gpio - SUNXI_GPIO_AXP0_START, value);
#endif
return sunxi_gpio_output(gpio, value);
}
return 0;
}
-int axp_gpio_direction_input(unsigned int pin)
+int axp_gpio_direction_input(struct udevice *dev, unsigned pin)
{
if (pin == SUNXI_GPIO_AXP0_VBUS_DETECT)
return 0;
return axp209_write(reg, val);
}
-int axp_gpio_direction_output(unsigned int pin, unsigned int val)
+int axp_gpio_direction_output(struct udevice *dev, unsigned pin, int val)
{
u8 reg = axp209_get_gpio_ctrl_reg(pin);
return axp209_write(reg, val);
}
-int axp_gpio_get_value(unsigned int pin)
+int axp_gpio_get_value(struct udevice *dev, unsigned pin)
{
u8 val, mask;
int rc;
return (val & mask) ? 1 : 0;
}
-int axp_gpio_set_value(unsigned int pin, unsigned int val)
+int axp_gpio_set_value(struct udevice *dev, unsigned pin, int val)
{
- return axp_gpio_direction_output(pin, val);
+ return axp_gpio_direction_output(dev, pin, val);
}
return 0;
}
-int axp_gpio_direction_input(unsigned int pin)
+int axp_gpio_direction_input(struct udevice *dev, unsigned pin)
{
switch (pin) {
case SUNXI_GPIO_AXP0_VBUS_DETECT:
}
}
-int axp_gpio_direction_output(unsigned int pin, unsigned int val)
+int axp_gpio_direction_output(struct udevice *dev, unsigned pin, int val)
{
int ret;
if (ret)
return ret;
- return axp_gpio_set_value(pin, val);
+ return axp_gpio_set_value(dev, pin, val);
default:
return -EINVAL;
}
}
-int axp_gpio_get_value(unsigned int pin)
+int axp_gpio_get_value(struct udevice *dev, unsigned pin)
{
int ret;
u8 val;
}
}
-int axp_gpio_set_value(unsigned int pin, unsigned int val)
+int axp_gpio_set_value(struct udevice *dev, unsigned pin, int val)
{
int ret;
* SPDX-License-Identifier: GPL-2.0+
*/
+struct udevice;
+
enum axp209_reg {
AXP209_POWER_STATUS = 0x00,
AXP209_CHIP_VERSION = 0x03,
extern int axp209_poweron_by_dc(void);
extern int axp209_power_button(void);
-extern int axp_gpio_direction_input(unsigned int pin);
-extern int axp_gpio_direction_output(unsigned int pin, unsigned int val);
-extern int axp_gpio_get_value(unsigned int pin);
-extern int axp_gpio_set_value(unsigned int pin, unsigned int val);
+extern int axp_gpio_direction_input(struct udevice *dev, unsigned offset);
+extern int axp_gpio_direction_output(struct udevice *dev, unsigned offset, int val);
+extern int axp_gpio_get_value(struct udevice *dev, unsigned offset);
+extern int axp_gpio_set_value(struct udevice *dev, unsigned offset, int val);
* SPDX-License-Identifier: GPL-2.0+
*/
+struct udevice;
+
#define AXP221_CHIP_ADDR 0x68
#define AXP221_CTRL_ADDR 0x3e
#define AXP221_INIT_DATA 0x3e
int axp221_init(void);
int axp221_get_sid(unsigned int *sid);
-int axp_gpio_direction_input(unsigned int pin);
-int axp_gpio_direction_output(unsigned int pin, unsigned int val);
-int axp_gpio_get_value(unsigned int pin);
-int axp_gpio_set_value(unsigned int pin, unsigned int val);
+int axp_gpio_direction_input(struct udevice *dev, unsigned offset);
+int axp_gpio_direction_output(struct udevice *dev, unsigned offset, int val);
+int axp_gpio_get_value(struct udevice *dev, unsigned offset);
+int axp_gpio_set_value(struct udevice *dev, unsigned offset, int val);