drm/amdgpu: support cond exec

This adds the groundwork for conditional execution on
SDMA which is necessary for preemption.

Signed-off-by: Monk Liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 2c2f2349dd820e0ff4df1b1fc76f197f80bdb8bc..49adb451c3bc54c8fd5c17821f8a62e845dab9d7 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -788,6 +788,9 @@ struct amdgpu_ring {
        struct amdgpu_ctx       *current_ctx;
        enum amdgpu_ring_type   type;
        char                    name[16];
+       unsigned                cond_exe_offs;
+       u64                             cond_exe_gpu_addr;
+       volatile u32    *cond_exe_cpu_addr;
 };
 
 /*

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
index 8443cea6821ad00cad2181d16ac450b8045223ec..a15d690d90891a9acfa31086ce65ba073bc68e9b 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
@@ -160,6 +160,9 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
                        amdgpu_ring_emit_hdp_flush(ring);
        }
 
+       /* always set cond_exec_polling to CONTINUE */
+       *ring->cond_exe_cpu_addr = 1;
+
        old_ctx = ring->current_ctx;
        for (i = 0; i < num_ibs; ++i) {
                ib = &ibs[i];

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
index 972eed2ef787eff5a49028ae58f60f3a85c47690..dd79243d0a37eec0d95841f0918c7c91cda2e597 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
@@ -267,6 +267,15 @@ int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring,
        }
        ring->next_rptr_gpu_addr = adev->wb.gpu_addr + (ring->next_rptr_offs * 4);
        ring->next_rptr_cpu_addr = &adev->wb.wb[ring->next_rptr_offs];
+
+       r = amdgpu_wb_get(adev, &ring->cond_exe_offs);
+       if (r) {
+               dev_err(adev->dev, "(%d) ring cond_exec_polling wb alloc failed\n", r);
+               return r;
+       }
+       ring->cond_exe_gpu_addr = adev->wb.gpu_addr + (ring->cond_exe_offs * 4);
+       ring->cond_exe_cpu_addr = &adev->wb.wb[ring->cond_exe_offs];
+
        spin_lock_init(&ring->fence_lock);
        r = amdgpu_fence_driver_start_ring(ring, irq_src, irq_type);
        if (r) {