[MIPS] Rename include/asm-mips/cobalt to include/asm-mips/mach-cobalt.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 2a9f2ef27b294aebe1d781921fc805d7fcfc9d76..9b53c59b269a9d9b9e85ceac648af1c2b27f2b82 100644 (file)
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -369,7 +369,7 @@ load-$(CONFIG_MIPS_XXS1500) += 0xffffffff80100000
 # Cobalt Server
 #
 core-$(CONFIG_MIPS_COBALT)     += arch/mips/cobalt/
-cflags-$(CONFIG_MIPS_COBALT)   += -Iinclude/asm-mips/cobalt
+cflags-$(CONFIG_MIPS_COBALT)   += -Iinclude/asm-mips/mach-cobalt
 load-$(CONFIG_MIPS_COBALT)     += 0xffffffff80080000
 
 #

diff --git a/arch/mips/cobalt/int-handler.S b/arch/mips/cobalt/int-handler.S
index f92608e8d84fe858ad8f110da15bb6056a169c66..e75d5e3ca86807c81a805cbdad5d61a7d34a4dbe 100644 (file)
--- a/arch/mips/cobalt/int-handler.S
+++ b/arch/mips/cobalt/int-handler.S
@@ -8,7 +8,7 @@
  */
 #include <asm/asm.h>
 #include <asm/mipsregs.h>
-#include <asm/cobalt/cobalt.h>
+#include <asm/mach-cobalt/cobalt.h>
 #include <asm/regdef.h>
 #include <asm/stackframe.h>
 

diff --git a/arch/mips/cobalt/irq.c b/arch/mips/cobalt/irq.c
index 0d90851f925ea6fecadbb6d0f968c64846b1472f..f9a108820d6e2d1245eb64ac942df5418fba03e0 100644 (file)
--- a/arch/mips/cobalt/irq.c
+++ b/arch/mips/cobalt/irq.c
@@ -18,7 +18,7 @@
 #include <asm/gt64120.h>
 #include <asm/ptrace.h>
 
-#include <asm/cobalt/cobalt.h>
+#include <asm/mach-cobalt/cobalt.h>
 
 extern void cobalt_handle_int(void);
 

diff --git a/arch/mips/cobalt/reset.c b/arch/mips/cobalt/reset.c
index 805a0e88507b5b0b8b4cec03f5f389edb13c68f5..753dfccae6fa090df4dfb5a6a1abcb53552c7050 100644 (file)
--- a/arch/mips/cobalt/reset.c
+++ b/arch/mips/cobalt/reset.c
@@ -16,7 +16,7 @@
 #include <asm/reboot.h>
 #include <asm/system.h>
 #include <asm/mipsregs.h>
-#include <asm/cobalt/cobalt.h>
+#include <asm/mach-cobalt/cobalt.h>
 
 void cobalt_machine_halt(void)
 {

diff --git a/arch/mips/cobalt/setup.c b/arch/mips/cobalt/setup.c
index f9cf1554b2341ab9f1c429ef5cee1d4dd6059a86..050685b87a3ca1cc3d7eb2973c5c0f97c727b7a6 100644 (file)
--- a/arch/mips/cobalt/setup.c
+++ b/arch/mips/cobalt/setup.c
@@ -26,7 +26,7 @@
 #include <asm/gt64120.h>
 #include <asm/serial.h>
 
-#include <asm/cobalt/cobalt.h>
+#include <asm/mach-cobalt/cobalt.h>
 
 extern void cobalt_machine_restart(char *command);
 extern void cobalt_machine_halt(void);

diff --git a/arch/mips/pci/fixup-cobalt.c b/arch/mips/pci/fixup-cobalt.c
index 909292f50d06114794379d61ae92bd2b1792dba8..b664df150a3ef80f6f78d64183946bbbf761971a 100644 (file)
--- a/arch/mips/pci/fixup-cobalt.c
+++ b/arch/mips/pci/fixup-cobalt.c
@@ -17,7 +17,7 @@
 #include <asm/io.h>
 #include <asm/gt64120.h>
 
-#include <asm/cobalt/cobalt.h>
+#include <asm/mach-cobalt/cobalt.h>
 
 extern int cobalt_board_id;
 

diff --git a/arch/mips/pci/ops-gt64111.c b/arch/mips/pci/ops-gt64111.c
index c1807934768d499d9f27a27aa27b551316720cca..13de45940b1995c6eeeb881617f3b9a796f2d15c 100644 (file)
--- a/arch/mips/pci/ops-gt64111.c
+++ b/arch/mips/pci/ops-gt64111.c
@@ -15,7 +15,7 @@
 #include <asm/io.h>
 #include <asm/gt64120.h>
 
-#include <asm/cobalt/cobalt.h>
+#include <asm/mach-cobalt/cobalt.h>
 
 /*
  * Device 31 on the GT64111 is used to generate PCI special

diff --git a/include/asm-mips/cobalt/cobalt.h b/include/asm-mips/cobalt/cobalt.h
deleted file mode 100644 (file)
index 78e1df2..0000000
--- a/include/asm-mips/cobalt/cobalt.h
+++ /dev/null
@@ -1,116 +0,0 @@
-/*
- * Lowlevel hardware stuff for the MIPS based Cobalt microservers.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1997 Cobalt Microserver
- * Copyright (C) 1997, 2003 Ralf Baechle
- * Copyright (C) 2001, 2002, 2003 Liam Davies (ldavies@agile.tv)
- */
-#ifndef __ASM_COBALT_H
-#define __ASM_COBALT_H
-
-/*
- * i8259 legacy interrupts used on Cobalt:
- *
- *     8  - RTC
- *     9  - PCI
- *    14  - IDE0
- *    15  - IDE1
- */
-#define COBALT_QUBE_SLOT_IRQ   9
-
-/*
- * CPU IRQs  are 16 ... 23
- */
-#define COBALT_CPU_IRQ         16
-
-#define COBALT_GALILEO_IRQ     (COBALT_CPU_IRQ + 2)
-#define COBALT_SCC_IRQ          (COBALT_CPU_IRQ + 3)   /* pre-production has 85C30 */
-#define COBALT_RAQ_SCSI_IRQ    (COBALT_CPU_IRQ + 3)
-#define COBALT_ETH0_IRQ                (COBALT_CPU_IRQ + 3)
-#define COBALT_QUBE1_ETH0_IRQ  (COBALT_CPU_IRQ + 4)
-#define COBALT_ETH1_IRQ                (COBALT_CPU_IRQ + 4)
-#define COBALT_SERIAL_IRQ      (COBALT_CPU_IRQ + 5)
-#define COBALT_SCSI_IRQ         (COBALT_CPU_IRQ + 5)
-#define COBALT_VIA_IRQ         (COBALT_CPU_IRQ + 6)    /* Chained to VIA ISA bridge */
-
-/*
- * PCI configuration space manifest constants.  These are wired into
- * the board layout according to the PCI spec to enable the software
- * to probe the hardware configuration space in a well defined manner.
- *
- * The PCI_DEVSHFT() macro transforms these values into numbers
- * suitable for passing as the dev parameter to the various
- * pcibios_read/write_config routines.
- */
-#define COBALT_PCICONF_CPU      0x06
-#define COBALT_PCICONF_ETH0     0x07
-#define COBALT_PCICONF_RAQSCSI  0x08
-#define COBALT_PCICONF_VIA      0x09
-#define COBALT_PCICONF_PCISLOT  0x0A
-#define COBALT_PCICONF_ETH1     0x0C
-
-
-/*
- * The Cobalt board id information.  The boards have an ID number wired
- * into the VIA that is available in the high nibble of register 94.
- * This register is available in the VIA configuration space through the
- * interface routines qube_pcibios_read/write_config. See cobalt/pci.c
- */
-#define VIA_COBALT_BRD_ID_REG  0x94
-#define VIA_COBALT_BRD_REG_to_ID(reg)  ((unsigned char) (reg) >> 4)
-#define COBALT_BRD_ID_QUBE1    0x3
-#define COBALT_BRD_ID_RAQ1     0x4
-#define COBALT_BRD_ID_QUBE2    0x5
-#define COBALT_BRD_ID_RAQ2     0x6
-
-/*
- * Galileo chipset access macros for the Cobalt. The base address for
- * the GT64111 chip is 0x14000000
- *
- * Most of this really should go into a separate GT64111 header file.
- */
-#define GT64111_IO_BASE                0x10000000UL
-#define GT64111_IO_END         0x11ffffffUL
-#define GT64111_MEM_BASE       0x12000000UL
-#define GT64111_MEM_END                0x13ffffffUL
-#define GT64111_BASE           0x14000000UL
-#define GALILEO_REG(ofs)       CKSEG1ADDR(GT64111_BASE + (unsigned long)(ofs))
-
-#define GALILEO_INL(port)      (*(volatile unsigned int *) GALILEO_REG(port))
-#define GALILEO_OUTL(val, port)                                                \
-do {                                                                   \
-       *(volatile unsigned int *) GALILEO_REG(port) = (val);           \
-} while (0)
-
-#define GALILEO_INTR_T0EXP     (1 << 8)
-#define GALILEO_INTR_RETRY_CTR (1 << 20)
-
-#define GALILEO_ENTC0          0x01
-#define GALILEO_SELTC0         0x02
-
-#define PCI_CFG_SET(devfn,where)                                       \
-       GALILEO_OUTL((0x80000000 | (PCI_SLOT (devfn) << 11) |           \
-               (PCI_FUNC (devfn) << 8) | (where)), GT_PCI0_CFGADDR_OFS)
-
-#define COBALT_LED_PORT                (*(volatile unsigned char *) CKSEG1ADDR(0x1c000000))
-# define COBALT_LED_BAR_LEFT   (1 << 0)        /* Qube */
-# define COBALT_LED_BAR_RIGHT  (1 << 1)        /* Qube */
-# define COBALT_LED_WEB                (1 << 2)        /* RaQ */
-# define COBALT_LED_POWER_OFF  (1 << 3)        /* RaQ */
-# define COBALT_LED_RESET      0x0f
-
-#define COBALT_KEY_PORT                ((~*(volatile unsigned int *) CKSEG1ADDR(0x1d000000) >> 24) & COBALT_KEY_MASK)
-# define COBALT_KEY_CLEAR      (1 << 1)
-# define COBALT_KEY_LEFT       (1 << 2)
-# define COBALT_KEY_UP         (1 << 3)
-# define COBALT_KEY_DOWN       (1 << 4)
-# define COBALT_KEY_RIGHT      (1 << 5)
-# define COBALT_KEY_ENTER      (1 << 6)
-# define COBALT_KEY_SELECT     (1 << 7)
-# define COBALT_KEY_MASK       0xfe
-
-#endif /* __ASM_COBALT_H */

diff --git a/include/asm-mips/cobalt/mach-gt64120.h b/include/asm-mips/cobalt/mach-gt64120.h
deleted file mode 100644 (file)
index 587fc43..0000000
--- a/include/asm-mips/cobalt/mach-gt64120.h
+++ /dev/null
@@ -1 +0,0 @@
-/* there's something here ... in the dark */

diff --git a/include/asm-mips/mach-cobalt/cobalt.h b/include/asm-mips/mach-cobalt/cobalt.h
new file mode 100644 (file)
index 0000000..78e1df2
--- /dev/null
+++ b/include/asm-mips/mach-cobalt/cobalt.h
@@ -0,0 +1,116 @@
+/*
+ * Lowlevel hardware stuff for the MIPS based Cobalt microservers.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1997 Cobalt Microserver
+ * Copyright (C) 1997, 2003 Ralf Baechle
+ * Copyright (C) 2001, 2002, 2003 Liam Davies (ldavies@agile.tv)
+ */
+#ifndef __ASM_COBALT_H
+#define __ASM_COBALT_H
+
+/*
+ * i8259 legacy interrupts used on Cobalt:
+ *
+ *     8  - RTC
+ *     9  - PCI
+ *    14  - IDE0
+ *    15  - IDE1
+ */
+#define COBALT_QUBE_SLOT_IRQ   9
+
+/*
+ * CPU IRQs  are 16 ... 23
+ */
+#define COBALT_CPU_IRQ         16
+
+#define COBALT_GALILEO_IRQ     (COBALT_CPU_IRQ + 2)
+#define COBALT_SCC_IRQ          (COBALT_CPU_IRQ + 3)   /* pre-production has 85C30 */
+#define COBALT_RAQ_SCSI_IRQ    (COBALT_CPU_IRQ + 3)
+#define COBALT_ETH0_IRQ                (COBALT_CPU_IRQ + 3)
+#define COBALT_QUBE1_ETH0_IRQ  (COBALT_CPU_IRQ + 4)
+#define COBALT_ETH1_IRQ                (COBALT_CPU_IRQ + 4)
+#define COBALT_SERIAL_IRQ      (COBALT_CPU_IRQ + 5)
+#define COBALT_SCSI_IRQ         (COBALT_CPU_IRQ + 5)
+#define COBALT_VIA_IRQ         (COBALT_CPU_IRQ + 6)    /* Chained to VIA ISA bridge */
+
+/*
+ * PCI configuration space manifest constants.  These are wired into
+ * the board layout according to the PCI spec to enable the software
+ * to probe the hardware configuration space in a well defined manner.
+ *
+ * The PCI_DEVSHFT() macro transforms these values into numbers
+ * suitable for passing as the dev parameter to the various
+ * pcibios_read/write_config routines.
+ */
+#define COBALT_PCICONF_CPU      0x06
+#define COBALT_PCICONF_ETH0     0x07
+#define COBALT_PCICONF_RAQSCSI  0x08
+#define COBALT_PCICONF_VIA      0x09
+#define COBALT_PCICONF_PCISLOT  0x0A
+#define COBALT_PCICONF_ETH1     0x0C
+
+
+/*
+ * The Cobalt board id information.  The boards have an ID number wired
+ * into the VIA that is available in the high nibble of register 94.
+ * This register is available in the VIA configuration space through the
+ * interface routines qube_pcibios_read/write_config. See cobalt/pci.c
+ */
+#define VIA_COBALT_BRD_ID_REG  0x94
+#define VIA_COBALT_BRD_REG_to_ID(reg)  ((unsigned char) (reg) >> 4)
+#define COBALT_BRD_ID_QUBE1    0x3
+#define COBALT_BRD_ID_RAQ1     0x4
+#define COBALT_BRD_ID_QUBE2    0x5
+#define COBALT_BRD_ID_RAQ2     0x6
+
+/*
+ * Galileo chipset access macros for the Cobalt. The base address for
+ * the GT64111 chip is 0x14000000
+ *
+ * Most of this really should go into a separate GT64111 header file.
+ */
+#define GT64111_IO_BASE                0x10000000UL
+#define GT64111_IO_END         0x11ffffffUL
+#define GT64111_MEM_BASE       0x12000000UL
+#define GT64111_MEM_END                0x13ffffffUL
+#define GT64111_BASE           0x14000000UL
+#define GALILEO_REG(ofs)       CKSEG1ADDR(GT64111_BASE + (unsigned long)(ofs))
+
+#define GALILEO_INL(port)      (*(volatile unsigned int *) GALILEO_REG(port))
+#define GALILEO_OUTL(val, port)                                                \
+do {                                                                   \
+       *(volatile unsigned int *) GALILEO_REG(port) = (val);           \
+} while (0)
+
+#define GALILEO_INTR_T0EXP     (1 << 8)
+#define GALILEO_INTR_RETRY_CTR (1 << 20)
+
+#define GALILEO_ENTC0          0x01
+#define GALILEO_SELTC0         0x02
+
+#define PCI_CFG_SET(devfn,where)                                       \
+       GALILEO_OUTL((0x80000000 | (PCI_SLOT (devfn) << 11) |           \
+               (PCI_FUNC (devfn) << 8) | (where)), GT_PCI0_CFGADDR_OFS)
+
+#define COBALT_LED_PORT                (*(volatile unsigned char *) CKSEG1ADDR(0x1c000000))
+# define COBALT_LED_BAR_LEFT   (1 << 0)        /* Qube */
+# define COBALT_LED_BAR_RIGHT  (1 << 1)        /* Qube */
+# define COBALT_LED_WEB                (1 << 2)        /* RaQ */
+# define COBALT_LED_POWER_OFF  (1 << 3)        /* RaQ */
+# define COBALT_LED_RESET      0x0f
+
+#define COBALT_KEY_PORT                ((~*(volatile unsigned int *) CKSEG1ADDR(0x1d000000) >> 24) & COBALT_KEY_MASK)
+# define COBALT_KEY_CLEAR      (1 << 1)
+# define COBALT_KEY_LEFT       (1 << 2)
+# define COBALT_KEY_UP         (1 << 3)
+# define COBALT_KEY_DOWN       (1 << 4)
+# define COBALT_KEY_RIGHT      (1 << 5)
+# define COBALT_KEY_ENTER      (1 << 6)
+# define COBALT_KEY_SELECT     (1 << 7)
+# define COBALT_KEY_MASK       0xfe
+
+#endif /* __ASM_COBALT_H */

diff --git a/include/asm-mips/mach-cobalt/mach-gt64120.h b/include/asm-mips/mach-cobalt/mach-gt64120.h
new file mode 100644 (file)
index 0000000..587fc43
--- /dev/null
+++ b/include/asm-mips/mach-cobalt/mach-gt64120.h
@@ -0,0 +1 @@
+/* there's something here ... in the dark */