ath79: fix pinmux reg value for QCA956x

The range of pinmux reg property "<0x1804002c 0x40>" for QCA956x SoC
does not includes GPIO_FUNCTION register.

If the device uses "&jtag_disable_pins", this causes the following
errors:

[    1.982937] pinctrl-single 1804002c.pinmux: mux offset out of range: 0x40 (0x40)
[    1.990622] pinctrl-single 1804002c.pinmux: could not add functions for pinmux_jtag_disable_pins 64x

Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>

diff --git a/target/linux/ath79/dts/qca956x.dtsi b/target/linux/ath79/dts/qca956x.dtsi
index 248c001cd26bb97fff2a1f0e0aa26c1056fd04f0..b6f7dcaff3546d5445892b9e04031feb85deb5d7 100644 (file)
--- a/target/linux/ath79/dts/qca956x.dtsi
+++ b/target/linux/ath79/dts/qca956x.dtsi
@@ -71,7 +71,7 @@
                        pinmux: pinmux@1804002c {
                                compatible = "pinctrl-single";
 
-                               reg = <0x1804002c 0x40>;
+                               reg = <0x1804002c 0x44>;
 
                                #size-cells = <0>;