drm/nv50: clearer separation of the stages of evo init
authorBen Skeggs <bskeggs@redhat.com>
Tue, 19 Oct 2010 01:14:17 +0000 (11:14 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Fri, 3 Dec 2010 05:10:50 +0000 (15:10 +1000)
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drivers/gpu/drm/nouveau/nouveau_reg.h
drivers/gpu/drm/nouveau/nv50_display.c

index 1bbe7037cf99d8d321c6ac005c05802f96c60213..5e28bc63c41e1fb95c526a1db1378d3385172303 100644 (file)
 #define NV50_PDISPLAY_CURSOR_CURSOR_CTRL2_STATUS                     0x00030000
 #define NV50_PDISPLAY_CURSOR_CURSOR_CTRL2_STATUS_ACTIVE              0x00010000
 
-#define NV50_PDISPLAY_CTRL_STATE                                     0x00610300
-#define NV50_PDISPLAY_CTRL_STATE_PENDING                             0x80000000
-#define NV50_PDISPLAY_CTRL_STATE_METHOD                              0x00001ffc
-#define NV50_PDISPLAY_CTRL_STATE_ENABLE                              0x00000001
-#define NV50_PDISPLAY_CTRL_VAL                                       0x00610304
-#define NV50_PDISPLAY_UNK_380                                        0x00610380
-#define NV50_PDISPLAY_RAM_AMOUNT                                     0x00610384
-#define NV50_PDISPLAY_UNK_388                                        0x00610388
-#define NV50_PDISPLAY_UNK_38C                                        0x0061038c
+#define NV50_PDISPLAY_PIO_CTRL                                       0x00610300
+#define NV50_PDISPLAY_PIO_CTRL_PENDING                               0x80000000
+#define NV50_PDISPLAY_PIO_CTRL_MTHD                                  0x00001ffc
+#define NV50_PDISPLAY_PIO_CTRL_ENABLED                               0x00000001
+#define NV50_PDISPLAY_PIO_DATA                                       0x00610304
 
 #define NV50_PDISPLAY_CRTC_P(i, r)        ((i) * 0x540 + NV50_PDISPLAY_CRTC_##r)
 #define NV50_PDISPLAY_CRTC_C(i, r)    (4 + (i) * 0x540 + NV50_PDISPLAY_CRTC_##r)
index 7ac87efb791f66f2ff02e6f822b66a71e8dc30b0..7c9c7c5bf22a53ba9b0ac141c5492c5165faaa69 100644 (file)
@@ -225,6 +225,7 @@ nv50_display_init(struct drm_device *dev)
        NV_DEBUG_KMS(dev, "\n");
 
        nv_wr32(dev, 0x00610184, nv_rd32(dev, 0x00614004));
+
        /*
         * I think the 0x006101XX range is some kind of main control area
         * that enables things.
@@ -240,16 +241,19 @@ nv50_display_init(struct drm_device *dev)
                val = nv_rd32(dev, 0x0061610c + (i * 0x800));
                nv_wr32(dev, 0x0061019c + (i * 0x10), val);
        }
+
        /* DAC */
        for (i = 0; i < 3; i++) {
                val = nv_rd32(dev, 0x0061a000 + (i * 0x800));
                nv_wr32(dev, 0x006101d0 + (i * 0x04), val);
        }
+
        /* SOR */
        for (i = 0; i < nv50_sor_nr(dev); i++) {
                val = nv_rd32(dev, 0x0061c000 + (i * 0x800));
                nv_wr32(dev, 0x006101e0 + (i * 0x04), val);
        }
+
        /* EXT */
        for (i = 0; i < 3; i++) {
                val = nv_rd32(dev, 0x0061e000 + (i * 0x800));
@@ -276,6 +280,49 @@ nv50_display_init(struct drm_device *dev)
                }
        }
 
+       for (i = 0; i < 2; i++) {
+               nv_wr32(dev, NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(i), 0x2000);
+               if (!nv_wait(dev, NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(i),
+                            NV50_PDISPLAY_CURSOR_CURSOR_CTRL2_STATUS, 0)) {
+                       NV_ERROR(dev, "timeout: CURSOR_CTRL2_STATUS == 0\n");
+                       NV_ERROR(dev, "CURSOR_CTRL2 = 0x%08x\n",
+                                nv_rd32(dev, NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(i)));
+                       return -EBUSY;
+               }
+
+               nv_wr32(dev, NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(i),
+                       NV50_PDISPLAY_CURSOR_CURSOR_CTRL2_ON);
+               if (!nv_wait(dev, NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(i),
+                            NV50_PDISPLAY_CURSOR_CURSOR_CTRL2_STATUS,
+                            NV50_PDISPLAY_CURSOR_CURSOR_CTRL2_STATUS_ACTIVE)) {
+                       NV_ERROR(dev, "timeout: "
+                                     "CURSOR_CTRL2_STATUS_ACTIVE(%d)\n", i);
+                       NV_ERROR(dev, "CURSOR_CTRL2(%d) = 0x%08x\n", i,
+                                nv_rd32(dev, NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(i)));
+                       return -EBUSY;
+               }
+       }
+
+       nv_wr32(dev, NV50_PDISPLAY_OBJECTS, (evo->ramin->vinst >> 8) | 9);
+       nv_wr32(dev, NV50_PDISPLAY_PIO_CTRL, 0x00000000);
+       nv_wr32(dev, 0x610028, 0x00000000);
+       nv_mask(dev, NV50_PDISPLAY_INTR_0, 0x00000000, 0x00000000);
+       nv_mask(dev, NV50_PDISPLAY_INTR_1, 0x00000000, 0x00000000);
+       nv_wr32(dev, NV50_PDISPLAY_INTR_EN,
+                    NV50_PDISPLAY_INTR_EN_CLK_UNK10 |
+                    NV50_PDISPLAY_INTR_EN_CLK_UNK20 |
+                    NV50_PDISPLAY_INTR_EN_CLK_UNK40);
+
+       /* enable hotplug interrupts */
+       list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
+               struct nouveau_connector *conn = nouveau_connector(connector);
+
+               if (conn->dcb->gpio_tag == 0xff)
+                       continue;
+
+               pgpio->irq_enable(dev, conn->dcb->gpio_tag, true);
+       }
+
        /* taken from nv bug #12637, attempts to un-wedge the hw if it's
         * stuck in some unspecified state
         */
@@ -297,7 +344,6 @@ nv50_display_init(struct drm_device *dev)
                }
        }
 
-       nv_wr32(dev, NV50_PDISPLAY_CTRL_STATE, NV50_PDISPLAY_CTRL_STATE_ENABLE);
        nv_wr32(dev, NV50_PDISPLAY_CHANNEL_STAT(0), 0x1000b03);
        if (!nv_wait(dev, NV50_PDISPLAY_CHANNEL_STAT(0),
                     0x40000000, 0x40000000)) {
@@ -307,31 +353,6 @@ nv50_display_init(struct drm_device *dev)
                return -EBUSY;
        }
 
-       for (i = 0; i < 2; i++) {
-               nv_wr32(dev, NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(i), 0x2000);
-               if (!nv_wait(dev, NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(i),
-                            NV50_PDISPLAY_CURSOR_CURSOR_CTRL2_STATUS, 0)) {
-                       NV_ERROR(dev, "timeout: CURSOR_CTRL2_STATUS == 0\n");
-                       NV_ERROR(dev, "CURSOR_CTRL2 = 0x%08x\n",
-                                nv_rd32(dev, NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(i)));
-                       return -EBUSY;
-               }
-
-               nv_wr32(dev, NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(i),
-                       NV50_PDISPLAY_CURSOR_CURSOR_CTRL2_ON);
-               if (!nv_wait(dev, NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(i),
-                            NV50_PDISPLAY_CURSOR_CURSOR_CTRL2_STATUS,
-                            NV50_PDISPLAY_CURSOR_CURSOR_CTRL2_STATUS_ACTIVE)) {
-                       NV_ERROR(dev, "timeout: "
-                                     "CURSOR_CTRL2_STATUS_ACTIVE(%d)\n", i);
-                       NV_ERROR(dev, "CURSOR_CTRL2(%d) = 0x%08x\n", i,
-                                nv_rd32(dev, NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(i)));
-                       return -EBUSY;
-               }
-       }
-
-       nv_wr32(dev, NV50_PDISPLAY_OBJECTS, (evo->ramin->vinst >> 8) | 9);
-
        /* initialise fifo */
        nv_wr32(dev, NV50_PDISPLAY_CHANNEL_DMA_CB(0),
                ((evo->pushbuf_bo->bo.mem.start << PAGE_SHIFT) >> 8) |
@@ -350,7 +371,9 @@ nv50_display_init(struct drm_device *dev)
        nv_wr32(dev, NV50_PDISPLAY_USER_PUT(0), 0);
        nv_wr32(dev, NV50_PDISPLAY_CHANNEL_STAT(0), 0x01000003 |
                NV50_PDISPLAY_CHANNEL_STAT_DMA_ENABLED);
-       nv_wr32(dev, 0x610300, nv_rd32(dev, 0x610300) & ~1);
+
+       /* enable error reporting on the channel */
+       nv_mask(dev, 0x610028, 0x00000000, 0x00010001 << 0);
 
        evo->dma.max = (4096/4) - 2;
        evo->dma.put = 0;
@@ -382,21 +405,6 @@ nv50_display_init(struct drm_device *dev)
        if (!nv_wait(dev, 0x640004, 0xffffffff, evo->dma.put << 2))
                NV_ERROR(dev, "evo pushbuf stalled\n");
 
-       /* enable clock change interrupts. */
-       nv_wr32(dev, 0x610028, 0x00010001);
-       nv_wr32(dev, NV50_PDISPLAY_INTR_EN, (NV50_PDISPLAY_INTR_EN_CLK_UNK10 |
-                                            NV50_PDISPLAY_INTR_EN_CLK_UNK20 |
-                                            NV50_PDISPLAY_INTR_EN_CLK_UNK40));
-
-       /* enable hotplug interrupts */
-       list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
-               struct nouveau_connector *conn = nouveau_connector(connector);
-
-               if (conn->dcb->gpio_tag == 0xff)
-                       continue;
-
-               pgpio->irq_enable(dev, conn->dcb->gpio_tag, true);
-       }
 
        return 0;
 }
@@ -442,7 +450,6 @@ static int nv50_display_disable(struct drm_device *dev)
        }
 
        nv_wr32(dev, NV50_PDISPLAY_CHANNEL_STAT(0), 0);
-       nv_wr32(dev, NV50_PDISPLAY_CTRL_STATE, 0);
        if (!nv_wait(dev, NV50_PDISPLAY_CHANNEL_STAT(0), 0x1e0000, 0)) {
                NV_ERROR(dev, "timeout: (0x610200 & 0x1e0000) == 0\n");
                NV_ERROR(dev, "0x610200 = 0x%08x\n",