ARM: Clean up CONFIG_ARMV7_NONSEC/VIRT/PSCI conditions
authorJan Kiszka <jan.kiszka@siemens.com>
Tue, 21 Apr 2015 05:18:24 +0000 (07:18 +0200)
committerTom Warren <twarren@nvidia.com>
Wed, 13 May 2015 16:24:13 +0000 (09:24 -0700)
CONFIG_ARMV7_VIRT depends on CONFIG_ARMV7_NONSEC, thus doesn't need to
be taken into account additionally. CONFIG_ARMV7_PSCI is only set on
boards that support CONFIG_ARMV7_NONSEC, and it only works on those.

CC: Tang Yuantian <Yuantian.Tang@freescale.com>
CC: York Sun <yorksun@freescale.com>
CC: Steve Rae <srae@broadcom.com>
CC: Andre Przywara <andre.przywara@linaro.org>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Tested-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
arch/arm/cpu/armv7/Makefile
arch/arm/cpu/armv7/ls102xa/cpu.c
arch/arm/cpu/armv7/virt-dt.c
arch/arm/cpu/u-boot.lds
arch/arm/include/asm/armv7.h
arch/arm/lib/bootm-fdt.c
arch/arm/lib/bootm.c
board/armltd/vexpress/vexpress_common.c
board/broadcom/bcm_ep/board.c
board/freescale/common/arm_sleep.c

index e66c61e8ece7962b15b4a86e2b5aa3769ae0f734..5a761004069f320130bfa85e64915280444b75ab 100644 (file)
@@ -18,7 +18,7 @@ obj-y += lowlevel_init.o
 endif
 endif
 
-ifneq ($(CONFIG_ARMV7_NONSEC)$(CONFIG_ARMV7_VIRT),)
+ifneq ($(CONFIG_ARMV7_NONSEC),)
 obj-y  += nonsec_virt.o
 obj-y  += virt-v7.o
 obj-y  += virt-dt.o
index 1a640bbb9c2c642a4ad11ca8e5400e5263f6c266..75f0d8c7f794a1a6c6ad9e1d6a10fc9675581c54 100644 (file)
@@ -329,7 +329,7 @@ int arch_cpu_init(void)
        return 0;
 }
 
-#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT)
+#ifdef CONFIG_ARMV7_NONSEC
 /* Set the address at which the secondary core starts from.*/
 void smp_set_core_boot_addr(unsigned long addr, int corenr)
 {
index 9408e33203a1bb62ab4cfdefeebf8bcc379c87a4..caaaaabccd6956c762a51296006769b22e78877a 100644 (file)
@@ -90,7 +90,7 @@ static int fdt_psci(void *fdt)
 
 int psci_update_dt(void *fdt)
 {
-#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT)
+#ifdef CONFIG_ARMV7_NONSEC
        if (!armv7_boot_nonsec())
                return 0;
 #endif
index 7336162d804f0d0f55a5f0cdf1df9ff927ce683e..03cd9f60f943f496ad1a6d34feed614a1f6d1e1a 100644 (file)
@@ -25,7 +25,7 @@ SECTIONS
                *(.text*)
        }
 
-#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT) || defined(CONFIG_ARMV7_PSCI)
+#ifdef CONFIG_ARMV7_NONSEC
 
 #ifndef CONFIG_ARMV7_SECURE_BASE
 #define CONFIG_ARMV7_SECURE_BASE
index cbe7dc1a5c641701cea2051c9c5bee3072015179..33af8851bb76043010c485470a88a54c054840fc 100644 (file)
@@ -131,7 +131,7 @@ void v7_outer_cache_inval_all(void);
 void v7_outer_cache_flush_range(u32 start, u32 end);
 void v7_outer_cache_inval_range(u32 start, u32 end);
 
-#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT)
+#ifdef CONFIG_ARMV7_NONSEC
 
 int armv7_init_nonsec(void);
 bool armv7_boot_nonsec(void);
@@ -145,7 +145,7 @@ void _smp_pen(void);
 extern char __secure_start[];
 extern char __secure_end[];
 
-#endif /* CONFIG_ARMV7_NONSEC || CONFIG_ARMV7_VIRT */
+#endif /* CONFIG_ARMV7_NONSEC */
 
 void v7_arch_cp15_set_l2aux_ctrl(u32 l2auxctrl, u32 cpu_midr,
                                 u32 cpu_rev_comb, u32 cpu_variant,
index 665a3bc37fadb7c42fe6981f6f7bcf4b1360362a..49ba6916398c5a80342160e663f06003bd6524b1 100644 (file)
@@ -34,7 +34,7 @@ int arch_fixup_fdt(void *blob)
        }
 
        ret = fdt_fixup_memory_banks(blob, start, size, CONFIG_NR_DRAM_BANKS);
-#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT)
+#ifdef CONFIG_ARMV7_NONSEC
        if (ret)
                return ret;
 
index b1bff8ce265d771f6bbc293f60175e71c8079bbc..ee56d7403e93379b056bb8379c8153d48a79c187 100644 (file)
@@ -26,7 +26,7 @@
 #include <bootm.h>
 #include <vxworks.h>
 
-#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT)
+#ifdef CONFIG_ARMV7_NONSEC
 #include <asm/armv7.h>
 #endif
 
@@ -238,7 +238,7 @@ static void boot_prep_linux(bootm_headers_t *images)
        }
 }
 
-#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT)
+#ifdef CONFIG_ARMV7_NONSEC
 bool armv7_boot_nonsec(void)
 {
        char *s = getenv("bootm_boot_mode");
@@ -305,7 +305,7 @@ static void boot_jump_linux(bootm_headers_t *images, int flag)
                r2 = gd->bd->bi_boot_params;
 
        if (!fake) {
-#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT)
+#ifdef CONFIG_ARMV7_NONSEC
                if (armv7_boot_nonsec()) {
                        armv7_init_nonsec();
                        secure_ram_addr(_do_nonsec_entry)(kernel_entry,
index cb2de2f4ddc954f884612430e1edeb9396046d00..d3b3b31924fb3848218e6cf22d5a2056cfdc0241 100644 (file)
@@ -181,7 +181,7 @@ ulong get_board_rev(void){
        return readl((u32 *)SYS_ID);
 }
 
-#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT)
+#ifdef CONFIG_ARMV7_NONSEC
 /* Setting the address at which secondary cores start from.
  * Versatile Express uses one address for all cores, so ignore corenr
  */
index 6a70a2e3056007a38958e0df03d63e75a6c9879b..eaad0b3d98f64d7cde65b9047618b32adbc4d79e 100644 (file)
@@ -54,7 +54,7 @@ int board_early_init_f(void)
        return status;
 }
 
-#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT)
+#ifdef CONFIG_ARMV7_NONSEC
 void smp_set_core_boot_addr(unsigned long addr, int corenr)
 {
 }
index c06b86291a3958cabbfcee83f27b58be9f058811..8e8b7fa204ffa9ab2dd85b6f3f68bba8c3623a41 100644 (file)
@@ -6,7 +6,7 @@
 
 #include <common.h>
 #include <asm/io.h>
-#if !defined(CONFIG_ARMV7_NONSEC) || !defined(CONFIG_ARMV7_VIRT)
+#ifndef CONFIG_ARMV7_NONSEC
 #error " Deep sleep needs non-secure mode support. "
 #else
 #include <asm/secure.h>