FEATURES:=squashfs gpio
KERNEL_PATCHVER:=5.4
-KERNEL_TESTING_PATCHVER:=5.4
+KERNEL_TESTING_PATCHVER:=5.10
define Target/Description
Build firmware images for Ralink RT288x/RT3xxx based boards.
{
const __be32 *_phy_addr = NULL;
struct phy_device *phydev;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 10, 0)
int phy_mode;
+#else
+ phy_interface_t phy_mode = PHY_INTERFACE_MODE_NA;
+#endif
_phy_addr = of_get_property(phy_node, "reg", NULL);
return -EINVAL;
}
+#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 10, 0)
phy_mode = of_get_phy_mode(phy_node);
if (phy_mode < 0) {
+#else
+ of_get_phy_mode(phy_node, &phy_mode);
+ if (phy_mode == PHY_INTERFACE_MODE_NA) {
+#endif
dev_err(priv->dev, "incorrect phy-mode %d\n", phy_mode);
priv->phy->phy_node[port] = NULL;
return -EINVAL;
const __be32 *id = of_get_property(np, "reg", NULL);
const __be32 *link;
int size;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 10, 0)
int phy_mode;
+#else
+ phy_interface_t phy_mode = PHY_INTERFACE_MODE_NA;
+#endif
if (!id || (be32_to_cpu(*id) != 0)) {
pr_err("%s: invalid port id\n", np->name);
return;
}
+#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 10, 0)
phy_mode = of_get_phy_mode(np);
+#else
+ of_get_phy_mode(np, &phy_mode);
+#endif
switch (phy_mode) {
case PHY_INTERFACE_MODE_RGMII:
break;
return rx_done;
}
+#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 10, 0)
static void fe_tx_timeout(struct net_device *dev)
+#else
+static void fe_tx_timeout(struct net_device *dev, unsigned int txqueue)
+#endif
{
struct fe_priv *priv = netdev_priv(dev);
struct fe_tx_ring *ring = &priv->tx_ring;
struct mt7620_gsw *gsw = (struct mt7620_gsw *)priv->soc->swpriv;
const __be32 *_id = of_get_property(np, "reg", NULL);
const __be32 *phy_addr;
- int phy_mode, size, id;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 10, 0)
+ int phy_mode;
+#else
+ phy_interface_t phy_mode = PHY_INTERFACE_MODE_NA;
+#endif
+ int size, id;
int shift = 12;
u32 val, mask = 0;
u32 val_delay = 0;
return;
}
+#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 10, 0)
phy_mode = of_get_phy_mode(np);
+#else
+ of_get_phy_mode(np, &phy_mode);
+#endif
switch (phy_mode) {
case PHY_INTERFACE_MODE_RGMII:
mask = 0;
--- a/drivers/net/ethernet/Kconfig
+++ b/drivers/net/ethernet/Kconfig
-@@ -159,6 +159,7 @@ source "drivers/net/ethernet/pasemi/Kcon
+@@ -158,6 +158,7 @@ source "drivers/net/ethernet/pasemi/Kcon
source "drivers/net/ethernet/pensando/Kconfig"
source "drivers/net/ethernet/qlogic/Kconfig"
source "drivers/net/ethernet/qualcomm/Kconfig"
source "drivers/net/ethernet/renesas/Kconfig"
--- a/drivers/net/ethernet/Makefile
+++ b/drivers/net/ethernet/Makefile
-@@ -72,6 +72,7 @@ obj-$(CONFIG_NET_VENDOR_PACKET_ENGINES)
+@@ -71,6 +71,7 @@ obj-$(CONFIG_NET_VENDOR_PACKET_ENGINES)
obj-$(CONFIG_NET_VENDOR_PASEMI) += pasemi/
obj-$(CONFIG_NET_VENDOR_QLOGIC) += qlogic/
obj-$(CONFIG_NET_VENDOR_QUALCOMM) += qualcomm/
--- a/arch/mips/ralink/Kconfig
+++ b/arch/mips/ralink/Kconfig
@@ -57,6 +57,7 @@ choice
- select COMMON_CLK
select CLKSRC_MIPS_GIC
select HAVE_PCI if PCI_MT7621
+ select SOC_BUS
+ select WEAK_REORDERING_BEYOND_LLSC
endchoice
--- /dev/null
+--- a/drivers/staging/mt7621-pci-phy/Kconfig
++++ b/drivers/staging/mt7621-pci-phy/Kconfig
+@@ -3,6 +3,7 @@ config PCI_MT7621_PHY
+ tristate "MediaTek MT7621 PCI PHY Driver"
+ depends on RALINK && OF
+ select GENERIC_PHY
++ select REGMAP_MMIO
+ help
+ Say 'Y' here to add support for MediaTek MT7621 PCI PHY driver,
+
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
-@@ -287,6 +287,8 @@ static unsigned long __init init_initrd(
+@@ -249,6 +249,8 @@ static unsigned long __init init_initrd(
* Initialize the bootmem allocator. It also setup initrd related data
* if needed.
*/
+static int usermem __initdata;
+
- #if defined(CONFIG_SGI_IP27) || (defined(CONFIG_CPU_LOONGSON3) && defined(CONFIG_NUMA))
+ #if defined(CONFIG_SGI_IP27) || (defined(CONFIG_CPU_LOONGSON64) && defined(CONFIG_NUMA))
static void __init bootmem_init(void)
-@@ -325,7 +327,7 @@ static void __init bootmem_init(void)
+@@ -288,7 +290,7 @@ static void __init bootmem_init(void)
/*
* Reserve any memory between the start of RAM and PHYS_OFFSET
*/
memblock_reserve(PHYS_OFFSET, ramstart - PHYS_OFFSET);
if (PFN_UP(ramstart) > ARCH_PFN_OFFSET) {
-@@ -386,8 +388,6 @@ static void __init bootmem_init(void)
+@@ -336,8 +338,6 @@ static void __init bootmem_init(void)
#endif /* CONFIG_SGI_IP27 */
bool
--- a/arch/mips/kernel/cevt-r4k.c
+++ b/arch/mips/kernel/cevt-r4k.c
-@@ -15,6 +15,26 @@
+@@ -16,6 +16,31 @@
#include <asm/time.h>
#include <asm/cevt-r4k.h>
++#ifdef CONFIG_CEVT_SYSTICK_QUIRK
+static int mips_state_oneshot(struct clock_event_device *evt)
+{
++ unsigned long flags = IRQF_PERCPU | IRQF_TIMER | IRQF_SHARED;
+ if (!cp0_timer_irq_installed) {
+ cp0_timer_irq_installed = 1;
-+ setup_irq(evt->irq, &c0_compare_irqaction);
++ if (request_irq(evt->irq, c0_compare_interrupt, flags, "timer",
++ c0_compare_interrupt))
++ pr_err("Failed to request irq %d (timer)\n", evt->irq);
+ }
+
+ return 0;
+{
+ if (cp0_timer_irq_installed) {
+ cp0_timer_irq_installed = 0;
-+ remove_irq(evt->irq, &c0_compare_irqaction);
++ free_irq(evt->irq, NULL);
+ }
+
+ return 0;
+}
++#endif
+
static int mips_next_event(unsigned long delta,
struct clock_event_device *evt)
{
-@@ -281,17 +301,21 @@ int r4k_clockevent_init(void)
+@@ -296,7 +321,9 @@ core_initcall(r4k_register_cpufreq_notif
+
+ int r4k_clockevent_init(void)
+ {
++#ifndef CONFIG_CEVT_SYSTICK_QUIRK
+ unsigned long flags = IRQF_PERCPU | IRQF_TIMER | IRQF_SHARED;
++#endif
+ unsigned int cpu = smp_processor_id();
+ struct clock_event_device *cd;
+ unsigned int irq, min_delta;
+@@ -326,11 +353,16 @@ int r4k_clockevent_init(void)
cd->rating = 300;
cd->irq = irq;
cd->cpumask = cpumask_of(cpu);
++#ifdef CONFIG_CEVT_SYSTICK_QUIRK
+ cd->set_state_shutdown = mips_state_shutdown;
+ cd->set_state_oneshot = mips_state_oneshot;
++#endif
cd->set_next_event = mips_next_event;
cd->event_handler = mips_event_handler;
if (cp0_timer_irq_installed)
return 0;
- cp0_timer_irq_installed = 1;
-
- setup_irq(irq, &c0_compare_irqaction);
+@@ -339,6 +371,7 @@ int r4k_clockevent_init(void)
+ if (request_irq(irq, c0_compare_interrupt, flags, "timer",
+ c0_compare_interrupt))
+ pr_err("Failed to request irq %d (timer)\n", irq);
+#endif
return 0;
.features = CLOCK_EVT_FEAT_ONESHOT,
.set_next_event = systick_next_event,
.set_state_shutdown = systick_shutdown,
-@@ -95,9 +136,15 @@ static int systick_shutdown(struct clock
- sdev = container_of(evt, struct systick_device, dev);
-
+@@ -91,7 +132,13 @@ static int systick_shutdown(struct clock
if (sdev->irq_requested)
-- free_irq(systick.dev.irq, &systick_irqaction);
-+ remove_irq(systick.dev.irq, &systick_irqaction);
+ free_irq(systick.dev.irq, &systick.dev);
sdev->irq_requested = 0;
- iowrite32(0, systick.membase + SYSTICK_CONFIG);
+ iowrite32(CFG_CNT_EN, systick.membase + SYSTICK_CONFIG);
return 0;
}
-@@ -117,34 +164,48 @@ static int systick_set_oneshot(struct cl
+@@ -116,33 +163,46 @@ static int systick_set_oneshot(struct cl
return 0;
}
+
static int __init ralink_systick_init(struct device_node *np)
{
+- int ret;
+ const struct of_device_id *match;
+ int rating = 200;
- int ret;
systick.membase = of_iomap(np, 0);
if (!systick.membase)
return -ENXIO;
-- systick_irqaction.name = np->name;
- systick.dev.name = np->name;
- clockevents_calc_mult_shift(&systick.dev, SYSTICK_FREQ, 60);
- systick.dev.max_delta_ns = clockevent_delta2ns(0x7fff, &systick.dev);
- return ret;
-
- clockevents_register_device(&systick.dev);
-+ systick_irqaction.name = np->name;
+ systick.dev.name = np->name;
+ systick.dev.rating = rating;
+ systick.dev.cpumask = cpumask_of(0);
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
-@@ -571,8 +571,28 @@ static int __init bootcmdline_scan_chose
- return 1;
- }
+@@ -542,8 +542,28 @@ static int __init bootcmdline_scan_chose
+
+ #endif /* CONFIG_OF_EARLY_FLATTREE */
+static int __init bootcmdline_scan_chosen_override(unsigned long node, const char *uname,
+ int depth, void *data)
+ return 1;
+}
+
- static void __init bootcmdline_init(char **cmdline_p)
+ static void __init bootcmdline_init(void)
{
+ bool dt_bootargs_override = false;
bool dt_bootargs = false;
/*
-@@ -586,6 +606,14 @@ static void __init bootcmdline_init(char
+@@ -557,6 +577,14 @@ static void __init bootcmdline_init(void
}
/*
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
-@@ -723,8 +723,6 @@ static void __init arch_mem_init(char **
- memblock_reserve(crashk_res.start,
- crashk_res.end - crashk_res.start + 1);
+@@ -694,8 +694,6 @@ static void __init arch_mem_init(char **
+ if (crashk_res.start != crashk_res.end)
+ memblock_reserve(crashk_res.start, resource_size(&crashk_res));
#endif
- device_tree_init();
-
/*
* In order to reduce the possibility of kernel panic when failed to
* get IO TLB memory under CONFIG_SWIOTLB, it is better to allocate
-@@ -841,6 +839,7 @@ void __init setup_arch(char **cmdline_p)
+@@ -815,6 +813,7 @@ void __init setup_arch(char **cmdline_p)
cpu_cache_init();
paging_init();
if (c > 0)
--- a/arch/mips/ralink/mt7621.c
+++ b/arch/mips/ralink/mt7621.c
-@@ -13,6 +13,7 @@
+@@ -15,6 +15,7 @@
#include <asm/mips-cps.h>
#include <asm/mach-ralink/ralink_regs.h>
#include <asm/mach-ralink/mt7621.h>
#include <pinmux.h>
-@@ -160,6 +161,20 @@ void __init ralink_of_remap(void)
- panic("Failed to remap core resources");
+@@ -146,6 +147,20 @@ static void soc_dev_init(struct ralink_s
+ }
}
+bool plat_cpu_core_present(int core)
--- a/arch/mips/ralink/mt7621.c
+++ b/arch/mips/ralink/mt7621.c
-@@ -7,6 +7,7 @@
-
- #include <linux/kernel.h>
+@@ -9,6 +9,7 @@
#include <linux/init.h>
+ #include <linux/slab.h>
+ #include <linux/sys_soc.h>
+#include <linux/jiffies.h>
#include <asm/mipsregs.h>
#include <asm/smp-ops.h>
-@@ -14,6 +15,7 @@
+@@ -16,6 +17,7 @@
#include <asm/mach-ralink/ralink_regs.h>
#include <asm/mach-ralink/mt7621.h>
#include <asm/mips-boards/launch.h>
#include <pinmux.h>
-@@ -175,6 +177,58 @@ bool plat_cpu_core_present(int core)
+@@ -161,6 +163,58 @@ bool plat_cpu_core_present(int core)
return true;
}
void __iomem *sysc = (void __iomem *) KSEG1ADDR(MT7621_SYSC_BASE);
--- a/arch/mips/ralink/Kconfig
+++ b/arch/mips/ralink/Kconfig
-@@ -58,6 +58,7 @@ choice
- select CLKSRC_MIPS_GIC
+@@ -63,6 +63,7 @@ choice
select HAVE_PCI if PCI_MT7621
+ select SOC_BUS
select WEAK_REORDERING_BEYOND_LLSC
+ select GENERIC_CLOCKEVENTS_BROADCAST
endchoice
#define MT7621_DDR2_SIZE_MAX 256
--- a/arch/mips/ralink/mt7621.c
+++ b/arch/mips/ralink/mt7621.c
-@@ -8,6 +8,10 @@
- #include <linux/kernel.h>
- #include <linux/init.h>
+@@ -10,6 +10,10 @@
+ #include <linux/slab.h>
+ #include <linux/sys_soc.h>
#include <linux/jiffies.h>
+#include <linux/clk.h>
+#include <linux/clkdev.h>
#include <asm/mipsregs.h>
#include <asm/smp-ops.h>
-@@ -16,16 +20,12 @@
+@@ -18,6 +22,7 @@
#include <asm/mach-ralink/mt7621.h>
#include <asm/mips-boards/launch.h>
#include <asm/delay.h>
#include <pinmux.h>
- #include "common.h"
-
--#define SYSC_REG_SYSCFG 0x10
--#define SYSC_REG_CPLL_CLKCFG0 0x2c
--#define SYSC_REG_CUR_CLK_STS 0x44
--#define CPU_CLK_SEL (BIT(30) | BIT(31))
--
- #define MT7621_GPIO_MODE_UART1 1
- #define MT7621_GPIO_MODE_I2C 2
- #define MT7621_GPIO_MODE_UART3_MASK 0x3
-@@ -111,49 +111,89 @@ static struct rt2880_pmx_group mt7621_pi
+@@ -108,11 +113,89 @@ static struct rt2880_pmx_group mt7621_pi
{ 0 }
};
panic("Cannot detect cpc address");
}
--void __init ralink_clk_init(void)
+static struct clk *__init mt7621_add_sys_clkdev(
+ const char *id, unsigned long rate)
- {
-- int cpu_fdiv = 0;
-- int cpu_ffrac = 0;
-- int fbdiv = 0;
-- u32 clk_sts, syscfg;
-- u8 clk_sel = 0, xtal_mode;
-- u32 cpu_clk;
++{
+ struct clk *clk;
+ int err;
+
+ err = clk_register_clkdev(clk, id, NULL);
+ if (err)
+ panic("unable to register %s clock device", id);
-
-- if ((rt_sysc_r32(SYSC_REG_CPLL_CLKCFG0) & CPU_CLK_SEL) != 0)
-- clk_sel = 1;
++
+ return clk;
+}
+
+ xtal_clk = 40 * 1000 * 1000;
+ else
+ xtal_clk = 25 * 1000 * 1000;
-
- switch (clk_sel) {
- case 0:
-- clk_sts = rt_sysc_r32(SYSC_REG_CUR_CLK_STS);
-- cpu_fdiv = ((clk_sts >> 8) & 0x1F);
-- cpu_ffrac = (clk_sts & 0x1F);
-- cpu_clk = (500 * cpu_ffrac / cpu_fdiv) * 1000 * 1000;
++
++ switch (clk_sel) {
++ case 0:
+ cpu_clk = 500 * 1000 * 1000;
- break;
--
- case 1:
-- fbdiv = ((rt_sysc_r32(0x648) >> 4) & 0x7F) + 1;
-- syscfg = rt_sysc_r32(SYSC_REG_SYSCFG);
-- xtal_mode = (syscfg >> 6) & 0x7;
-- if (xtal_mode >= 6) {
-- /* 25Mhz Xtal */
-- cpu_clk = 25 * fbdiv * 1000 * 1000;
-- } else if (xtal_mode >= 3) {
-- /* 40Mhz Xtal */
-- cpu_clk = 40 * fbdiv * 1000 * 1000;
-- } else {
-- /* 20Mhz Xtal */
-- cpu_clk = 20 * fbdiv * 1000 * 1000;
-- }
++ break;
++ case 1:
+ pll = rt_memc_r32(MEMC_REG_CPU_PLL);
+ fbdiv = (pll >> CPU_PLL_FBDIV_SHIFT) & CPU_PLL_FBDIV_MASK;
+ prediv = (pll >> CPU_PLL_PREDIV_SHIFT) & CPU_PLL_PREDIV_MASK;
+ cpu_clk = ((fbdiv + 1) * xtal_clk) >> prediv_tbl[prediv];
- break;
++ break;
+ default:
+ cpu_clk = xtal_clk;
- }
++ }
+
+ cpu_clk = cpu_clk / ffiv * ffrac;
+ bus_clk = cpu_clk / 4;
+
+ pr_info("CPU Clock: %dMHz\n", cpu_clk / 1000000);
+ mips_hpt_frequency = cpu_clk / 2;
- }
-
++}
++
+static void __init mt7621_clocks_init_dt(struct device_node *np)
+{
+ of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
+}
+
-+CLK_OF_DECLARE(ar7100, "mediatek,mt7621-pll", mt7621_clocks_init_dt);
++CLK_OF_DECLARE(mt7621, "mediatek,mt7621-pll", mt7621_clocks_init_dt);
+
void __init ralink_of_remap(void)
{
@@ -9,14 +9,14 @@
#include <linux/of.h>
- #include <linux/clk-provider.h>
+ #include <linux/of_clk.h>
-#include <linux/clocksource.h>
+#include <asm/time.h>
#define MT7621_CHIP_NAME1 0x20203132
--- a/arch/mips/ralink/mt7621.c
+++ b/arch/mips/ralink/mt7621.c
-@@ -13,6 +13,7 @@
+@@ -10,11 +10,13 @@
+ #include <linux/slab.h>
+ #include <linux/sys_soc.h>
+ #include <linux/jiffies.h>
++#include <linux/memblock.h>
+ #include <linux/clk.h>
+ #include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <dt-bindings/clock/mt7621-clk.h>
#include <asm/mipsregs.h>
#include <asm/smp-ops.h>
#include <asm/mips-cps.h>
-@@ -55,6 +56,8 @@
+@@ -57,6 +59,8 @@
#define MT7621_GPIO_MODE_SDHCI_SHIFT 18
#define MT7621_GPIO_MODE_SDHCI_GPIO 1
static struct rt2880_pmx_func uart1_grp[] = { FUNC("uart1", 0, 1, 2) };
static struct rt2880_pmx_func i2c_grp[] = { FUNC("i2c", 0, 3, 2) };
static struct rt2880_pmx_func uart3_grp[] = {
-@@ -139,6 +142,28 @@ static struct clk *__init mt7621_add_sys
+@@ -141,6 +145,26 @@ static struct clk *__init mt7621_add_sys
return clk;
}
+ phys_addr_t size;
+
+ for (size = 32 * SZ_1M; size < 256 * SZ_1M; size <<= 1) {
-+ if (!memcmp(dm, dm + size, sizeof(detect_magic)))
++ if (!__builtin_memcmp(dm, dm + size, sizeof(detect_magic)))
+ break;
+ }
+
+ if ((size == 256 * SZ_1M) &&
+ (CPHYSADDR(dm + size) < MT7621_LOWMEM_MAX_SIZE) &&
-+ memcmp(dm, dm + size, sizeof(detect_magic))) {
-+ add_memory_region(MT7621_LOWMEM_BASE, MT7621_LOWMEM_MAX_SIZE,
-+ BOOT_MEM_RAM);
-+ add_memory_region(MT7621_HIGHMEM_BASE, MT7621_HIGHMEM_SIZE,
-+ BOOT_MEM_RAM);
++ __builtin_memcmp(dm, dm + size, sizeof(detect_magic))) {
++ memblock_add(MT7621_LOWMEM_BASE, MT7621_LOWMEM_MAX_SIZE);
++ memblock_add(MT7621_HIGHMEM_BASE, MT7621_HIGHMEM_SIZE);
+ } else {
-+ add_memory_region(MT7621_LOWMEM_BASE, size, BOOT_MEM_RAM);
++ memblock_add(MT7621_LOWMEM_BASE, size);
+ }
+}
+
void __init ralink_clk_init(void)
{
u32 syscfg, xtal_sel, clkcfg, clk_sel, curclk, ffiv, ffrac;
-@@ -317,10 +342,7 @@ void prom_soc_init(struct ralink_soc_inf
+@@ -346,10 +370,7 @@ void prom_soc_init(struct ralink_soc_inf
(rev >> CHIP_REV_VER_SHIFT) & CHIP_REV_VER_MASK,
(rev & CHIP_REV_ECO_MASK));
+ soc_info->mem_detect = mt7621_memory_detect;
rt2880_pinmux_data = mt7621_pinmux_data;
-
+ soc_dev_init(soc_info, rev);
--- a/arch/mips/ralink/common.h
+++ b/arch/mips/ralink/common.h
@@ -17,6 +17,7 @@ struct ralink_soc_info {
--- a/arch/mips/ralink/of.c
+++ b/arch/mips/ralink/of.c
-@@ -87,6 +87,8 @@ void __init plat_mem_setup(void)
+@@ -85,6 +85,8 @@ void __init plat_mem_setup(void)
of_scan_flat_dt(early_init_dt_find_memory, NULL);
if (memory_dtb)
of_scan_flat_dt(early_init_dt_scan_memory, NULL);
+ else if (soc_info.mem_detect)
+ soc_info.mem_detect();
else if (soc_info.mem_size)
- add_memory_region(soc_info.mem_base, soc_info.mem_size * SZ_1M,
- BOOT_MEM_RAM);
+ memblock_add(soc_info.mem_base, soc_info.mem_size * SZ_1M);
+ else
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
-@@ -391,6 +391,14 @@ config MTD_NAND_QCOM
+@@ -387,6 +387,14 @@ config MTD_NAND_QCOM
Enables support for NAND flash chips on SoCs containing the EBI2 NAND
controller. This controller is found on IPQ806x SoC.
depends on ARCH_MEDIATEK || COMPILE_TEST
--- a/drivers/mtd/nand/raw/Makefile
+++ b/drivers/mtd/nand/raw/Makefile
-@@ -52,6 +52,7 @@ obj-$(CONFIG_MTD_NAND_SUNXI) += sunxi_n
+@@ -51,6 +51,7 @@ obj-$(CONFIG_MTD_NAND_SUNXI) += sunxi_n
obj-$(CONFIG_MTD_NAND_HISI504) += hisi504_nand.o
obj-$(CONFIG_MTD_NAND_BRCMNAND) += brcmnand/
obj-$(CONFIG_MTD_NAND_QCOM) += qcom_nandc.o
obj-$(CONFIG_MTD_NAND_TEGRA) += tegra_nand.o
--- /dev/null
+++ b/drivers/mtd/nand/raw/mt7621_nand.c
-@@ -0,0 +1,1350 @@
+@@ -0,0 +1,1353 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * MediaTek MT7621 NAND Flash Controller driver
+ return 0;
+}
+
-+static int mt7621_nfc_setup_data_interface(struct nand_chip *nand, int csline,
-+ const struct nand_data_interface *conf)
++static int mt7621_nfc_setup_interface(struct nand_chip *nand, int csline,
++ const struct nand_interface_config *conf)
+{
+ struct mt7621_nfc *nfc = nand_get_controller_data(nand);
+ const struct nand_sdr_timings *timings;
+ int ecc_cap;
+
+ /* Only hardware ECC mode is supported */
-+ if (nand->ecc.mode != NAND_ECC_HW_SYNDROME) {
++ if (nand->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST) {
+ dev_err(nfc->dev, "Only hardware ECC mode is supported\n");
+ return -EINVAL;
+ }
+static const struct nand_controller_ops mt7621_nfc_controller_ops = {
+ .attach_chip = mt7621_nfc_attach_chip,
+ .exec_op = mt7621_nfc_exec_op,
-+ .setup_data_interface = mt7621_nfc_setup_data_interface,
++ .setup_interface = mt7621_nfc_setup_interface,
+};
+
+static int mt7621_nfc_ooblayout_free(struct mtd_info *mtd, int section,
+ nand_set_controller_data(nand, (void *)nfc);
+ nand_set_flash_node(nand, nfc->dev->of_node);
+
-+ nand->options |= NAND_USE_BOUNCE_BUFFER | NAND_NO_SUBPAGE_WRITE;
++ nand->options |= NAND_USES_DMA | NAND_NO_SUBPAGE_WRITE;
+ if (!nfc->nfi_clk)
+ nand->options |= NAND_KEEP_TIMINGS;
+
-+ nand->ecc.mode = NAND_ECC_HW_SYNDROME;
++ nand->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
+ nand->ecc.read_page = mt7621_nfc_read_page_hwecc;
+ nand->ecc.read_page_raw = mt7621_nfc_read_page_raw;
+ nand->ecc.write_page = mt7621_nfc_write_page_hwecc;
+ ret = mtd_device_register(mtd, NULL, 0);
+ if (ret) {
+ dev_err(nfc->dev, "Failed to register MTD: %d\n", ret);
-+ nand_release(nand);
++ nand_cleanup(nand);
+ return ret;
+ }
+
+static int mt7621_nfc_remove(struct platform_device *pdev)
+{
+ struct mt7621_nfc *nfc = platform_get_drvdata(pdev);
++ struct nand_chip *nand = &nfc->nand;
++ struct mtd_info *mtd = nand_to_mtd(nand);
+
-+ nand_release(&nfc->nand);
++ mtd_device_unregister(mtd);
++ nand_cleanup(nand);
+ clk_disable_unprepare(nfc->nfi_clk);
+
+ return 0;
---- a/drivers/mtd/spi-nor/spi-nor.c
-+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -2303,6 +2303,11 @@ static const struct flash_info spi_nor_i
- SPI_NOR_4B_OPCODES | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
- .fixups = &gd25q256_fixups,
- },
-+ {
-+ "gd25q512", INFO(0xc84020, 0, 64 * 1024, 1024,
-+ SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
-+ SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4B_OPCODES)
-+ },
+--- a/drivers/mtd/spi-nor/gigadevice.c
++++ b/drivers/mtd/spi-nor/gigadevice.c
+@@ -53,6 +53,9 @@ static const struct flash_info gigadevic
+ SPI_NOR_4B_OPCODES | SPI_NOR_HAS_LOCK |
+ SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6)
+ .fixups = &gd25q256_fixups },
++ { "gd25q512", INFO(0xc84020, 0, 64 * 1024, 1024,
++ SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
++ SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4B_OPCODES) },
+ };
- /* Intel/Numonyx -- xxxs33b */
- { "160s33b", INFO(0x898911, 0, 64 * 1024, 32, 0) },
+ const struct spi_nor_manufacturer spi_nor_gigadevice = {
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -2922,6 +2922,7 @@ static const struct net_device_ops mtk_n
+@@ -2901,6 +2901,7 @@ static const struct net_device_ops mtk_n
static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np)
{
+ const char *name = of_get_property(np, "label", NULL);
const __be32 *_id = of_get_property(np, "reg", NULL);
+ phy_interface_t phy_mode;
struct phylink *phylink;
- int phy_mode, id, err;
-@@ -3014,6 +3015,9 @@ static int mtk_add_mac(struct mtk_eth *e
+@@ -2993,6 +2994,9 @@ static int mtk_add_mac(struct mtk_eth *e
eth->netdev[id]->max_mtu = MTK_MAX_RX_LENGTH - MTK_RX_ETH_HLEN;
--- a/drivers/net/phy/at803x.c
+++ b/drivers/net/phy/at803x.c
-@@ -14,6 +14,8 @@
- #include <linux/etherdevice.h>
- #include <linux/of_gpio.h>
- #include <linux/gpio/consumer.h>
+@@ -20,6 +20,8 @@
+ #include <linux/regulator/driver.h>
+ #include <linux/regulator/consumer.h>
+ #include <dt-bindings/net/qca-ar803x.h>
+#include <linux/sfp.h>
+#include <linux/phylink.h>
- #define AT803X_SPECIFIC_STATUS 0x11
- #define AT803X_SS_SPEED_MASK (3 << 14)
-@@ -53,9 +55,18 @@
+ #define AT803X_SPECIFIC_FUNCTION_CONTROL 0x10
+ #define AT803X_SFC_ASSERT_CRS BIT(11)
+@@ -83,9 +85,18 @@
#define AT803X_MODE_CFG_MASK 0x0F
#define AT803X_MODE_CFG_SGMII 0x01
#define AT803X_DEBUG_REG_0 0x00
#define AT803X_DEBUG_RX_CLK_DLY_EN BIT(15)
-@@ -243,10 +254,72 @@ static int at803x_resume(struct phy_devi
- return phy_modify(phydev, MII_BMCR, BMCR_PDOWN | BMCR_ISOLATE, 0);
+@@ -505,10 +516,72 @@ static int at803x_parse_dt(struct phy_de
+ return 0;
}
+static int at803x_mode(struct phy_device *phydev)
priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
-@@ -394,6 +467,10 @@ static int at803x_read_status(struct phy
+@@ -709,6 +782,10 @@ static int at803x_read_status(struct phy
{
int ss, err, old_link = phydev->link;
/* Update the link, but return if there was an error */
err = genphy_update_link(phydev);
if (err)
-@@ -448,6 +525,19 @@ static int at803x_read_status(struct phy
- return 0;
- }
+@@ -809,6 +886,12 @@ static int at803x_config_aneg(struct phy
+ {
+ int ret;
-+static int at803x_config_aneg(struct phy_device *phydev)
-+{
+ /* Handle (Fiber) SerDes to RGMII mode */
+ if (at803x_mode(phydev) == AT803X_MODE_FIBER) {
+ pr_warn("%s: fiber\n", __func__);
+ return genphy_c37_config_aneg(phydev);
+ }
+
-+ pr_warn("%s: enter\n", __func__);
-+
-+ return genphy_config_aneg(phydev);
-+}
-+
- static struct phy_driver at803x_driver[] = {
- {
- /* ATHEROS 8035 */
-@@ -491,6 +581,7 @@ static struct phy_driver at803x_driver[]
+ ret = at803x_config_mdix(phydev, phydev->mdix_ctrl);
+ if (ret < 0)
+ return ret;
+@@ -1120,6 +1203,7 @@ static struct phy_driver at803x_driver[]
.suspend = at803x_suspend,
.resume = at803x_resume,
/* PHY_GBIT_FEATURES */
--- /dev/null
+From ffbb1b37a3e1ce1a5c574a6bd4f5aede8bc468ac Mon Sep 17 00:00:00 2001
+From: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>
+Date: Sat, 27 Feb 2021 20:20:07 -0800
+Subject: [PATCH] Revert "net: phy: simplify phy_link_change arguments"
+
+This reverts commit a307593a644443db12888f45eed0dafb5869e2cc.
+
+This brings back the do_carrier flags used by the (hacky) next patch,
+still required by target/linux/ramips/files/drivers/net/ethernet/ralink/mdio.c
+---
+ drivers/net/phy/phy.c | 12 ++++++------
+ drivers/net/phy/phy_device.c | 12 +++++++-----
+ drivers/net/phy/phylink.c | 3 ++-
+ include/linux/phy.h | 2 +-
+ 4 files changed, 16 insertions(+), 13 deletions(-)
+
+--- a/drivers/net/phy/phy.c
++++ b/drivers/net/phy/phy.c
+@@ -58,13 +58,13 @@ static const char *phy_state_to_str(enum
+
+ static void phy_link_up(struct phy_device *phydev)
+ {
+- phydev->phy_link_change(phydev, true);
++ phydev->phy_link_change(phydev, true, true);
+ phy_led_trigger_change_speed(phydev);
+ }
+
+-static void phy_link_down(struct phy_device *phydev)
++static void phy_link_down(struct phy_device *phydev, bool do_carrier)
+ {
+- phydev->phy_link_change(phydev, false);
++ phydev->phy_link_change(phydev, false, do_carrier);
+ phy_led_trigger_change_speed(phydev);
+ }
+
+@@ -616,7 +616,7 @@ int phy_start_cable_test(struct phy_devi
+ goto out;
+
+ /* Mark the carrier down until the test is complete */
+- phy_link_down(phydev);
++ phy_link_down(phydev, true);
+
+ netif_testing_on(dev);
+ err = phydev->drv->cable_test_start(phydev);
+@@ -687,7 +687,7 @@ int phy_start_cable_test_tdr(struct phy_
+ goto out;
+
+ /* Mark the carrier down until the test is complete */
+- phy_link_down(phydev);
++ phy_link_down(phydev, true);
+
+ netif_testing_on(dev);
+ err = phydev->drv->cable_test_tdr_start(phydev, config);
+@@ -758,7 +758,7 @@ static int phy_check_link_status(struct
+ phy_link_up(phydev);
+ } else if (!phydev->link && phydev->state != PHY_NOLINK) {
+ phydev->state = PHY_NOLINK;
+- phy_link_down(phydev);
++ phy_link_down(phydev, true);
+ }
+
+ return 0;
+@@ -1162,7 +1162,7 @@ void phy_state_machine(struct work_struc
+ case PHY_HALTED:
+ if (phydev->link) {
+ phydev->link = 0;
+- phy_link_down(phydev);
++ phy_link_down(phydev, true);
+ }
+ do_suspend = true;
+ break;
+--- a/drivers/net/phy/phy_device.c
++++ b/drivers/net/phy/phy_device.c
+@@ -937,14 +937,16 @@ struct phy_device *phy_find_first(struct
+ }
+ EXPORT_SYMBOL(phy_find_first);
+
+-static void phy_link_change(struct phy_device *phydev, bool up)
++static void phy_link_change(struct phy_device *phydev, bool up, bool do_carrier)
+ {
+ struct net_device *netdev = phydev->attached_dev;
+
+- if (up)
+- netif_carrier_on(netdev);
+- else
+- netif_carrier_off(netdev);
++ if (do_carrier) {
++ if (up)
++ netif_carrier_on(netdev);
++ else
++ netif_carrier_off(netdev);
++ }
+ phydev->adjust_link(netdev);
+ if (phydev->mii_ts && phydev->mii_ts->link_state)
+ phydev->mii_ts->link_state(phydev->mii_ts, phydev);
+--- a/drivers/net/phy/phylink.c
++++ b/drivers/net/phy/phylink.c
+@@ -907,7 +907,8 @@ void phylink_destroy(struct phylink *pl)
+ }
+ EXPORT_SYMBOL_GPL(phylink_destroy);
+
+-static void phylink_phy_change(struct phy_device *phydev, bool up)
++static void phylink_phy_change(struct phy_device *phydev, bool up,
++ bool do_carrier)
+ {
+ struct phylink *pl = phydev->phylink;
+ bool tx_pause, rx_pause;
+--- a/include/linux/phy.h
++++ b/include/linux/phy.h
+@@ -636,7 +636,7 @@ struct phy_device {
+ u8 mdix;
+ u8 mdix_ctrl;
+
+- void (*phy_link_change)(struct phy_device *phydev, bool up);
++ void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier);
+ void (*adjust_link)(struct net_device *dev);
+
+ #if IS_ENABLED(CONFIG_MACSEC)
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
-@@ -546,7 +546,10 @@ static int phy_check_link_status(struct
+@@ -758,7 +758,10 @@ static int phy_check_link_status(struct
phy_link_up(phydev);
} else if (!phydev->link && phydev->state != PHY_NOLINK) {
phydev->state = PHY_NOLINK;
}
return 0;
-@@ -926,7 +929,10 @@ void phy_state_machine(struct work_struc
+@@ -1162,7 +1165,10 @@ void phy_state_machine(struct work_struc
case PHY_HALTED:
if (phydev->link) {
phydev->link = 0;
break;
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
-@@ -380,6 +380,7 @@ struct phy_device {
- unsigned suspended_by_mdio_bus:1;
+@@ -556,6 +556,7 @@ struct phy_device {
unsigned sysfs_links:1;
unsigned loopback_enabled:1;
+ unsigned downshifted_rate:1;
+ unsigned no_auto_carrier_off:1;
unsigned autoneg:1;
#include "gpiolib.h"
#include "gpiolib-of.h"
-@@ -915,3 +917,68 @@ void of_gpiochip_remove(struct gpio_chip
+@@ -1039,3 +1041,68 @@ void of_gpiochip_remove(struct gpio_chip
{
of_node_put(chip->of_node);
}
+module_platform_driver(gpio_export_driver);
--- a/drivers/gpio/gpiolib-sysfs.c
+++ b/drivers/gpio/gpiolib-sysfs.c
-@@ -563,7 +563,7 @@ static struct class gpio_class = {
+@@ -564,7 +564,7 @@ static struct class gpio_class = {
*
* Returns zero on success, else an error.
*/
{
struct gpio_chip *chip;
struct gpio_device *gdev;
-@@ -625,6 +625,8 @@ int gpiod_export(struct gpio_desc *desc,
+@@ -626,6 +626,8 @@ int gpiod_export(struct gpio_desc *desc,
offset = gpio_chip_hwgpio(desc);
if (chip->names && chip->names[offset])
ioname = chip->names[offset];
dev = device_create_with_groups(&gpio_class, &gdev->dev,
MKDEV(0, 0), data, gpio_groups,
-@@ -646,6 +648,12 @@ err_unlock:
+@@ -647,6 +649,12 @@ err_unlock:
gpiod_dbg(desc, "%s: status %d\n", __func__, status);
return status;
}
static int match_export(struct device *dev, const void *desc)
--- a/include/asm-generic/gpio.h
+++ b/include/asm-generic/gpio.h
-@@ -127,6 +127,12 @@ static inline int gpio_export(unsigned g
+@@ -125,6 +125,12 @@ static inline int gpio_export(unsigned g
return gpiod_export(gpio_to_desc(gpio), direction_may_change);
}
{
--- a/include/linux/gpio/consumer.h
+++ b/include/linux/gpio/consumer.h
-@@ -668,6 +668,7 @@ static inline void devm_acpi_dev_remove_
+@@ -713,6 +713,7 @@ static inline void devm_acpi_dev_remove_
#if IS_ENABLED(CONFIG_GPIOLIB) && IS_ENABLED(CONFIG_GPIO_SYSFS)
int gpiod_export(struct gpio_desc *desc, bool direction_may_change);
int gpiod_export_link(struct device *dev, const char *name,
struct gpio_desc *desc);
-@@ -675,6 +676,13 @@ void gpiod_unexport(struct gpio_desc *de
+@@ -720,6 +721,13 @@ void gpiod_unexport(struct gpio_desc *de
#else /* CONFIG_GPIOLIB && CONFIG_GPIO_SYSFS */
+#endif /* __ASM_MACH_RALINK_GPIO_H */
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
-@@ -471,6 +471,12 @@ config GPIO_SNPS_CREG
+@@ -535,6 +535,12 @@ config GPIO_SNPS_CREG
where only several fields in register belong to GPIO lines and
each GPIO line owns a field with different length and on/off value.
depends on PLAT_SPEAR
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
-@@ -112,6 +112,7 @@ obj-$(CONFIG_GPIO_PISOSR) += gpio-pisos
+@@ -119,6 +119,7 @@ obj-$(CONFIG_GPIO_PISOSR) += gpio-pisos
obj-$(CONFIG_GPIO_PL061) += gpio-pl061.o
obj-$(CONFIG_GPIO_PMIC_EIC_SPRD) += gpio-pmic-eic-sprd.o
obj-$(CONFIG_GPIO_PXA) += gpio-pxa.o
--- a/drivers/media/usb/uvc/uvc_driver.c
+++ b/drivers/media/usb/uvc/uvc_driver.c
-@@ -2908,6 +2908,18 @@ static const struct usb_device_id uvc_id
+@@ -2969,6 +2969,18 @@ static const struct usb_device_id uvc_id
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = UVC_INFO_META(V4L2_META_FMT_D4XX) },
for_each_uvc_urb(uvc_urb, stream) {
--- a/drivers/media/usb/uvc/uvcvideo.h
+++ b/drivers/media/usb/uvc/uvcvideo.h
-@@ -199,7 +199,9 @@
+@@ -203,7 +203,9 @@
#define UVC_QUIRK_RESTORE_CTRLS_ON_INIT 0x00000400
#define UVC_QUIRK_FORCE_Y8 0x00000800
#define UVC_QUIRK_FORCE_BPP 0x00001000
/* Format flags */
#define UVC_FMT_FLAG_COMPRESSED 0x00000001
#define UVC_FMT_FLAG_STREAM 0x00000002
-@@ -666,6 +668,7 @@ struct uvc_device {
+@@ -672,6 +674,7 @@ struct uvc_device {
u8 *status;
struct input_dev *input;
char input_phys[64];
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
-@@ -605,6 +605,12 @@ config SPI_QCOM_GENI
+@@ -689,6 +689,12 @@ config SPI_QCOM_GENI
This driver can also be built as a module. If so, the module
will be called spi-geni-qcom.
depends on ARCH_S3C24XX
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
-@@ -87,6 +87,7 @@ obj-$(CONFIG_SPI_QUP) += spi-qup.o
- obj-$(CONFIG_SPI_ROCKCHIP) += spi-rockchip.o
+@@ -96,6 +96,7 @@ obj-$(CONFIG_SPI_ROCKCHIP) += spi-rockc
obj-$(CONFIG_SPI_RB4XX) += spi-rb4xx.o
+ obj-$(CONFIG_SPI_RPCIF) += spi-rpc-if.o
obj-$(CONFIG_SPI_RSPI) += spi-rspi.o
+obj-$(CONFIG_SPI_RT2880) += spi-rt2880.o
obj-$(CONFIG_SPI_S3C24XX) += spi-s3c24xx-hw.o
spi-s3c24xx-hw-y := spi-s3c24xx.o
- spi-s3c24xx-hw-$(CONFIG_SPI_S3C24XX_FIQ) += spi-s3c24xx-fiq.o
+ obj-$(CONFIG_SPI_S3C64XX) += spi-s3c64xx.o
--- /dev/null
+++ b/drivers/spi/spi-rt2880.c
@@ -0,0 +1,530 @@
+};
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
-@@ -922,6 +922,11 @@ config I2C_RK3X
+@@ -954,6 +954,11 @@ config I2C_RK3X
This driver can also be built as a module. If so, the module will
be called i2c-rk3x.
help
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
-@@ -91,6 +91,7 @@ obj-$(CONFIG_I2C_PNX) += i2c-pnx.o
- obj-$(CONFIG_I2C_PUV3) += i2c-puv3.o
+@@ -90,6 +90,7 @@ obj-$(CONFIG_I2C_PMCMSP) += i2c-pmcmsp.o
+ obj-$(CONFIG_I2C_PNX) += i2c-pnx.o
obj-$(CONFIG_I2C_PXA) += i2c-pxa.o
obj-$(CONFIG_I2C_PXA_PCI) += i2c-pxa-pci.o
+obj-$(CONFIG_I2C_RALINK) += i2c-ralink.o
+ obj-$(CONFIG_I2C_QCOM_CCI) += i2c-qcom-cci.o
obj-$(CONFIG_I2C_QCOM_GENI) += i2c-qcom-geni.o
obj-$(CONFIG_I2C_QUP) += i2c-qup.o
- obj-$(CONFIG_I2C_RIIC) += i2c-riic.o
--- /dev/null
+++ b/drivers/i2c/busses/i2c-ralink.c
@@ -0,0 +1,435 @@
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
-@@ -1019,3 +1019,5 @@ config MMC_SDHCI_AM654
- If you have a controller with this interface, say Y or M here.
+@@ -1101,3 +1101,5 @@ config MMC_OWL
- If unsure, say N.
+ config MMC_SDHCI_EXTERNAL_DMA
+ bool
+
+source "drivers/mmc/host/mtk-mmc/Kconfig"
--- a/drivers/mmc/host/Makefile
+{
+ struct ralink_i2s *i2s = snd_soc_dai_get_drvdata(dai);
+
-+ if (dai->active)
++ if (snd_soc_dai_active(dai))
+ return 0;
+
+ /* setup status interrupt */
+ struct ralink_i2s *i2s = snd_soc_dai_get_drvdata(dai);
+
+ /* If both streams are stopped, disable module and clock */
-+ if (dai->active)
++ if (snd_soc_dai_active(dai))
+ return;
+
+ /*
--- a/drivers/tty/serial/serial_core.c
+++ b/drivers/tty/serial/serial_core.c
-@@ -416,6 +416,9 @@ uart_get_baud_rate(struct uart_port *por
+@@ -418,6 +418,9 @@ uart_get_baud_rate(struct uart_port *por
break;
}
--- a/drivers/pwm/Kconfig
+++ b/drivers/pwm/Kconfig
-@@ -316,6 +316,15 @@ config PWM_MEDIATEK
+@@ -339,6 +339,15 @@ config PWM_MEDIATEK
To compile this driver as a module, choose M here: the module
will be called pwm-mediatek.
+
config PWM_MXS
tristate "Freescale MXS PWM support"
- depends on ARCH_MXS && OF
+ depends on OF
--- a/drivers/pwm/Makefile
+++ b/drivers/pwm/Makefile
-@@ -29,6 +29,7 @@ obj-$(CONFIG_PWM_LPSS_PCI) += pwm-lpss-p
+@@ -30,6 +30,7 @@ obj-$(CONFIG_PWM_LPSS_PCI) += pwm-lpss-p
obj-$(CONFIG_PWM_LPSS_PLATFORM) += pwm-lpss-platform.o
obj-$(CONFIG_PWM_MESON) += pwm-meson.o
obj-$(CONFIG_PWM_MEDIATEK) += pwm-mediatek.o
--- a/drivers/usb/dwc2/platform.c
+++ b/drivers/usb/dwc2/platform.c
-@@ -431,6 +431,12 @@ static int dwc2_driver_probe(struct plat
+@@ -477,6 +477,12 @@ static int dwc2_driver_probe(struct plat
if (retval)
return retval;
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
-@@ -52,6 +52,7 @@ obj-$(CONFIG_ECHO) += echo/
- obj-$(CONFIG_VEXPRESS_SYSCFG) += vexpress-syscfg.o
+@@ -50,6 +50,7 @@ obj-$(CONFIG_GENWQE) += genwqe/
+ obj-$(CONFIG_ECHO) += echo/
obj-$(CONFIG_CXL_BASE) += cxl/
obj-$(CONFIG_PCI_ENDPOINT_TEST) += pci_endpoint_test.o
+obj-$(CONFIG_SOC_MT7620) += linkit.o
projects / openwrt / staging / ansuel.git / commitdiff