drm/amd/amdgpu: Add VMID to SRBM debugfs bank selection

Add 5 bits to the offset for SRBM selection to handle VMIDs.  Also
update the select_me_pipe_q() callback to also select VMID.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
index 20ce158490db258a487d37e616bdc1046c51bbf3..c40abf819f3d13a117481d3b66140692da8e143a 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
@@ -106,10 +106,10 @@ static int  amdgpu_debugfs_process_reg_op(bool read, struct file *f,
        ssize_t result = 0;
        int r;
        bool pm_pg_lock, use_bank, use_ring;
-       unsigned instance_bank, sh_bank, se_bank, me, pipe, queue;
+       unsigned instance_bank, sh_bank, se_bank, me, pipe, queue, vmid;
 
        pm_pg_lock = use_bank = use_ring = false;
-       instance_bank = sh_bank = se_bank = me = pipe = queue = 0;
+       instance_bank = sh_bank = se_bank = me = pipe = queue = vmid = 0;
 
        if (size & 0x3 || *pos & 0x3 ||
                        ((*pos & (1ULL << 62)) && (*pos & (1ULL << 61))))
@@ -135,6 +135,7 @@ static int  amdgpu_debugfs_process_reg_op(bool read, struct file *f,
                me = (*pos & GENMASK_ULL(33, 24)) >> 24;
                pipe = (*pos & GENMASK_ULL(43, 34)) >> 34;
                queue = (*pos & GENMASK_ULL(53, 44)) >> 44;
+               vmid = (*pos & GENMASK_ULL(48, 45)) >> 54;
 
                use_ring = 1;
        } else {
@@ -152,7 +153,7 @@ static int  amdgpu_debugfs_process_reg_op(bool read, struct file *f,
                                        sh_bank, instance_bank);
        } else if (use_ring) {
                mutex_lock(&adev->srbm_mutex);
-               amdgpu_gfx_select_me_pipe_q(adev, me, pipe, queue);
+               amdgpu_gfx_select_me_pipe_q(adev, me, pipe, queue, vmid);
        }
 
        if (pm_pg_lock)
@@ -185,7 +186,7 @@ end:
                amdgpu_gfx_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff);
                mutex_unlock(&adev->grbm_idx_mutex);
        } else if (use_ring) {
-               amdgpu_gfx_select_me_pipe_q(adev, 0, 0, 0);
+               amdgpu_gfx_select_me_pipe_q(adev, 0, 0, 0, 0);
                mutex_unlock(&adev->srbm_mutex);
        }
 

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
index f96407ba977066ae4626bfe82f2c420e0d52955e..1199b5828b90964f69059ebedef7e5b7e7de4f91 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
@@ -195,7 +195,7 @@ struct amdgpu_gfx_funcs {
                                uint32_t wave, uint32_t start, uint32_t size,
                                uint32_t *dst);
        void (*select_me_pipe_q)(struct amdgpu_device *adev, u32 me, u32 pipe,
-                                u32 queue);
+                                u32 queue, u32 vmid);
 };
 
 struct amdgpu_ngg_buf {
@@ -327,7 +327,7 @@ struct amdgpu_gfx {
 
 #define amdgpu_gfx_get_gpu_clock_counter(adev) (adev)->gfx.funcs->get_gpu_clock_counter((adev))
 #define amdgpu_gfx_select_se_sh(adev, se, sh, instance) (adev)->gfx.funcs->select_se_sh((adev), (se), (sh), (instance))
-#define amdgpu_gfx_select_me_pipe_q(adev, me, pipe, q) (adev)->gfx.funcs->select_me_pipe_q((adev), (me), (pipe), (q))
+#define amdgpu_gfx_select_me_pipe_q(adev, me, pipe, q, vmid) (adev)->gfx.funcs->select_me_pipe_q((adev), (me), (pipe), (q), (vmid))
 
 /**
  * amdgpu_gfx_create_bitmask - create a bitmask

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
index 789e900905e913557be92496f6071fe7c8969ef2..7f0a63628c43a72956fb2efd24cd077917690419 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
@@ -3043,7 +3043,7 @@ static void gfx_v6_0_read_wave_sgprs(struct amdgpu_device *adev, uint32_t simd,
 }
 
 static void gfx_v6_0_select_me_pipe_q(struct amdgpu_device *adev,
-                                 u32 me, u32 pipe, u32 q)
+                                 u32 me, u32 pipe, u32 q, u32 vm)
 {
        DRM_INFO("Not implemented\n");
 }

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
index 341b5024e598241f1f3d879102aadf23889c1027..0db9f488da7eb4a0db8672cb88ab4d16a0c5a20f 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
@@ -4169,9 +4169,9 @@ static void gfx_v7_0_read_wave_sgprs(struct amdgpu_device *adev, uint32_t simd,
 }
 
 static void gfx_v7_0_select_me_pipe_q(struct amdgpu_device *adev,
-                                 u32 me, u32 pipe, u32 q)
+                                 u32 me, u32 pipe, u32 q, u32 vm)
 {
-       cik_srbm_select(adev, me, pipe, q, 0);
+       cik_srbm_select(adev, me, pipe, q, vm);
 }
 
 static const struct amdgpu_gfx_funcs gfx_v7_0_gfx_funcs = {

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index 032e76dbc51f9872dcd9a697e7404f376717cb26..5f401b41ef7ce67cf6aefcc59010ca4d090e1db5 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -3436,9 +3436,9 @@ static void gfx_v8_0_select_se_sh(struct amdgpu_device *adev,
 }
 
 static void gfx_v8_0_select_me_pipe_q(struct amdgpu_device *adev,
-                                 u32 me, u32 pipe, u32 q)
+                                 u32 me, u32 pipe, u32 q, u32 vm)
 {
-       vi_srbm_select(adev, me, pipe, q, 0);
+       vi_srbm_select(adev, me, pipe, q, vm);
 }
 
 static u32 gfx_v8_0_get_rb_active_bitmap(struct amdgpu_device *adev)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 68dc6b2314c4c1f2efa10dd030acc4be5da3fecc..f4c4eea625268045795cb0dbfc892d2be823aacc 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -1313,9 +1313,9 @@ static void gfx_v9_0_read_wave_vgprs(struct amdgpu_device *adev, uint32_t simd,
 }
 
 static void gfx_v9_0_select_me_pipe_q(struct amdgpu_device *adev,
-                                 u32 me, u32 pipe, u32 q)
+                                 u32 me, u32 pipe, u32 q, u32 vm)
 {
-       soc15_grbm_select(adev, me, pipe, q, 0);
+       soc15_grbm_select(adev, me, pipe, q, vm);
 }
 
 static const struct amdgpu_gfx_funcs gfx_v9_0_gfx_funcs = {