mediatek: add support for Realtek RTL8261n 10G PHYs

There is no upstream driver yet. Merge the RTL SDK driver for now.

Signed-off-by: John Crispin <john@phrozen.org>

diff --git a/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/Kconfig b/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/Kconfig
new file mode 100644 (file)
index 0000000..cdb5cb7
--- /dev/null
+++ b/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/Kconfig
@@ -0,0 +1,5 @@
+
+config RTL8261N_PHY
+       tristate "Driver for Realtek RTL8261N PHYs"
+       help
+         Currently supports the RTL8261N,RTL8264B PHYs.

diff --git a/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/Makefile b/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/Makefile
new file mode 100644 (file)
index 0000000..a661d6c
--- /dev/null
+++ b/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/Makefile
@@ -0,0 +1,11 @@
+
+obj-$(CONFIG_RTL8261N_PHY) += rtl8621n.o
+
+rtl8621n-objs += phy_patch.o
+rtl8621n-objs += phy_rtl826xb_patch.o
+rtl8621n-objs += rtk_osal.o
+rtl8621n-objs += rtk_phy.o
+rtl8621n-objs += rtk_phylib.o
+rtl8621n-objs += rtk_phylib_rtl826xb.o
+
+ccflags-y += -Werror -DRTK_PHYDRV_IN_LINUX

diff --git a/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/construct/conf_rtl8261n_c.c b/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/construct/conf_rtl8261n_c.c
new file mode 100644 (file)
index 0000000..8e7c714
--- /dev/null
+++ b/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/construct/conf_rtl8261n_c.c
@@ -0,0 +1,1465 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-only
+ *
+ * Copyright (c) 2023 Realtek Semiconductor Corp. All rights reserved.
+ */
+
+//Date: Tue Nov 15 19:53:03 2022
+
+rtk_hwpatch_t rtl8261n_c_top_conf[] = {
+    {RTK_PATCH_OP_TOP     , 0xf  , 2     , 20    , 15, 0 , 0x5   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 2     , 21    , 15, 0 , 0x0   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 2     , 22    , 15, 0 , 0x280 , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 2     , 23    , 15, 0 , 0x0014, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 3     , 16    , 15, 0 , 0x0300, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 3     , 17    , 15, 0 , 0x01ff, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 3     , 18    , 15, 0 , 0x000c, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 3     , 19    , 15, 0 , 0x01ff, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 3     , 20    , 15, 0 , 0x0200, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 3     , 21    , 15, 0 , 0x0015, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 3     , 22    , 15, 0 , 0x0200, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 3     , 23    , 15, 0 , 0x0   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 4     , 16    , 15, 0 , 0x0   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 13    , 23    , 8 , 5 , 0x6   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 90    , 18    , 15, 0 , 0x5   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 90    , 19    , 15, 0 , 0x5   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 90    , 20    , 15, 8 , 0x01  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+};
+
+rtk_hwpatch_t rtl8261n_c_sds_conf[] = {
+    {RTK_PATCH_OP_TOP     , 0xf  , 24    , 18    , 15, 0 , 0x881F, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 24    , 19    , 15, 0 , 0x003F, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 24    , 20    , 15, 0 , 0x003F, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 24    , 21    , 15, 0 , 0x003F, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 24    , 22    , 15, 0 , 0x001F, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x06  , 0x0D  , 15, 0 , 0x0F00, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x06  , 0x0E  , 15, 0 , 0x3F5A, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x07  , 0x10  , 15, 12, 0x8   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x07  , 0x10  , 7 , 0 , 0x3   , RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x06  , 0x1D  , 15, 0 , 0x0600, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x21  , 0x00  , 15, 0 , 0x4902, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x21  , 0x08  , 15, 0 , 0x0FC0, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x21  , 0x09  , 15, 0 , 0x33F0, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x21  , 0x0C  , 15, 0 , 0x08BF, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x21  , 0x12  , 15, 0 , 0x8000, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x36  , 0x07  , 15, 0 , 0x04C0, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x36  , 0x08  , 15, 0 , 0x2000, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2E  , 0x0B  , 15, 0 , 0x2390, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2E  , 0x0C  , 15, 0 , 0xAA17, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2E  , 0x0D  , 15, 0 , 0xFE40, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2E  , 0x0E  , 15, 0 , 0x12F4, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2E  , 0x11  , 15, 0 , 0xF2AD, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2E  , 0x15  , 15, 0 , 0x7A41, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2E  , 0x16  , 15, 0 , 0x0041, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2F  , 0x00  , 15, 0 , 0x1F00, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2F  , 0x01  , 15, 0 , 0x2800, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2F  , 0x02  , 15, 0 , 0x0FC8, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2F  , 0x11  , 15, 0 , 0x3000, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2F  , 0x13  , 15, 0 , 0xF400, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2F  , 0x1E  , 15, 0 , 0x0500, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x34  , 0x0B  , 15, 0 , 0x2390, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x34  , 0x0C  , 15, 0 , 0xA517, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x34  , 0x0D  , 15, 0 , 0xFE41, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x34  , 0x0E  , 15, 0 , 0x12F4, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x34  , 0x11  , 15, 0 , 0xF2AD, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x34  , 0x15  , 15, 0 , 0x7A41, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x34  , 0x16  , 15, 0 , 0x0041, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x35  , 0x00  , 15, 0 , 0x1F80, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x35  , 0x01  , 15, 0 , 0x0800, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x35  , 0x02  , 15, 0 , 0x0FC8, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x35  , 0x11  , 15, 0 , 0x3001, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x35  , 0x13  , 15, 0 , 0xF400, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x35  , 0x1E  , 15, 0 , 0x0100, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2C  , 0x0B  , 15, 0 , 0x2390, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2C  , 0x0C  , 15, 0 , 0xA517, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2C  , 0x0D  , 15, 0 , 0xFE41, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2C  , 0x0E  , 15, 0 , 0x12F4, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2C  , 0x11  , 15, 0 , 0xF2AD, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2C  , 0x15  , 15, 0 , 0x7A61, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2C  , 0x16  , 15, 0 , 0x0041, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2D  , 0x00  , 15, 0 , 0x1F80, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2D  , 0x01  , 15, 0 , 0x0800, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2D  , 0x02  , 15, 0 , 0x0FC8, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2D  , 0x11  , 15, 0 , 0x3001, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2D  , 0x13  , 15, 0 , 0xF400, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2D  , 0x1E  , 15, 0 , 0x0100, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x28  , 0x0B  , 15, 0 , 0x2390, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x28  , 0x0C  , 15, 0 , 0xA514, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x28  , 0x0D  , 15, 0 , 0xFE43, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x28  , 0x0E  , 15, 0 , 0x12F4, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x28  , 0x11  , 15, 0 , 0xF2AD, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x28  , 0x15  , 15, 0 , 0x7A61, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x28  , 0x16  , 15, 0 , 0x0041, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x29  , 0x00  , 15, 0 , 0x1F80, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x29  , 0x01  , 15, 0 , 0x0800, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x29  , 0x02  , 15, 0 , 0x0FC8, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x29  , 0x11  , 15, 0 , 0x3001, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x29  , 0x13  , 15, 0 , 0xF400, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x29  , 0x1E  , 15, 0 , 0x0100, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x26  , 0x0B  , 15, 0 , 0x2390, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x26  , 0x0C  , 15, 0 , 0xA514, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x26  , 0x0D  , 15, 0 , 0xFE43, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x26  , 0x0E  , 15, 0 , 0x12F4, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x26  , 0x11  , 15, 0 , 0xF2AD, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x26  , 0x15  , 15, 0 , 0x7A41, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x26  , 0x16  , 15, 0 , 0x0041, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x27  , 0x00  , 15, 0 , 0x1F80, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x27  , 0x01  , 15, 0 , 0x0800, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x27  , 0x02  , 15, 0 , 0x0FC8, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x27  , 0x11  , 15, 0 , 0x3001, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x27  , 0x13  , 15, 0 , 0xF400, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x27  , 0x1E  , 15, 0 , 0x0100, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x24  , 0x0B  , 15, 0 , 0x2390, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x24  , 0x0C  , 15, 0 , 0xA514, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x24  , 0x0D  , 15, 0 , 0xFE43, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x24  , 0x0E  , 15, 0 , 0x12F4, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x24  , 0x11  , 15, 0 , 0xF2AD, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x24  , 0x15  , 15, 0 , 0x7A41, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x24  , 0x16  , 15, 0 , 0x0041, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x25  , 0x00  , 15, 0 , 0x1F80, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x25  , 0x01  , 15, 0 , 0x0800, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x25  , 0x02  , 15, 0 , 0x0FC8, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x25  , 0x11  , 15, 0 , 0x3001, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x25  , 0x13  , 15, 0 , 0xF400, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x25  , 0x1E  , 15, 0 , 0x0100, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 24    , 18    , 15, 0 , 0x880D, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 24    , 19    , 15, 0 , 0x0024, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 24    , 20    , 15, 0 , 0x0036, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 24    , 21    , 15, 0 , 0x0035, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 24    , 22    , 15, 0 , 0x001A, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x1F  , 0x00  , 15, 0 , 0x001B, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x1F  , 0x00  , 15, 0 , 0x0000, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 90    , 20    , 7 , 0 , 0x01  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+};
+
+rtk_hwpatch_t rtl8261n_c_afe_conf[] = {
+};
+
+rtk_hwpatch_t rtl8261n_c_uc_conf[] = {
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb820, 7 , 7 , 0x0   , RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xbd8a, 5 , 3 , 0x3   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xbd8c, 6 , 4 , 0x5   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x8060, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 12, 10, 0x3   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x8061, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 13, 0x5   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa466, 1 , 1 , 0x1   , RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x8491, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 8 , 0x3D  , RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+};
+
+rtk_hwpatch_t rtl8261n_c_uc2_conf[] = {
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb820, 7 , 7 , 0x1   , RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xb87c, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8af6, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xb87e, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xaf8b, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8af6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0eaf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8af8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8b41, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8afa},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xaf8b, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8afc},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4faf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8afe},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8b5b, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b00},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xaf8b, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b02},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xb4af, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b04},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8bc0, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b06},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xaf8b, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b08},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xdaaf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b0a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8bda, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b0c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf8ef, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b0e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x49f8, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b10},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf70, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b12},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x3f02, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b14},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6772, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b16},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xad28, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b18},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x13e1, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b1a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8a55, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b1c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xad28, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b1e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0502, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b20},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5ee2, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b22},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xae0e, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b24},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x025d, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b26},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8f02, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b28},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8bda, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b2a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xae06, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b2c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x025d, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b2e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x7002, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b30},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8c22, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b32},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xe087, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b34},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1ef6, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b36},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x27e4, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b38},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x871e, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b3a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xfcef, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b3c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x94fc, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b3e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x04a1, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b40},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0103, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b42},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x028b, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b44},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xfee0, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b46},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8a09, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b48},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xef23, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b4a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xaf5e, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b4c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5bac, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b4e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5003, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b50},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xaf62, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b52},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8a02, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b54},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8c22, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b56},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xaf62, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b58},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xb0bf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b5a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x68e0, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b5c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0267, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b5e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x72ef, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b60},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x31bf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b62},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x68dd, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b64},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0267, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b66},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x721e, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b68},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x31ac, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b6a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x3819, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b6c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf68, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b6e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xe902, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b70},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6772, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b72},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xef31, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b74},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf68, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b76},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xe602, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b78},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6772, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b7a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1e31, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b7c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xac38, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b7e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0cee, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b80},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8933, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b82},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x02ae, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b84},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0aee, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b86},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8933, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b88},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x00ae, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b8a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x04ee, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b8c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8933, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b8e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x01bf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b90},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8ff9, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b92},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xe189, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b94},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x331a, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b96},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x91db, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b98},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf69, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b9a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4c02, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b9c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6772, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b9e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1f00, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8ba0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1f22, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8ba2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1b45, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8ba4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xad27, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8ba6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x05e1, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8ba8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x870d, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8baa},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xae03, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bac},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xe187, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bae},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0eaf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bb0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x2d1a, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bb2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0248, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bb4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf702, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bb6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8c46, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bb8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0222, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bba},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4faf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bbc},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4176, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bbe},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf8c, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bc0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9002, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bc2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x70eb, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bc4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf8c, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bc6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9f02, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bc8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x70eb, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bca},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf8c, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bcc},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa502, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bce},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x70eb, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bd0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd300, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bd2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0241, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bd4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x7caf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bd6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x46b2, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bd8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf8ef, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bda},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x49f8, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bdc},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf6f, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bde},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x3a02, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8be0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6772, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8be2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xac28, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8be4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x12bf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8be6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6d63, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8be8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0267, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bea},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x72e5, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bec},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8ffc, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bee},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf6d, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bf0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6f02, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bf2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6772, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bf4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xe58f, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bf6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xfdfc, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bf8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xef94, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bfa},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xfc04, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bfc},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf8ef, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bfe},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x49f8, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c00},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf6f, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c02},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x3a02, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c04},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6772, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c06},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xac28, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c08},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x12e1, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c0a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8ffe, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c0c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf6d, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c0e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6302, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c10},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6753, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c12},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xe18f, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c14},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xffbf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c16},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6d6f, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c18},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0267, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c1a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x53fc, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c1c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xef94, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c1e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xfc04, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c20},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf8ef, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c22},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x49f8, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c24},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf6f, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c26},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x3a02, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c28},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6772, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c2a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xac28, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c2c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x12e1, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c2e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8ffc, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c30},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf6d, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c32},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6302, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c34},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6753, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c36},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xe18f, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c38},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xfdbf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c3a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6d6f, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c3c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0267, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c3e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x53fc, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c40},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xef94, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c42},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xfc04, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c44},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf8fa, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c46},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xef69, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c48},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf6f, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c4a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x3a02, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c4c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6772, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c4e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xad28, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c50},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0ebf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c52},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8c93, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c54},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0270, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c56},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf4bf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c58},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8c90, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c5a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0270, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c5c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf4ae, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c5e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x2ad1, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c60},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0fbf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c62},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8c96, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c64},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0267, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c66},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x53bf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c68},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8c99, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c6a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0270, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c6c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xebd1, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c6e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x00bf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c70},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8c9c, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c72},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0267, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c74},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x53bf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c76},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8c9f, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c78},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0270, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c7a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf4d1, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c7c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x00bf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c7e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8ca2, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c80},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0267, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c82},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x53bf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c84},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8ca5, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c86},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0270, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c88},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf4ef, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c8a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x96fe, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c8c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xfc04, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c8e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x77bd, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c90},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6c66, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c92},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbd6c, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c94},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x30bd, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c96},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5444, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c98},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbd54, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c9a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x85bd, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c9c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5e55, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c9e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbd54, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8ca0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa7bd, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8ca2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5cbb, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8ca4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbd5c, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8ca6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xb85e, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x62ba, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xb860, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5e56, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xb862, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6287, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xb864, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x2d07, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xb886, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4170, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xb888, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x46ad, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xb88a, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xffff, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xb88c, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xffff, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xb838, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x003f, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb820, 7 , 7 , 0x0   , RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+};
+
+rtk_hwpatch_t rtl8261n_c_nctl0_conf[] = {
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb820, 7 , 7 , 0x1   , RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA016, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0000, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA012, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0000, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA014, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8010, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x801a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x801a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x801a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x801a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xa},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x801a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xc},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x801a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xe},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x801a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xf},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd719, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x10},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x3bb7, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x11},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8014, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x12},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf003, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x13},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd704, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x14},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x406e, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x15},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x16},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x12db, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x17},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x18},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1301, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x19},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA026, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xffff, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA024, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xffff, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA022, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xffff, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA020, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xffff, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA006, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xffff, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA004, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xffff, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA002, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xffff, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA000, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x12d7, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA008, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0100, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb820, 7 , 7 , 0x0   , RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+};
+
+rtk_hwpatch_t rtl8261n_c_nctl1_conf[] = {
+};
+
+rtk_hwpatch_t rtl8261n_c_nctl2_conf[] = {
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb820, 7 , 7 , 0x1   , RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA016, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0020, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA012, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0000, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA014, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8010, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8029, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8217, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x82d0, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x82f9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xa},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8322, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xc},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8322, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xe},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8322, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xf},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x10},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1502, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x11},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xcb0a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x12},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0cc7, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x13},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x14},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x15},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x16},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4127, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x17},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x18},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1502, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x19},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c0f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0b05, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c38, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0d28, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf008, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x20},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1502, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x21},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c0f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x22},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0b0a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x23},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c38, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x24},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0d18, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x25},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x26},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x27},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0f73, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x28},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x29},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x37c9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8034, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x33a9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8031, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd1bf, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd06d, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf006, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x30},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd1dd, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x31},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd06d, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x32},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf003, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x33},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd199, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x34},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd06e, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x35},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x36},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1418, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x37},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x38},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5fba, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x39},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x3a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd05a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x3b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x3c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x60cf, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x3d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x60f1, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x3e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6113, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x3f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6135, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x40},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6157, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x41},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf00b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x42},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce06, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x43},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf00a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x44},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce06, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x45},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf008, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x46},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce06, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x47},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf006, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x48},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce06, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x49},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf004, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x4a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce06, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x4b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf002, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x4c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce06, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x4d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x4e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x142d, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x4f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x50},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1502, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x51},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0ccf, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x52},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0b40, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x53},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c3f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x54},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c24, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x55},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x56},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa340, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x57},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x58},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x147c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x59},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa110, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x5a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x5b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1435, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x5c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8110, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x5d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x5e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1485, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x5f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa304, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x60},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa8c0, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x61},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8810, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x62},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa00a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x63},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa120, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x64},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa310, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x65},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0cfc, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x66},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0224, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x67},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0ca0, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x68},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0480, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x69},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x6a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1502, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x6b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa340, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x6c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x6d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd162, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x6e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd048, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x6f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x70},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1418, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x71},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x72},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5fba, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x73},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8840, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x74},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd1c4, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x75},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd045, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x76},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x77},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1418, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x78},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x79},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5fba, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x7a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd706, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x7b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6127, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x7c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x7d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5f3b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x7e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x88c0, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x7f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x800a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x80},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8120, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x81},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8350, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x82},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x84a0, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x83},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xffb6, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x84},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xb920, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x85},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xcd33, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x86},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x87},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1418, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x88},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd71f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x89},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x7fb4, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x8a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9920, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x8b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x8c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1418, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x8d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd71f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x8e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6065, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x8f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5f94, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x90},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xffee, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x91},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xb820, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x92},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x93},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1418, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x94},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd71f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x95},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x7fa5, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x96},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9820, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x97},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x800a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x98},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8120, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x99},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x9a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x147c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x9b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa108, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x9c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x9d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1435, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x9e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8108, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x9f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xa0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1485, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xa1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa2fc, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xa2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa304, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xa3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8880, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xa4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0cc0, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xa5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0440, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xa6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xcd34, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xa7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xa8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1502, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xa9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0cc0, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xaa},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0b80, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xab},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xac3f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xac},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c38, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xad},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0d08, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xae},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xaf},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa810, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xb0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa00a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xb1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa120, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xb2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa480, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xb3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa604, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xb4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xb5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x37c9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xb6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x80bb, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xb7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xb8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd049, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xb9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf003, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xba},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd19f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xbb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd049, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xbc},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xbd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1418, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xbe},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd71f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xbf},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x63f4, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xc0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xc1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5f7a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xc2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd706, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xc3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4368, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xc4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xc5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1502, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xc6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0cc0, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xc7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0b40, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xc8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8c3f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xc9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8d38, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xca},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xcb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xcc},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x37c9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xcd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x80d7, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xce},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x33a9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xcf},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x80d4, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xd0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd1f4, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xd1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xd2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf006, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xd3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd1b7, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xd4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xd5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf003, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xd6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd1c6, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xd7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xd8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xd9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1418, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xda},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd71f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xdb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6074, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xdc},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xdd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5f7a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xde},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xdf},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1418, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xe0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd71f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xe1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4056, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xe2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf004, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xe3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xe4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x61fc, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xe5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xfff9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xe6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd706, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xe7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6048, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xe8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf00b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xe9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd702, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xea},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4070, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xeb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xec},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x81a4, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xed},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xee},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1502, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xef},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xae80, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xf0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xf1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xf2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x81a4, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xf3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xf4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd05a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xf5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xf6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x60cf, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xf7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x60f1, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xf8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6113, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xf9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6135, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xfa},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6157, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xfb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf00b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xfc},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce06, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xfd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf00a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xfe},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce06, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xff},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf008, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x100},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce06, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x101},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf006, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x102},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce06, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x103},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf004, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x104},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce06, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x105},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf002, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x106},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce06, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x107},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x108},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x142d, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x109},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x10a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1502, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x10b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0ccf, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x10c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0b40, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x10d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c3f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x10e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c24, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x10f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x110},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa340, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x111},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x112},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x147c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x113},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa110, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x114},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x115},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1435, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x116},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8110, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x117},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x118},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1485, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x119},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa304, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x11a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa8c0, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x11b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8810, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x11c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa00a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x11d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa120, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x11e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa310, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x11f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0cfc, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x120},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0224, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x121},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0ca0, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x122},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0480, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x123},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8604, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x124},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xcd35, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x125},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd162, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x126},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd048, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x127},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x128},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1418, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x129},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x12a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5fba, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x12b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8840, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x12c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd1c4, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x12d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd045, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x12e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x12f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1418, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x130},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x131},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5fba, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x132},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd706, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x133},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6127, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x134},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x135},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5f3b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x136},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x88c0, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x137},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x800a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x138},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8120, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x139},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8350, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x13a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x84a0, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x13b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xffb8, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x13c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbb80, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x13d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x13e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1418, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x13f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd71f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x140},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5fb4, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x141},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xb920, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x142},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xcd36, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x143},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x144},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1418, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x145},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd71f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x146},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x7fb4, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x147},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9920, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x148},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9b80, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x149},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x14a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1418, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x14b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd71f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x14c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6065, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x14d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5f94, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x14e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xffe8, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x14f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xb820, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x150},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x151},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1418, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x152},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd71f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x153},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x7fa5, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x154},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9820, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x155},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x800a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x156},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8120, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x157},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x158},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x147c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x159},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa108, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x15a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x15b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1435, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x15c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8108, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x15d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x15e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1485, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x15f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa2fc, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x160},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa304, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x161},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8880, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x162},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0cc0, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x163},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0440, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x164},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xcd37, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x165},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x166},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1502, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x167},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0cc0, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x168},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0b80, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x169},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xac3f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x16a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c38, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x16b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0d08, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x16c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x16d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa810, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x16e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa00a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x16f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa120, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x170},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa480, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x171},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa604, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x172},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x173},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x37c9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x174},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x817e, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x175},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x33a9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x176},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x817b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x177},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x178},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd048, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x179},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf006, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x17a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x17b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd048, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x17c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf003, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x17d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x17e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd048, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x17f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x180},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1418, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x181},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x182},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1463, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x183},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x184},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5f7a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x185},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd706, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x186},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5f28, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x187},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x188},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1502, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x189},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0cc0, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x18a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0b40, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x18b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8c3f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x18c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8d38, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x18d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x18e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x18f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x37c9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x190},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x819a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x191},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x33a9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x192},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8197, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x193},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd199, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x194},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x195},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf006, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x196},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x197},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x198},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf003, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x199},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd189, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x19a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x19b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x19c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1418, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x19d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x19e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1463, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x19f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1a0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5f7a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1a1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd706, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1a2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5f28, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1a3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1a4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1502, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1a5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c0f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1a6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0b05, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1a7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1a8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1a9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x60cf, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1aa},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x60f1, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1ab},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6113, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1ac},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6135, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1ad},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6157, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1ae},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf00b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1af},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce08, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1b0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf00a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1b1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce08, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1b2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf008, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1b3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce08, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1b4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf006, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1b5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce08, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1b6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf004, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1b7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce08, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1b8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf002, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1b9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce08, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1ba},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1bb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x142d, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1bc},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa180, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1bd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xcd38, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1be},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1bf},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x37c9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1c0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x81d4, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1c1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x33a9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1c2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x81cc, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1c3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd702, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1c4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4098, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1c5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1c6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1c7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf013, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1c8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd100, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1c9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd049, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1ca},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf010, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1cb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd702, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1cc},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4098, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1cd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd1b7, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1ce},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd049, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1cf},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf00b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1d0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd100, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1d1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd048, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1d2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf008, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1d3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd702, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1d4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4098, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1d5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1d6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1d7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf003, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1d8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd199, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1d9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1da},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd13b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1db},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd055, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1dc},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1dd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1418, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1de},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1df},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1463, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1e0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1e1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5f7b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1e2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa302, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1e3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1e4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1418, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1e5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1e6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1463, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1e7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1e8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5f7a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1e9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd706, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1ea},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5f28, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1eb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1ec},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1502, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1ed},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c3f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1ee},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c12, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1ef},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1f0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1f1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x37c9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1f2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8206, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1f3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x33a9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1f4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x81fe, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1f5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd702, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1f6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4098, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1f7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd199, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1f8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1f9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf013, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1fa},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd100, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1fb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd048, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1fc},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf010, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1fd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd702, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1fe},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4098, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1ff},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x200},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x201},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf00b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x202},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd100, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x203},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd040, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x204},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf008, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x205},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd702, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x206},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4098, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x207},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd199, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x208},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x209},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf003, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x20a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd16b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x20b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x20c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x20d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1418, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x20e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x20f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1463, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x210},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x211},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5f7a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x212},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd706, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x213},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5f2a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x214},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x215},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x087a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x216},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x217},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x646d, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x218},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x37c9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x219},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8231, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x21a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x33a9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x21b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8227, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x21c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x21d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x40c7, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x21e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd702, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x21f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6098, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x220},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd100, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x221},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd049, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x222},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf01a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x223},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x224},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd049, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x225},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf017, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x226},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x227},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x40c7, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x228},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd702, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x229},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6098, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x22a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd100, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x22b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd049, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x22c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf010, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x22d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x22e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x22f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf00d, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x230},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x231},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x40c7, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x232},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd702, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x233},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6098, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x234},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x235},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x236},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf006, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x237},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x238},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x239},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf003, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x23a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x23b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd048, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x23c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x23d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1418, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x23e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x23f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1463, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x240},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x241},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5f7a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x242},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd706, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x243},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5f29, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x244},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x245},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x60cf, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x246},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x60f1, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x247},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6113, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x248},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6135, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x249},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6157, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x24a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf00b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x24b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce06, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x24c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf00a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x24d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce06, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x24e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf008, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x24f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce06, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x250},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf006, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x251},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce06, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x252},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf004, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x253},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce06, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x254},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf002, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x255},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce06, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x256},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x257},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x142d, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x258},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x259},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1502, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x25a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8bc0, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x25b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c3f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x25c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c09, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x25d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x25e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa120, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x25f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa310, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x260},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa420, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x261},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xcd3b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x262},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x263},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x65ad, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x264},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x43c7, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x265},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x266},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x37c9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x267},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x827b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x268},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x33a9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x269},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8273, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x26a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd702, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x26b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4098, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x26c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd199, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x26d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x26e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf024, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x26f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd15d, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x270},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x271},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf021, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x272},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd702, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x273},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4098, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x274},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd1c6, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x275},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x276},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf01c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x277},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd15d, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x278},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x279},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf019, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x27a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd702, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x27b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4098, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x27c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd199, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x27d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x27e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf014, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x27f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x280},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x281},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf011, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x282},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x283},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x37c9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x284},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x828e, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x285},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x33a9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x286},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x828b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x287},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd1e5, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x288},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x289},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf009, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x28a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd191, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x28b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04d, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x28c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf006, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x28d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x28e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04d, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x28f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf003, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x290},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd16b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x291},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x292},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x293},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1418, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x294},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x295},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1463, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x296},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x297},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5f7a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x298},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd706, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x299},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5f2c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x29a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x29b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x40e7, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x29c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x29d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1502, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x29e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c0f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x29f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0b05, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2a0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2a1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf006, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2a2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2a3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1502, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2a4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c0f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2a5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0b0a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2a6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2a7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xcd3c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2a8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2a9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x644d, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2aa},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x43c7, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2ab},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2ac},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x37c9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2ad},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x82c1, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2ae},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x33a9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2af},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x82b9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2b0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd702, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2b1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4098, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2b2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2b3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2b4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf019, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2b5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2b6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd048, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2b7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf016, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2b8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd702, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2b9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4098, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2ba},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2bb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2bc},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf011, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2bd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd13e, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2be},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd049, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2bf},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf00e, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2c0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd702, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2c1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4098, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2c2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2c3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2c4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf009, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2c5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2c6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd049, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2c7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf006, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2c8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2c9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2ca},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf003, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2cb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2cc},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd048, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2cd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2ce},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0956, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2cf},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2d0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x2969, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2d1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x82f5, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2d2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x37c9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2d3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x82eb, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2d4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x33a9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2d5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x82e1, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2d6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2d7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x40c7, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2d8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd702, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2d9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6098, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2da},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd15c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2db},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2dc},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf01a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2dd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd199, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2de},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2df},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf017, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2e0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2e1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x40c7, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2e2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd702, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2e3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6098, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2e4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd13e, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2e5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2e6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf010, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2e7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd199, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2e8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2e9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf00d, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2ea},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2eb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x40c7, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2ec},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd702, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2ed},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6098, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2ee},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2ef},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2f0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf006, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2f1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd199, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2f2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2f3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf003, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2f4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2f5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2f6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2f7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x09a0, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2f8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2f9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x2969, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2fa},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x831e, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2fb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x37c9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2fc},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8314, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2fd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x33a9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2fe},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x830a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2ff},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x300},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x40c7, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x301},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd702, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x302},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6098, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x303},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd15d, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x304},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x305},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf01a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x306},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x307},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x308},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf017, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x309},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x30a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x40c7, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x30b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd702, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x30c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6098, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x30d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd16b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x30e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x30f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf010, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x310},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x311},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x312},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf00d, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x313},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x314},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x40c7, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x315},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd702, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x316},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6098, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x317},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x318},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x319},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf006, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x31a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x31b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x31c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf003, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x31d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd1b7, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x31e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x31f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x320},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0a39, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x321},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA10E, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xffff, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA10C, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xffff, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA10A, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xffff, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA108, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0a12, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA106, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0979, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA104, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x089f, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA102, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0692, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA100, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0f60, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA110, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x001f, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA016, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0020, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA012, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1ff8, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA014, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0b0e, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1ff8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0b0e, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1ff9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0b0e, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1ffa},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1ffb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1ffc},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1ffd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1ffe},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1fff},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA164, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0baa, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA166, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c19, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA168, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1293, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA16A, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x3fff, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA16C, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x3fff, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA16E, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x3fff, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA170, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x3fff, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA172, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x3fff, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA162, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0007, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb820, 7 , 7 , 0x0   , RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+};
+
+rtk_hwpatch_t rtl8261n_c_algxg_conf[] = {
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8165, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x22  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8167, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x33  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x827E, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x68  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8013, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x39  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8ffb, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x14  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8ffa, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x1e  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8ff9, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x1e  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x82D9, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x20  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x82DA, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x00  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x816E, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0xab  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8159, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x58  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x815A, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x99  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8139, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x25  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8125, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x67  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8126, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x89  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x827D, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x42  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+};
+
+rtk_hwpatch_t rtl8261n_c_alg_giga_conf[] = {
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x8367, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 8 , 0x5d  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+};
+
+rtk_hwpatch_t rtl8261n_c_normal_conf[] = {
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x817d, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 8 , 0x07  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb516, 6 , 0 , 0x0   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8ffe, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x04  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8fff, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x05  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8132, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x77  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8134, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x88  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x80ca, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x77  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x80cc, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x88  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8062, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x77  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8064, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x88  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x801E, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0005, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+};
+
+rtk_hwpatch_t rtl8261n_c_dataram_conf[] = {
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb820, 7 , 7 , 0x0   , RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb896, 0 , 0 , 0x0   , RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb892, 15, 8 , 0x0   , RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC10B, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0xD5  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC10C, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0xD5  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC10D, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0xD5  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC10E, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0xD5  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC10F, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0xD5  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC110, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0xD5  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC149, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0x08  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC14A, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0x08  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC14B, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0x08  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC14C, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0x08  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC14D, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0x08  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC14E, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0x08  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC166, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0xEE  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC167, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0xEE  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC168, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0x07  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC169, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0x09  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC16A, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0x0B  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC16B, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0x0D  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC16C, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0x13  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC16D, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0x0E  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC16E, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0x11  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC16F, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0x14  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC170, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0x17  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC171, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0x15  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC172, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0x10  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC173, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0x0B  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC128, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0xF7  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC129, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0xF7  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC12A, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0xF8  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC12B, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0xF7  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC12C, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0xF6  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC12D, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0xF5  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC12E, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0xF2  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC12F, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0xF7  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC130, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0xF5  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC131, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0xF2  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC132, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0xF0  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC133, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0xF1  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC134, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0xF4  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC135, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0xF7  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb896, 0 , 0 , 0x1   , RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+};
+
+rtk_hwpatch_t rtl8261n_c_rtct_conf[] = {
+};
+

diff --git a/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/construct/conf_rtl8264b.c b/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/construct/conf_rtl8264b.c
new file mode 100644 (file)
index 0000000..d5cae3f
--- /dev/null
+++ b/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/construct/conf_rtl8264b.c
@@ -0,0 +1,2177 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-only
+ *
+ * Copyright (c) 2023 Realtek Semiconductor Corp. All rights reserved.
+ */
+
+//Date: Thu Dec 15 16:01:01 2022
+
+rtk_hwpatch_t rtl8264b_top_conf[] = {
+    {RTK_PATCH_OP_TOP     , 0xf  , 2     , 20    , 15, 0 , 0x5   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 2     , 21    , 15, 0 , 0x0   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 2     , 22    , 15, 0 , 0x280 , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 2     , 23    , 15, 0 , 0x0014, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 3     , 16    , 15, 0 , 0x0300, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 3     , 17    , 15, 0 , 0x01ff, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 3     , 18    , 15, 0 , 0x000c, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 3     , 19    , 15, 0 , 0x01ff, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 3     , 20    , 15, 0 , 0x0200, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 3     , 21    , 15, 0 , 0x0015, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 3     , 22    , 15, 0 , 0x0200, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 3     , 23    , 15, 0 , 0x0   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 4     , 16    , 15, 0 , 0x0   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 13    , 23    , 8 , 5 , 0x6   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 90    , 18    , 15, 0 , 0xc   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 90    , 19    , 15, 0 , 0xc   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 90    , 20    , 15, 8 , 0x01  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+};
+
+rtk_hwpatch_t rtl8264b_sds_conf[] = {
+    {RTK_PATCH_OP_TOP     , 0xf  , 24    , 18    , 15, 0 , 0x881F, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 24    , 19    , 15, 0 , 0x003F, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 24    , 20    , 15, 0 , 0x003F, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 24    , 21    , 15, 0 , 0x003F, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 24    , 22    , 15, 0 , 0x001F, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x06  , 0x0D  , 15, 0 , 0x0F00, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x06  , 0x0E  , 15, 0 , 0x3F5A, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x07  , 0x10  , 15, 12, 0x8   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x07  , 0x10  , 7 , 0 , 0x3   , RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x06  , 0x1D  , 15, 0 , 0x0600, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x21  , 0x00  , 15, 0 , 0x4902, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x21  , 0x08  , 15, 0 , 0x0FC0, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x21  , 0x09  , 15, 0 , 0x33F0, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x21  , 0x0C  , 15, 0 , 0x08BF, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x21  , 0x12  , 15, 0 , 0x8000, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x36  , 0x07  , 15, 0 , 0x04C0, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x36  , 0x08  , 15, 0 , 0x2000, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2E  , 0x0B  , 15, 0 , 0x2390, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2E  , 0x0C  , 15, 0 , 0xAA17, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2E  , 0x0D  , 15, 0 , 0xFE40, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2E  , 0x0E  , 15, 0 , 0x12F4, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2E  , 0x11  , 15, 0 , 0xF2AD, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2E  , 0x15  , 15, 0 , 0x7A41, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2E  , 0x16  , 15, 0 , 0x0041, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2F  , 0x00  , 15, 0 , 0x1F00, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2F  , 0x01  , 15, 0 , 0x2800, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2F  , 0x02  , 15, 0 , 0x0FC8, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2F  , 0x11  , 15, 0 , 0x3000, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2F  , 0x13  , 15, 0 , 0xF400, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2F  , 0x1E  , 15, 0 , 0x0500, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x34  , 0x0B  , 15, 0 , 0x2390, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x34  , 0x0C  , 15, 0 , 0xA517, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x34  , 0x0D  , 15, 0 , 0xFE41, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x34  , 0x0E  , 15, 0 , 0x12F4, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x34  , 0x11  , 15, 0 , 0xF2AD, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x34  , 0x15  , 15, 0 , 0x7A41, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x34  , 0x16  , 15, 0 , 0x0041, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x35  , 0x00  , 15, 0 , 0x1F80, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x35  , 0x01  , 15, 0 , 0x0800, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x35  , 0x02  , 15, 0 , 0x0FC8, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x35  , 0x11  , 15, 0 , 0x3001, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x35  , 0x13  , 15, 0 , 0xF400, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x35  , 0x1E  , 15, 0 , 0x0100, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2C  , 0x0B  , 15, 0 , 0x2390, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2C  , 0x0C  , 15, 0 , 0xA517, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2C  , 0x0D  , 15, 0 , 0xFE41, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2C  , 0x0E  , 15, 0 , 0x12F4, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2C  , 0x11  , 15, 0 , 0xF2AD, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2C  , 0x15  , 15, 0 , 0x7A61, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2C  , 0x16  , 15, 0 , 0x0041, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2D  , 0x00  , 15, 0 , 0x1F80, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2D  , 0x01  , 15, 0 , 0x0800, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2D  , 0x02  , 15, 0 , 0x0FC8, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2D  , 0x11  , 15, 0 , 0x3001, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2D  , 0x13  , 15, 0 , 0xF400, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x2D  , 0x1E  , 15, 0 , 0x0100, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x28  , 0x0B  , 15, 0 , 0x2390, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x28  , 0x0C  , 15, 0 , 0xA514, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x28  , 0x0D  , 15, 0 , 0xFE43, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x28  , 0x0E  , 15, 0 , 0x12F4, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x28  , 0x11  , 15, 0 , 0xF2AD, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x28  , 0x15  , 15, 0 , 0x7A61, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x28  , 0x16  , 15, 0 , 0x0041, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x29  , 0x00  , 15, 0 , 0x1F80, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x29  , 0x01  , 15, 0 , 0x0800, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x29  , 0x02  , 15, 0 , 0x0FC8, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x29  , 0x11  , 15, 0 , 0x3001, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x29  , 0x13  , 15, 0 , 0xF400, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x29  , 0x1E  , 15, 0 , 0x0100, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x26  , 0x0B  , 15, 0 , 0x2390, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x26  , 0x0C  , 15, 0 , 0xA514, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x26  , 0x0D  , 15, 0 , 0xFE43, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x26  , 0x0E  , 15, 0 , 0x12F4, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x26  , 0x11  , 15, 0 , 0xF2AD, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x26  , 0x15  , 15, 0 , 0x7A41, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x26  , 0x16  , 15, 0 , 0x0041, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x27  , 0x00  , 15, 0 , 0x1F80, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x27  , 0x01  , 15, 0 , 0x0800, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x27  , 0x02  , 15, 0 , 0x0FC8, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x27  , 0x11  , 15, 0 , 0x3001, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x27  , 0x13  , 15, 0 , 0xF400, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x27  , 0x1E  , 15, 0 , 0x0100, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x24  , 0x0B  , 15, 0 , 0x2390, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x24  , 0x0C  , 15, 0 , 0xA514, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x24  , 0x0D  , 15, 0 , 0xFE43, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x24  , 0x0E  , 15, 0 , 0x12F4, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x24  , 0x11  , 15, 0 , 0xF2AD, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x24  , 0x15  , 15, 0 , 0x7A41, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x24  , 0x16  , 15, 0 , 0x0041, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x25  , 0x00  , 15, 0 , 0x1F80, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x25  , 0x01  , 15, 0 , 0x0800, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x25  , 0x02  , 15, 0 , 0x0FC8, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x25  , 0x11  , 15, 0 , 0x3001, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x25  , 0x13  , 15, 0 , 0xF400, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x25  , 0x1E  , 15, 0 , 0x0100, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 24    , 18    , 15, 0 , 0x880D, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 24    , 19    , 15, 0 , 0x0024, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 24    , 20    , 15, 0 , 0x0036, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 24    , 21    , 15, 0 , 0x0035, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 24    , 22    , 15, 0 , 0x001A, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x1F  , 0x00  , 15, 0 , 0x001B, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PSDS0   , 0xf  , 0x1F  , 0x00  , 15, 0 , 0x0000, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 90    , 20    , 7 , 0 , 0x03  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+};
+
+rtk_hwpatch_t rtl8264b_afe_conf[] = {
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xbf92, 15, 11, 0x1C  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xbfaa, 10, 8 , 0x5   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xbfae, 8 , 6 , 0x5   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xbfaa, 12, 11, 0x1   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xbf1c, 4 , 4 , 0x1   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xbf0e, 5 , 4 , 0x3   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xbf1c, 15, 13, 0x5   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xbf16, 12, 12, 0x0   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xbc24, 3 , 2 , 0x1   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xbc24, 1 , 0 , 0x1   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xbf08, 2 , 0 , 0x6   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xbf0c, 5 , 3 , 0x7   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xbf0c, 8 , 6 , 0x7   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xbf0c, 11, 9 , 0x7   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xbf0c, 14, 12, 0x7   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_TOP     , 0xf  , 90    , 21    , 15, 8 , 0x03  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+};
+
+rtk_hwpatch_t rtl8264b_uc_conf[] = {
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb820, 7 , 7 , 0x0   , RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xbd8a, 5 , 3 , 0x3   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xbd8c, 6 , 4 , 0x5   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x8060, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 12, 10, 0x3   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x8061, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 13, 0x5   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa466, 1 , 1 , 0x1   , RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x8491, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 8 , 0x1D  , RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x8018, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 12, 12, 0x1   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x85af, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xaf85, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x85af},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xc7af, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x85b1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x85df, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x85b3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xaf86, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x85b5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1baf, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x85b7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8674, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x85b9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xaf86, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x85bb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x7daf, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x85bd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x875b, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x85bf},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xaf87, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x85c1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x67af, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x85c3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8774, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x85c5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf85, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x85c7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xdc02, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x85c9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6957, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x85cb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xe48f, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x85cd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x2ce5, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x85cf},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8f2d, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x85d1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xe084, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x85d3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x11e1, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x85d5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8412, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x85d7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xaf5d, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x85d9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x73f6, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x85db},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xb01a, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x85dd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xe08f, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x85df},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x2ce1, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x85e1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8f2d, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x85e3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf6d, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x85e5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6802, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x85e7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6938, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x85e9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf6d, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x85eb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6b02, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x85ed},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6938, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x85ef},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf6d, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x85f1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6e02, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x85f3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6938, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x85f5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf6d, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x85f7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x7102, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x85f9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6938, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x85fb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf6d, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x85fd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x7402, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x85ff},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x70e5, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8601},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf6d, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8603},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x7702, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8605},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x70e5, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8607},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf6d, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8609},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x7a02, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x860b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x70e5, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x860d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf6d, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x860f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x7d02, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8611},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x70e5, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8613},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd784, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8615},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa2af, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8617},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5eed, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8619},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0286, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x861b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x21af, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x861d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x07ad, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x861f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf8f9, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8621},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xfaef, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8623},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x69e0, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8625},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8018, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8627},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xad24, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8629},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x39d4, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x862b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x002e, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x862d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf6e, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x862f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0402, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8631},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6938, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8633},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd480, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8635},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x03bf, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8637},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x866e, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8639},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0269, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x863b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x38d4, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x863d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x000f, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x863f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf86, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8641},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x7102, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8643},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6938, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8645},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf86, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8647},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x7102, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8649},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x70dc, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x864b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd480, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x864d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0bbf, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x864f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x866e, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8651},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0269, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8653},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x38d4, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8655},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x000f, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8657},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf86, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8659},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x7102, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x865b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6938, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x865d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf86, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x865f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x7102, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8661},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x70dc, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8663},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0208, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8665},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1eef, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8667},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x96fe, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8669},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xfdfc, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x866b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x04f0, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x866d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbd94, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x866f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x30bd, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8671},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9602, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8673},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8621, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8675},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0254, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8677},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xdcaf, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8679},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x03c1, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x867b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0286, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x867d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x2102, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x867f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8686, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8681},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xaf04, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8683},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x41f8, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8685},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xfbef, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8687},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x79e0, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8689},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8018, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x868b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xac20, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x868d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x03af, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x868f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8756, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8691},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf6b, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8693},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x3402, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8695},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x70dc, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8697},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf6b, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8699},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x3102, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x869b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x70e5, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x869d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf6f, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x869f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4902, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86a1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x70dc, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86a3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf6f, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86a5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4c02, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86a7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x70e5, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86a9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf6f, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86ab},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4f02, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86ad},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x70e5, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86af},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf6b, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86b1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x3702, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86b3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x70dc, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86b5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf6c, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86b7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c02, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86b9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x70dc, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86bb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf6b, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86bd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x3402, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86bf},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x70e5, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86c1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1f00, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86c3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xe183, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86c5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd4bf, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86c7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6bcd, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86c9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0269, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86cb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x38bf, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86cd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6bd0, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86cf},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0269, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86d1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x38bf, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86d3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6bd3, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86d5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0269, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86d7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x38bf, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86d9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6bd6, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86db},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0269, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86dd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x38bf, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86df},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6bd9, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86e1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0270, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86e3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xe5bf, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86e5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6bdc, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86e7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0270, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86e9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xe5bf, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86eb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6bdf, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86ed},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0270, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86ef},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xe5bf, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86f1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6be2, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86f3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0270, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86f5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xe5bf, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86f7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6f46, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86f9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0270, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86fb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xdce1, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86fd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x83d3, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x86ff},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf6f, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8701},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x3a02, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8703},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6938, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8705},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0d14, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8707},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf6f, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8709},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4002, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x870b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6938, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x870d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0d12, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x870f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf6f, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8711},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x3d02, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8713},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6938, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8715},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf6f, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8717},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4302, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8719},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x70dc, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x871b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0238, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x871d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xb5bf, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x871f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6bd9, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8721},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0270, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8723},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xdcbf, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8725},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6bdc, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8727},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0270, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8729},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xdcbf, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x872b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6bdf, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x872d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0270, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x872f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xdcbf, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8731},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6be2, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8733},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0270, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8735},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xdcbf, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8737},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6b34, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8739},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0270, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x873b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xdcbf, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x873d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6b37, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x873f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0270, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8741},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xe5bf, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8743},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6f4f, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8745},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0270, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8747},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xdcbf, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8749},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6b31, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x874b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0270, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x874d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xdcbf, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x874f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6f4c, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8751},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0270, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8753},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xdcef, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8755},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x97ff, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8757},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xfc04, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8759},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xac2f, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x875b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x03af, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x875d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0b2a, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x875f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x020e, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8761},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x95af, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8763},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0b3f, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8765},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xee84, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8767},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x3c00, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8769},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf6c, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x876b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c02, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x876d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x70e5, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x876f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xaf01, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8771},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0300, RTK_PATCH_CMP_SWC , 0, 0xa438, 0xa436, 0x8773},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xb818, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5d6d, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xb81a, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5eea, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xb81c, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x07aa, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xb81e, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x03be, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xb850, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x043e, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xb852, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0b26, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xb878, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x00fd, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xb884, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xffff, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xb832, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x007f, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+};
+
+rtk_hwpatch_t rtl8264b_uc2_conf[] = {
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb820, 7 , 7 , 0x1   , RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xb87c, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8acf, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xb87e, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xaf8a, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8acf},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xe7af, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8ad1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8b40, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8ad3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xaf8b, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8ad5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4caf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8ad7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8b6a, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8ad9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xaf8b, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8adb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xb5af, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8add},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8bd1, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8adf},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xaf8c, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8ae1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x04af, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8ae3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8c12, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8ae5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf67, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8ae7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6302, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8ae9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x65f5, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8aeb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xef31, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8aed},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf67, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8aef},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6002, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8af1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x65f5, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8af3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1e31, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8af5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xac38, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8af7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x19bf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8af9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x676c, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8afb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0265, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8afd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf5ef, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8aff},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x31bf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b01},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6769, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b03},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0265, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b05},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf51e, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b07},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x31ac, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b09},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x380c, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b0b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xee89, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b0d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x2c02, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b0f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xae0a, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b11},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xee89, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b13},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x2c00, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b15},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xae04, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b17},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xee89, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b19},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x2c01, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b1b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf8f, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b1d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd5e1, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b1f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x892c, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b21},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1a91, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b23},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xdbbf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b25},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x67cf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b27},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0265, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b29},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf51f, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b2b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x001f, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b2d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x221b, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b2f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x45ad, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b31},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x2705, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b33},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xe187, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b35},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x06ae, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b37},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x03e1, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b39},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8707, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b3b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xaf2d, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b3d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1a02, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b3f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8c1e, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b41},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x028c, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b43},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x7b02, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b45},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x224f, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b47},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xaf40, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b49},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xb8ac, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b4b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x2f0f, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b4d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0210, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b4f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x62bf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b51},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6d36, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b53},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0265, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b55},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf5e5, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b57},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8fde, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b59},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xaf10, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b5b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4ae1, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b5d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8fde, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b5f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf6d, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b61},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x3602, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b63},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x65d6, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b65},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xaf10, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b67},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x59e1, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b69},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8fdd, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b6b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa100, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b6d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0dbf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b6f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6d36, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b71},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0265, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b73},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf5e5, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b75},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8fdc, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b77},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xee8f, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b79},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xdd01, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b7b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf6d, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b7d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x3602, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b7f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6f77, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b81},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf86, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b83},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xc7e1, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b85},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x892c, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b87},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4903, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b89},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1a91, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b8b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xef69, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b8d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xdbbf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b8f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x67cf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b91},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0265, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b93},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf51f, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b95},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x001f, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b97},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x22ef, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b99},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x741b, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b9b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x45ad, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b9d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x2711, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8b9f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf86, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8ba1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd0d0, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8ba3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x00e1, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8ba5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8fdc, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8ba7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf6d, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8ba9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x3602, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bab},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x65d6, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bad},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xaf35, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8baf},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x46af, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bb1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x3527, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bb3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x026f, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bb5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6eee, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bb7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8fdd, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bb9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x00bf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bbb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8d31, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bbd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x026f, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bbf},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6ebf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bc1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8d40, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bc3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x026f, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bc5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6ebf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bc7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8d46, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bc9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x026f, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bcb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6eaf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bcd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x36a9, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bcf},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf8ef, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bd1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x49f8, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bd3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf6e, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bd5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xc202, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bd7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x65f5, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bd9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xad28, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bdb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x13e1, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bdd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8a4e, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bdf},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xad28, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8be1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0502, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8be3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5d65, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8be5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xae0e, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8be7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x025c, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8be9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1202, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8beb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8cc5, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bed},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xae06, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bef},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x025b, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bf1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf302, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bf3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8d0d, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bf5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xe087, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bf7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x17f6, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bf9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x27e4, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bfb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8717, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bfd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xfcef, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8bff},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x94fc, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c01},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x04a1, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c03},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0103, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c05},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x028c, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c07},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xe9e0, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c09},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8a02, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c0b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xef23, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c0d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xaf5c, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c0f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xdeac, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c11},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5003, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c13},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xaf61, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c15},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0d02, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c17},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8d0d, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c19},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xaf61, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c1b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x33f8, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c1d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xfafb, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c1f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xef79, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c21},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xfbbf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c23},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6766, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c25},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0265, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c27},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf5ad, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c29},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x2810, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c2b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xad30, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c2d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x05d7, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c2f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0002, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c31},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xae16, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c33},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xad32, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c35},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x24d7, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c37},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0003, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c39},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xae0e, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c3b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xad31, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c3d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x05d7, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c3f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0000, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c41},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xae06, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c43},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xad33, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c45},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x14d7, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c47},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0001, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c49},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf8f, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c4b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xdf4f, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c4d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0008, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c4f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1a97, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c51},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd78c, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c53},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x63d6, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c55},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8c7b, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c57},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0265, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c59},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x3bff, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c5b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xef97, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c5d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xfffe, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c5f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xfc04, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c61},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x206b, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c63},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0e20, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c65},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6b11, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c67},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x206b, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c69},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1420, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c6b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6b17, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c6d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x206b, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c6f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x2020, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c71},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6b23, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c73},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x206b, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c75},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x2600, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c77},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6b29, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c79},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf8fa, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c7b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xef69, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c7d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf6d, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c7f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbd02, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c81},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x65f5, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c83},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xad28, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c85},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0ebf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c87},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8d34, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c89},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x026f, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c8b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x77bf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c8d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8d31, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c8f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x026f, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c91},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x77ae, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c93},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x2ad1, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c95},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0fbf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c97},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8d37, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c99},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0265, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c9b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd6bf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c9d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8d3a, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8c9f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x026f, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8ca1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6ed1, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8ca3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x00bf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8ca5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8d3d, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8ca7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0265, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8ca9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd6bf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8cab},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8d40, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8cad},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x026f, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8caf},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x77d1, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8cb1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x00bf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8cb3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8d43, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8cb5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0265, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8cb7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd6bf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8cb9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8d46, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8cbb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x026f, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8cbd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x77ef, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8cbf},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x96fe, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8cc1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xfc04, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8cc3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf8ef, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8cc5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x49f8, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8cc7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf6d, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8cc9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbd02, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8ccb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x65f5, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8ccd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xac28, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8ccf},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x12bf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8cd1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6be6, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8cd3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0265, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8cd5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf5e5, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8cd7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8fd8, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8cd9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf6b, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8cdb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf202, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8cdd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x65f5, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8cdf},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xe58f, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8ce1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd9fc, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8ce3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xef94, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8ce5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xfc04, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8ce7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf8ef, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8ce9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x49f8, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8ceb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf6d, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8ced},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbd02, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8cef},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x65f5, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8cf1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xac28, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8cf3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x12e1, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8cf5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8fda, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8cf7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf6b, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8cf9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xe602, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8cfb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x65d6, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8cfd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xe18f, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8cff},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xdbbf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8d01},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6bf2, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8d03},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0265, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8d05},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd6fc, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8d07},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xef94, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8d09},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xfc04, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8d0b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf8ef, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8d0d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x49f8, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8d0f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf6d, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8d11},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbd02, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8d13},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x65f5, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8d15},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xac28, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8d17},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x12e1, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8d19},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8fd8, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8d1b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf6b, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8d1d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xe602, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8d1f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x65d6, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8d21},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xe18f, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8d23},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd9bf, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8d25},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6bf2, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8d27},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0265, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8d29},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd6fc, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8d2b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xef94, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8d2d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xfc04, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8d2f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x77bd, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8d31},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6c66, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8d33},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbd6c, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8d35},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x30bd, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8d37},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5444, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8d39},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbd54, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8d3b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x85bd, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8d3d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5e55, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8d3f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbd54, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8d41},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa7bd, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8d43},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5cbb, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8d45},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbd5c, RTK_PATCH_CMP_SWC , 0, 0xb87e, 0xb87c, 0x8d47},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xb85e, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x2d07, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xb860, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x40b5, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xb862, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1047, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xb864, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x3504, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xb886, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x36A6, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xb888, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x613d, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xb88a, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5cd9, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xb88c, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x610a, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xb838, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x00ff, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb820, 7 , 7 , 0x0   , RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+};
+
+rtk_hwpatch_t rtl8264b_nctl0_conf[] = {
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb820, 7 , 7 , 0x1   , RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA016, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0000, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA012, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0000, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA014, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8010, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8015, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8020, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x802a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8030, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xa},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8035, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xc},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8046, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xe},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x806b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xf},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd707, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x10},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x606f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x11},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x12},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x801a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x13},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x14},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd707, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x15},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x606f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x16},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x17},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x801a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x18},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x19},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce10, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xcf01, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd705, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4004, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xcf02, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd719, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x20},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x3bb7, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x21},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8024, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x22},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf003, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x23},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd704, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x24},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x406e, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x25},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x26},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x12bd, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x27},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x28},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x12e3, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x29},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xab80, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd500, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xc402, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x004a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x30},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8b80, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x31},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd500, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x32},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x33},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0108, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x34},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c0f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x35},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x090f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x36},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c0f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x37},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0a03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x38},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd004, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x39},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd1c1, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x3a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x3b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x401c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x3c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce00, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x3d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd500, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x3e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x3f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x801a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x40},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd501, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x41},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce01, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x42},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x43},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x44},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0aa9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x45},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd500, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x46},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd706, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x47},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x2a69, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x48},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8056, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x49},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x3f48, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x4a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8058, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x4b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x3f4b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x4c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x805a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x4d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x618c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x4e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x3f40, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x4f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x805c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x50},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x3f43, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x51},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x805e, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x52},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x616b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x53},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6187, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x54},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf00c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x55},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xcc8f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x56},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf00a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x57},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xcc8d, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x58},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf008, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x59},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xcc8b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x5a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf006, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x5b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xcc89, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x5c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf004, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x5d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xcc87, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x5e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf002, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x5f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xcc91, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x60},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x61},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0b9a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x62},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x63},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xca80, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x64},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x65},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0ba0, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x66},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xca00, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x67},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd504, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x68},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x69},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1658, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x6a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa208, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x6b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x6c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0a88, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x6d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x6e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0d91, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x6f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA026, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0d90, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA024, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1657, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA022, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0aa1, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA020, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0047, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA006, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0049, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA004, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x12b9, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA002, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0be5, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA000, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1811, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA008, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xff00, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA016, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0000, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA012, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0ff8, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA014, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xc483, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x0ff8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xc483, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xff9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xffa},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xffb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xffc},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xffd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xffe},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xfff},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA152, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1a83, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA154, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1d29, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA156, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x3fff, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA158, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x3fff, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA15A, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x3fff, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA15C, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x3fff, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA15E, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x3fff, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA160, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x3fff, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA150, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0003, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb820, 7 , 7 , 0x0   , RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+};
+
+rtk_hwpatch_t rtl8264b_nctl1_conf[] = {
+};
+
+rtk_hwpatch_t rtl8264b_nctl2_conf[] = {
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb820, 7 , 7 , 0x1   , RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA016, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0020, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA012, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0000, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA014, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8010, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8022, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8029, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8085, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x808c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xa},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8093, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xc},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8281, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xe},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x829a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xf},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x10},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1502, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x11},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8370, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x12},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x13},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd707, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x14},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x416f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x15},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x16},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd05a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x17},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa501, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x18},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x19},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x13cf, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd701, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5fbd, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8501, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0427, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x20},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x040b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x21},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8501, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x22},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd707, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x23},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x406f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x24},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x25},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x01d8, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x26},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x27},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x01cb, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x28},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd705, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x29},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x3fa7, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8030, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd75f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x699c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1340, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd704, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x30},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4066, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x31},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x800a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x32},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf002, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x33},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa00a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x34},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd705, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x35},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x61b4, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x36},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd704, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x37},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x609f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x38},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6150, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x39},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x2d71, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x3a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8043, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x3b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x3c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1502, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x3d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0cf0, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x3e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x05a0, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x3f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x40},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x41},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x13b1, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x42},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x43},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1502, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x44},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8220, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x45},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c30, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x46},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0410, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x47},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x48},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x800a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x49},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x81a0, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x4a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8302, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x4b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8480, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x4c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8684, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x4d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x4e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1502, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x4f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8203, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x50},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8340, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x51},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x52},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xaa10, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x53},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8b07, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x54},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x55},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x60cf, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x56},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x60f1, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x57},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6113, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x58},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6135, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x59},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6157, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x5a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf00b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x5b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce0b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x5c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf00a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x5d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce0b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x5e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf008, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x5f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce0a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x60},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf006, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x61},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce0a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x62},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf004, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x63},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce09, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x64},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf002, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x65},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce09, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x66},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x67},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1502, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x68},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa204, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x69},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x6a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x6b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x13e4, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x6c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xab08, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x6d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xcda0, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x6e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd705, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x6f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x40de, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x70},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd162, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x71},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd045, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x72},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbf10, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x73},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x74},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x13b1, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x75},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9f10, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x76},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x77},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x13b1, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x78},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x79},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x607a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x7a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x7b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x13b1, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x7c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9f10, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x7d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x7e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1502, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x7f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8210, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x80},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa210, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x81},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x82},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x83},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1340, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x84},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x85},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1502, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x86},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8df8, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x87},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8370, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x88},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x89},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x8a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x01c1, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x8b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x8c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1502, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x8d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8df8, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x8e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8370, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x8f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x90},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x91},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x009e, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x92},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x93},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x37c9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x94},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x809e, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x95},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x33a9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x96},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x809b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x97},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd1bf, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x98},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd06d, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x99},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf006, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x9a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd1dd, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x9b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd06d, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x9c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf003, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x9d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd199, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x9e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd06e, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x9f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xa0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x13cf, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xa1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xa2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5fba, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xa3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xa4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd05a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xa5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xa6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x60cf, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xa7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x60f1, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xa8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6113, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xa9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6135, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xaa},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6157, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xab},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf00b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xac},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce06, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xad},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf00a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xae},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce06, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xaf},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf008, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xb0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce06, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xb1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf006, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xb2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce06, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xb3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf004, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xb4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce06, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xb5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf002, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xb6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce06, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xb7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xb8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x13e4, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xb9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xba},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1502, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xbb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0ccf, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xbc},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0b40, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xbd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c3f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xbe},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c24, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xbf},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xc0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa340, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xc1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xc2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1433, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xc3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa110, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xc4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xc5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x13ec, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xc6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8110, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xc7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xc8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x143c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xc9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa304, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xca},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa8c0, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xcb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8810, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xcc},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa00a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xcd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa120, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xce},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa310, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xcf},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0cfc, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xd0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0224, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xd1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0ca0, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xd2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0480, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xd3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xd4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1502, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xd5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa340, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xd6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xd7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd162, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xd8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd048, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xd9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xda},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x13cf, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xdb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xdc},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5fba, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xdd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8840, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xde},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd1c4, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xdf},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd045, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xe0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xe1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x13cf, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xe2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xe3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5fba, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xe4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd706, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xe5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6127, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xe6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xe7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5f3b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xe8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x88c0, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xe9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x800a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xea},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8120, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xeb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8350, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xec},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x84a0, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xed},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xffb6, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xee},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xb920, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xef},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xcd33, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xf0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xf1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x13cf, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xf2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd71f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xf3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x7fb4, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xf4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9920, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xf5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xf6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x13cf, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xf7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd71f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xf8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6065, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xf9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5f94, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xfa},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xffee, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xfb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xb820, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xfc},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xfd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x13cf, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xfe},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd71f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0xff},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x7fa5, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x100},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9820, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x101},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x800a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x102},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8120, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x103},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x104},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1433, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x105},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa108, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x106},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x107},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x13ec, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x108},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8108, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x109},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x10a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x143c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x10b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa2fc, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x10c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa304, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x10d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8880, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x10e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0cc0, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x10f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0440, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x110},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xcd34, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x111},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x112},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1502, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x113},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0cc0, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x114},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0b80, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x115},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xac3f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x116},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c38, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x117},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0d08, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x118},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x119},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa810, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x11a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa00a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x11b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa120, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x11c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa480, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x11d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa604, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x11e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x11f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x37c9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x120},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8125, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x121},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x122},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd049, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x123},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf003, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x124},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd19f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x125},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd049, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x126},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x127},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x13cf, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x128},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd71f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x129},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x63f4, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x12a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x12b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5f7a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x12c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd706, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x12d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4368, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x12e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x12f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1502, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x130},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0cc0, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x131},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0b40, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x132},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8c3f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x133},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8d38, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x134},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x135},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x136},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x37c9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x137},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8141, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x138},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x33a9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x139},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x813e, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x13a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd1f4, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x13b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x13c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf006, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x13d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd1b7, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x13e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x13f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf003, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x140},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd1c6, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x141},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x142},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x143},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x13cf, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x144},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd71f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x145},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6074, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x146},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x147},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5f7a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x148},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x149},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x13cf, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x14a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd71f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x14b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4056, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x14c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf004, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x14d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x14e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x61fc, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x14f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xfff9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x150},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd706, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x151},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6048, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x152},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf00b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x153},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd702, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x154},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4070, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x155},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x156},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x820e, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x157},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x158},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1502, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x159},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xae80, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x15a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x15b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x15c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x820e, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x15d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x15e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd05a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x15f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x160},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x60cf, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x161},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x60f1, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x162},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6113, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x163},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6135, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x164},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6157, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x165},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf00b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x166},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce06, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x167},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf00a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x168},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce06, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x169},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf008, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x16a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce06, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x16b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf006, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x16c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce06, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x16d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf004, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x16e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce06, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x16f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf002, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x170},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce06, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x171},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x172},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x13e4, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x173},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x174},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1502, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x175},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0ccf, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x176},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0b40, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x177},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c3f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x178},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c24, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x179},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x17a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa340, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x17b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x17c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1433, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x17d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa110, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x17e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x17f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x13ec, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x180},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8110, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x181},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x182},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x143c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x183},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa304, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x184},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa8c0, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x185},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8810, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x186},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa00a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x187},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa120, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x188},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa310, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x189},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0cfc, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x18a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0224, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x18b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0ca0, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x18c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0480, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x18d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8604, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x18e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xcd35, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x18f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd162, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x190},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd048, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x191},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x192},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x13cf, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x193},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x194},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5fba, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x195},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8840, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x196},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd1c4, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x197},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd045, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x198},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x199},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x13cf, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x19a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x19b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5fba, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x19c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd706, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x19d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6127, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x19e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x19f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5f3b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1a0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x88c0, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1a1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x800a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1a2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8120, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1a3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8350, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1a4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x84a0, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1a5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xffb8, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1a6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xbb80, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1a7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1a8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x13cf, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1a9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd71f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1aa},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5fb4, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1ab},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xb920, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1ac},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xcd36, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1ad},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1ae},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x13cf, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1af},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd71f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1b0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x7fb4, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1b1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9920, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1b2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9b80, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1b3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1b4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x13cf, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1b5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd71f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1b6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6065, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1b7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5f94, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1b8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xffe8, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1b9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xb820, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1ba},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1bb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x13cf, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1bc},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd71f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1bd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x7fa5, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1be},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9820, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1bf},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x800a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1c0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8120, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1c1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1c2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1433, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1c3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa108, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1c4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1c5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x13ec, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1c6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8108, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1c7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1c8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x143c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1c9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa2fc, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1ca},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa304, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1cb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8880, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1cc},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0cc0, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1cd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0440, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1ce},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xcd37, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1cf},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1d0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1502, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1d1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0cc0, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1d2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0b80, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1d3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xac3f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1d4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c38, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1d5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0d08, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1d6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1d7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa810, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1d8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa00a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1d9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa120, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1da},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa480, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1db},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa604, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1dc},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1dd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x37c9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1de},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x81e8, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1df},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x33a9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1e0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x81e5, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1e1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1e2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd048, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1e3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf006, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1e4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1e5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd048, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1e6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf003, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1e7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1e8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd048, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1e9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1ea},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x13cf, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1eb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1ec},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x141a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1ed},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1ee},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5f7a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1ef},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd706, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1f0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5f28, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1f1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1f2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1502, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1f3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0cc0, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1f4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0b40, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1f5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8c3f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1f6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8d38, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1f7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1f8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1f9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x37c9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1fa},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8204, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1fb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x33a9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1fc},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8201, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1fd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd199, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1fe},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1ff},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf006, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x200},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x201},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x202},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf003, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x203},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd189, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x204},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x205},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x206},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x13cf, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x207},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x208},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x141a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x209},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x20a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5f7a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x20b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd706, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x20c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5f28, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x20d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x20e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1502, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x20f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c0f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x210},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0b05, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x211},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x212},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x213},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x60cf, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x214},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x60f1, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x215},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6113, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x216},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6135, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x217},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6157, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x218},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf00b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x219},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce08, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x21a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf00a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x21b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce08, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x21c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf008, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x21d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce08, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x21e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf006, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x21f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce08, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x220},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf004, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x221},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce08, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x222},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf002, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x223},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce08, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x224},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x225},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x13e4, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x226},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa180, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x227},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xcd38, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x228},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x229},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x37c9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x22a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x823e, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x22b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x33a9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x22c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8236, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x22d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd702, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x22e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4098, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x22f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x230},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x231},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf013, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x232},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd100, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x233},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd049, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x234},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf010, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x235},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd702, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x236},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4098, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x237},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd1b7, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x238},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd049, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x239},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf00b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x23a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd100, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x23b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd048, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x23c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf008, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x23d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd702, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x23e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4098, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x23f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x240},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x241},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf003, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x242},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd199, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x243},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x244},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd13b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x245},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd055, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x246},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x247},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x13cf, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x248},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x249},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x141a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x24a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x24b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5f7b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x24c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa302, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x24d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x24e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x13cf, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x24f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x250},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x141a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x251},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x252},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5f7a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x253},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd706, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x254},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5f28, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x255},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x256},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1502, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x257},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c3f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x258},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c12, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x259},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x25a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x25b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x37c9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x25c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8270, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x25d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x33a9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x25e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8268, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x25f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd702, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x260},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4098, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x261},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd199, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x262},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x263},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf013, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x264},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd100, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x265},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd048, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x266},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf010, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x267},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd702, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x268},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4098, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x269},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x26a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x26b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf00b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x26c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd100, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x26d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd040, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x26e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf008, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x26f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd702, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x270},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4098, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x271},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd199, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x272},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x273},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf003, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x274},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd16b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x275},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x276},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x277},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x13cf, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x278},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x279},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x141a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x27a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x27b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5f7a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x27c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd706, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x27d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5f2a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x27e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x27f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x085e, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x280},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x281},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1502, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x282},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xcb0a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x283},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0cc7, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x284},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x285},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x286},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x287},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4127, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x288},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x289},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1502, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x28a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c0f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x28b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0b05, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x28c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c38, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x28d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0d28, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x28e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x28f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf008, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x290},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x291},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1502, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x292},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c0f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x293},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0b0a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x294},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c38, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x295},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0d18, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x296},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x297},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x298},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0f45, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x299},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x29a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x646d, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x29b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x37c9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x29c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x82b4, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x29d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x33a9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x29e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x82aa, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x29f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2a0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x40c7, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2a1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd702, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2a2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6098, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2a3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd100, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2a4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd049, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2a5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf01a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2a6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2a7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd049, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2a8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf017, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2a9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2aa},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x40c7, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2ab},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd702, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2ac},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6098, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2ad},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd100, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2ae},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd049, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2af},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf010, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2b0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2b1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2b2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf00d, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2b3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2b4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x40c7, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2b5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd702, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2b6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6098, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2b7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2b8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2b9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf006, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2ba},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2bb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2bc},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf003, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2bd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2be},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd048, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2bf},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2c0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x13cf, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2c1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2c2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x141a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2c3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2c4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5f7a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2c5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd706, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2c6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5f29, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2c7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2c8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x60cf, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2c9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x60f1, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2ca},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6113, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2cb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6135, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2cc},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x6157, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2cd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf00b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2ce},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce06, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2cf},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf00a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2d0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce06, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2d1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf008, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2d2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce06, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2d3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf006, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2d4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce06, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2d5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf004, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2d6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce06, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2d7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf002, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2d8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xce06, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2d9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2da},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x13e4, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2db},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2dc},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1502, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2dd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8bc0, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2de},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c3f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2df},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c09, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2e0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2e1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa120, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2e2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa310, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2e3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xa420, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2e4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xcd3b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2e5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2e6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x65ad, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2e7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x43c7, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2e8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2e9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x37c9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2ea},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x82fe, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2eb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x33a9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2ec},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x82f6, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2ed},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd702, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2ee},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4098, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2ef},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd199, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2f0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2f1},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf024, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2f2},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd15d, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2f3},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2f4},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf021, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2f5},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd702, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2f6},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4098, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2f7},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd1c6, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2f8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2f9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf01c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2fa},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd15d, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2fb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2fc},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf019, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2fd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd702, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2fe},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4098, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x2ff},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd199, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x300},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x301},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf014, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x302},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x303},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x304},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf011, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x305},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x306},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x37c9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x307},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8311, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x308},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x33a9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x309},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x830e, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x30a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd1e5, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x30b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x30c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf009, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x30d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd191, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x30e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04d, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x30f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf006, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x310},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x311},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04d, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x312},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf003, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x313},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd16b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x314},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x315},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x316},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x13cf, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x317},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x318},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x141a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x319},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x31a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5f7a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x31b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd706, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x31c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x5f2c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x31d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x31e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x40e7, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x31f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x320},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1502, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x321},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c0f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x322},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0b05, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x323},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x324},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf006, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x325},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c03, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x326},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1502, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x327},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0c0f, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x328},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0b0a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x329},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x9503, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x32a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xcd3c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x32b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x32c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x644d, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x32d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x43c7, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x32e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd700, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x32f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x37c9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x330},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x8344, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x331},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x33a9, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x332},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x833c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x333},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd702, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x334},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4098, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x335},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x336},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x337},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf019, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x338},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x339},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd048, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x33a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf016, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x33b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd702, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x33c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4098, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x33d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x33e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x33f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf011, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x340},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd13e, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x341},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd049, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x342},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf00e, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x343},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd702, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x344},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x4098, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x345},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x346},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x347},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf009, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x348},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x349},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd049, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x34a},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf006, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x34b},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x34c},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd04b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x34d},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf003, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x34e},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd17a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x34f},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd048, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x350},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1800, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x351},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x093a, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x352},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA10E, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0883, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA10C, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0f32, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA10A, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0676, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA108, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x00fa, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA106, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x021d, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA104, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x12fe, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA102, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x01ca, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA100, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x047f, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA110, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x00ff, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA016, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0020, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA012, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x1ff8, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA014, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd13e, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1ff8},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd15c, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1ff9},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd16b, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1ffa},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xd15d, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1ffb},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0b0e, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1ffc},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0b0e, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1ffd},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0b0e, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1ffe},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0000, RTK_PATCH_CMP_SWC , 0, 0xa014, 0xa012, 0x1fff},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA164, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0972, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA166, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0968, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA168, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0a0b, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA16A, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0a01, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA16C, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0b8a, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA16E, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0bf9, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA170, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x125c, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA172, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x3fff, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0xA162, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x007F, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb820, 7 , 7 , 0x0   , RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+};
+
+rtk_hwpatch_t rtl8264b_algxg_conf[] = {
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x815B, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x75  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x80CD, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x25  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8065, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x15  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8175, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0xa2  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8176, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0xc5  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8077, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x40  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8078, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0xcc  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8969, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x0f  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8957, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x2C  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8959, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x15  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x895A, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x3E  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x895F, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x1E  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8165, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x22  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x827E, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x68  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8167, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x33  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8013, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x39  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8fd7, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x14  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8fd6, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x1e  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8fd5, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x1e  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x82D9, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x20  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x82DA, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x00  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x816E, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0xab  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8159, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x58  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x815A, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x99  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8139, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x25  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8125, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x67  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8126, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x89  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x827D, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x42  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+};
+
+rtk_hwpatch_t rtl8264b_alg_giga_conf[] = {
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x80b8, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 8 , 0x4d  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x80b9, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 8 , 0xcc  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x80ba, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 8 , 0x0   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x80bb, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 13, 8 , 0x0   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x80bc, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 8 , 0x37  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x80bd, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 12, 8 , 0x0c  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x80be, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 8 , 0xBB  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x80bf, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 8 , 0xca  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x80c0, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 8 , 0x45  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x80c2, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 8 , 0x3b  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x80cc, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 8 , 0x16  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x80cd, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 10, 8 , 0x4   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x80ce, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 8 , 0x0   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x80cf, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 13, 8 , 0x0   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x80d0, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 8 , 0x53  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x80d1, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 12, 8 , 0x0a  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x80d2, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 8 , 0xB9  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x80d3, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 8 , 0xd0  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x80d4, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 8 , 0x4a  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x80d6, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 8 , 0x35  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x80a4, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 8 , 0x0d  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x80a5, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 8 , 0xa4  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x80a6, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 8 , 0x59  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x80a7, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 13, 8 , 0x05  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x80a8, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 8 , 0xab  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x80a9, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 12, 8 , 0x0b  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x80aa, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 8 , 0xef  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x80ab, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 8 , 0xae  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x80ac, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 8 , 0xdf  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x80ae, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 8 , 0x28  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x8367, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 8 , 0x5d  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+};
+
+rtk_hwpatch_t rtl8264b_normal_conf[] = {
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xbd92, 15, 0 , 0x002e, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xbd94, 15, 0 , 0x8003, RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xbd96, 3 , 0 , 0xf   , RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xbd96, 3 , 0 , 0x0   , RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xbd94, 15, 0 , 0x800b, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xbd96, 3 , 0 , 0xf   , RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xbd96, 3 , 0 , 0x0   , RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x817D, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 8 , 0x07  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x8426, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 8 , 0x46  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x8428, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 8 , 0x46  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x84de, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0000, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x84e0, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x00fc, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x84e2, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf61a, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x84e4, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 8 , 0x58  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x84e6, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0000, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x84e8, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x00fc, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x84ea, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf61a, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x84ec, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 8 , 0x58  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x84ee, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0000, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x84f0, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x00fc, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x84f2, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0xf61a, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x84f4, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 8 , 0x58  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xae32, 5 , 5 , 0x1   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x8018, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 12, 12, 0x1   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8fdf, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 0 , 0x0496, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8fe1, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 0 , 0x03a5, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8fe3, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 0 , 0x02e5, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8fe5, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 0 , 0x020d, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8fe7, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 0 , 0x0496, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8fe9, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 0 , 0x03a5, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8feb, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 0 , 0x02e5, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8fed, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 0 , 0x020d, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8fef, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 0 , 0x0496, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8ff1, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 0 , 0x03a5, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8ff3, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 0 , 0x02e5, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8ff5, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 0 , 0x020d, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8ff7, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 0 , 0x0496, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8ff9, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 0 , 0x03a5, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8ffb, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 0 , 0x02e5, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8ffd, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 0 , 0x020d, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb516, 6 , 0 , 0x0   , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8fda, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x04  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8fdb, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x05  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8132, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x77  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8134, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x88  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x80ca, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x77  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x80cc, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x88  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8062, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x77  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87c, 15, 0 , 0x8064, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb87e, 15, 8 , 0x88  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa436, 15, 0 , 0x801E, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xa438, 15, 0 , 0x0012, RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+};
+
+rtk_hwpatch_t rtl8264b_dataram_conf[] = {
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb820, 7 , 7 , 0x0   , RTK_PATCH_CMP_WS  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb896, 0 , 0 , 0x0   , RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb892, 15, 8 , 0x0   , RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC037, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0x33  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC038, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0x2A  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC039, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0x25  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC03A, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0x20  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC03B, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0x1C  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC03C, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0x17  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC03D, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0x13  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC075, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0xA1  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC076, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0xB1  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC077, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0x2E  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC078, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0x55  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC079, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0x19  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC07A, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0xDC  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC07B, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0xA0  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC10B, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0xD5  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC10C, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0xD5  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC10D, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0xD5  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC10E, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0xD5  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC10F, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0xD5  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC110, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0xD5  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC149, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0x08  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC14A, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0x08  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC14B, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0x08  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC14C, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0x08  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC14D, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0x08  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC14E, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0x08  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC166, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0xEE  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC167, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0xEE  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC168, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0x07  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC169, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0x09  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC16A, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0x0B  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC16B, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0x0D  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC16C, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0x13  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC16D, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0x0E  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC16E, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0x11  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC16F, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0x14  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC170, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0x17  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC171, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0x15  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC172, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0x10  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC173, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0x0B  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC128, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0xF7  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC129, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0xF7  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC12A, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0xF8  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC12B, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0xF7  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC12C, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0xF6  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC12D, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0xF5  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC12E, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0xF2  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC12F, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0xF7  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC130, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0xF5  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC131, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0xF2  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC132, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0xF0  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC133, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0xF1  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC134, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 15, 8 , 0xF4  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb88e, 15, 0 , 0xC135, RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb890, 7 , 0 , 0xF7  , RTK_PATCH_CMP_WC  , 0, 0, 0, 0},
+    {RTK_PATCH_OP_PHYOCP  , 0xf  , 0     , 0xb896, 0 , 0 , 0x1   , RTK_PATCH_CMP_W   , 0, 0, 0, 0},
+};
+
+rtk_hwpatch_t rtl8264b_rtct_conf[] = {
+};
+

diff --git a/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/error.h b/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/error.h
new file mode 100644 (file)
index 0000000..d99a996
--- /dev/null
+++ b/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/error.h
@@ -0,0 +1,165 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-only
+ *
+ * Copyright (c) 2023 Realtek Semiconductor Corp. All rights reserved.
+ */
+
+#ifndef __COMMON_ERROR_H__
+#define __COMMON_ERROR_H__
+
+/*
+ * Include Files
+ */
+#if defined(RTK_PHYDRV_IN_LINUX)
+  #include "type.h"
+#else
+  #include <common/type.h>
+#endif
+/*
+ * Data Type Declaration
+ */
+typedef enum rt_error_common_e
+{
+    RT_ERR_FAILED = -1,                             /* General Error                                                                    */
+
+    /* 0x0000xxxx for common error code */
+    RT_ERR_OK = 0,                                  /* 0x00000000, OK                                                                   */
+    RT_ERR_INPUT = 0xF001,                          /* 0x0000F001, invalid input parameter                                              */
+    RT_ERR_UNIT_ID,                                 /* 0x0000F002, invalid unit id                                                      */
+    RT_ERR_PORT_ID,                                 /* 0x0000F003, invalid port id                                                      */
+    RT_ERR_PORT_MASK,                               /* 0x0000F004, invalid port mask                                                    */
+    RT_ERR_PORT_LINKDOWN,                           /* 0x0000F005, link down port status                                                */
+    RT_ERR_ENTRY_INDEX,                             /* 0x0000F006, invalid entry index                                                  */
+    RT_ERR_NULL_POINTER,                            /* 0x0000F007, input parameter is null pointer                                      */
+    RT_ERR_QUEUE_ID,                                /* 0x0000F008, invalid queue id                                                     */
+    RT_ERR_QUEUE_NUM,                               /* 0x0000F009, invalid queue number                                                 */
+    RT_ERR_BUSYWAIT_TIMEOUT,                        /* 0x0000F00a, busy watting time out                                                */
+    RT_ERR_MAC,                                     /* 0x0000F00b, invalid mac address                                                  */
+    RT_ERR_OUT_OF_RANGE,                            /* 0x0000F00c, input parameter out of range                                         */
+    RT_ERR_CHIP_NOT_SUPPORTED,                      /* 0x0000F00d, functions not supported by this chip model                           */
+    RT_ERR_SMI,                                     /* 0x0000F00e, SMI error                                                            */
+    RT_ERR_NOT_INIT,                                /* 0x0000F00f, The module is not initial                                            */
+    RT_ERR_CHIP_NOT_FOUND,                          /* 0x0000F010, The chip can not found                                               */
+    RT_ERR_NOT_ALLOWED,                             /* 0x0000F011, actions not allowed by the function                                  */
+    RT_ERR_DRIVER_NOT_FOUND,                        /* 0x0000F012, The driver can not found                                             */
+    RT_ERR_SEM_LOCK_FAILED,                         /* 0x0000F013, Failed to lock semaphore                                             */
+    RT_ERR_SEM_UNLOCK_FAILED,                       /* 0x0000F014, Failed to unlock semaphore                                           */
+    RT_ERR_THREAD_EXIST,                            /* 0x0000F015, Thread exist                                                         */
+    RT_ERR_THREAD_CREATE_FAILED,                    /* 0x0000F016, Thread create fail                                                   */
+    RT_ERR_FWD_ACTION,                              /* 0x0000F017, Invalid forwarding Action                                            */
+    RT_ERR_IPV4_ADDRESS,                            /* 0x0000F018, Invalid IPv4 address                                                 */
+    RT_ERR_IPV6_ADDRESS,                            /* 0x0000F019, Invalid IPv6 address                                                 */
+    RT_ERR_PRIORITY,                                /* 0x0000F01a, Invalid Priority value                                               */
+    RT_ERR_FID,                                     /* 0x0000F01b, invalid fid                                                          */
+    RT_ERR_ENTRY_NOTFOUND,                          /* 0x0000F01c, specified entry not found                                            */
+    RT_ERR_DROP_PRECEDENCE,                         /* 0x0000F01d, invalid drop precedence                                              */
+    RT_ERR_NOT_FINISH,                              /* 0x0000F01e, Action not finish, still need to wait                                */
+    RT_ERR_TIMEOUT,                                 /* 0x0000F01f, Time out                                                             */
+    RT_ERR_REG_ARRAY_INDEX_1,                       /* 0x0000F020, invalid index 1 of register array                                    */
+    RT_ERR_REG_ARRAY_INDEX_2,                       /* 0x0000F021, invalid index 2 of register array                                    */
+    RT_ERR_ETHER_TYPE,                              /* 0x0000F022, invalid ether type                                                   */
+    RT_ERR_MBUF_PKT_NOT_AVAILABLE,                  /* 0x0000F023, mbuf->packet is not available                                        */
+    RT_ERR_QOS_INVLD_RSN,                           /* 0x0000F024, invalid pkt to CPU reason                                            */
+    RT_ERR_CB_FUNCTION_EXIST,                       /* 0x0000F025, Callback function exist                                              */
+    RT_ERR_CB_FUNCTION_FULL,                        /* 0x0000F026, Callback function number is full                                     */
+    RT_ERR_CB_FUNCTION_NOT_FOUND,                   /* 0x0000F027, Callback function can not found                                      */
+    RT_ERR_TBL_FULL,                                /* 0x0000F028, The table is full                                                    */
+    RT_ERR_TRUNK_ID,                                /* 0x0000F029, invalid trunk id                                                     */
+    RT_ERR_TYPE,                                    /* 0x0000F02a, invalid type                                                         */
+    RT_ERR_ENTRY_EXIST,                             /* 0x0000F02b, entry exists                                                         */
+    RT_ERR_CHIP_UNDEFINED_VALUE,                    /* 0x0000F02c, chip returned an undefined value                                     */
+    RT_ERR_EXCEEDS_CAPACITY,                        /* 0x0000F02d, exceeds the capacity of hardware                                     */
+    RT_ERR_ENTRY_REFERRED,                          /* 0x0000F02e, entry is still being referred                                        */
+    RT_ERR_OPER_DENIED,                             /* 0x0000F02f, operation denied                                                     */
+    RT_ERR_PORT_NOT_SUPPORTED,                      /* 0x0000F030, functions not supported by this port                                 */
+    RT_ERR_SOCKET,                                  /* 0x0000F031, socket error                                                         */
+    RT_ERR_MEM_ALLOC,                               /* 0x0000F032, insufficient memory resource                                         */
+    RT_ERR_ABORT,                                   /* 0x0000F033, operation aborted                                                    */
+    RT_ERR_DEV_ID,                                  /* 0x0000F034, invalid device id                                                    */
+    RT_ERR_DRIVER_NOT_SUPPORTED,                    /* 0x0000F035, functions not supported by this driver                               */
+    RT_ERR_NOT_SUPPORTED,                           /* 0x0000F036, functions not supported                                              */
+    RT_ERR_SER,                                     /* 0x0000F037, ECC or parity error                                                  */
+    RT_ERR_MEM_NOT_ALIGN,                           /* 0x0000F038, memory address is not aligned                                        */
+    RT_ERR_SEM_FAKELOCK_OK,                         /* 0x0000F039, attach thread lock a semaphore which was already locked              */
+    RT_ERR_CHECK_FAILED,                            /* 0x0000F03a, check result is failed                                               */
+
+    RT_ERR_COMMON_END = 0xFFFF                      /* The symbol is the latest symbol of common error                                  */
+} rt_error_common_t;
+
+/*
+ * Macro Definition
+ */
+#define RT_PARAM_CHK(expr, errCode)\
+do {\
+    if ((int32)(expr)) {\
+        return errCode; \
+    }\
+} while (0)
+
+#define RT_PARAM_CHK_EHDL(expr, errCode, err_hdl)\
+do {\
+    if ((int32)(expr)) {\
+        {err_hdl}\
+        return errCode; \
+    }\
+} while (0)
+
+#define RT_INIT_CHK(state)\
+do {\
+    if (INIT_COMPLETED != (state)) {\
+        return RT_ERR_NOT_INIT;\
+    }\
+} while (0)
+
+#define RT_INIT_REENTRY_CHK(state)\
+do {\
+    if (INIT_COMPLETED == (state)) {\
+        osal_printf(" %s had already been initialized!\n", __FUNCTION__);\
+        return RT_ERR_OK;\
+    }\
+} while (0)
+
+#define RT_INIT_REENTRY_CHK_NO_WARNING(state)\
+    do {\
+        if (INIT_COMPLETED == (state)) {\
+            return RT_ERR_OK;\
+        }\
+    } while (0)
+
+#define RT_ERR_CHK(op, ret)\
+do {\
+    if ((ret = (op)) != RT_ERR_OK)\
+        return ret;\
+} while(0)
+
+#define RT_ERR_HDL(op, errHandle, ret)\
+do {\
+    if ((ret = (op)) != RT_ERR_OK)\
+        goto errHandle;\
+} while(0)
+
+#define RT_ERR_CHK_EHDL(op, ret, err_hdl)\
+do {\
+    if ((ret = (op)) != RT_ERR_OK)\
+    {\
+        {err_hdl}\
+        return ret;\
+    }\
+} while(0)
+
+#define RT_NULL_HDL(pointer, err_label)\
+do {\
+    if (NULL == (pointer)) {\
+        goto err_label;\
+    }\
+} while (0)
+
+#define RT_ERR_VOID_CHK(op, ret)\
+do {\
+    if ((ret = (op)) != RT_ERR_OK) {\
+        osal_printf("Fail in %s %d, ret %x!\n", __FUNCTION__, __LINE__, ret);\
+        return ;}\
+} while(0)
+
+#endif /* __COMMON_ERROR_H__ */
+

diff --git a/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/phy_patch.c b/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/phy_patch.c
new file mode 100644 (file)
index 0000000..f9af3ff
--- /dev/null
+++ b/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/phy_patch.c
@@ -0,0 +1,179 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-only
+ *
+ * Copyright (c) 2023 Realtek Semiconductor Corp. All rights reserved.
+ */
+
+/*
+ * Include Files
+ */
+#if defined(RTK_PHYDRV_IN_LINUX)
+  #include "rtk_osal.h"
+#else
+  #include <common/rt_type.h>
+  #include <common/rt_error.h>
+  #include <common/debug/rt_log.h>
+  #include <hal/common/halctrl.h>
+  #include <hal/phy/phy_patch.h>
+#endif
+
+/*
+ * Function Declaration
+ */
+uint8 phy_patch_op_translate(uint8 patch_mode, uint8 patch_op, uint8 compare_op)
+{
+    if (patch_mode != PHY_PATCH_MODE_CMP)
+    {
+        return patch_op;
+    }
+    else
+    {
+        switch (compare_op)
+        {
+            case RTK_PATCH_CMP_WS:
+                return RTK_PATCH_OP_SKIP;
+            case RTK_PATCH_CMP_W:
+            case RTK_PATCH_CMP_WC:
+            case RTK_PATCH_CMP_SWC:
+            default:
+                return RTK_PATCH_OP_TO_CMP(patch_op, compare_op);
+        }
+    }
+}
+
+int32 phy_patch_op(rt_phy_patch_db_t *pPhy_patchDb, uint32 unit, rtk_port_t port, uint8 portOffset, uint8 patch_op, uint16 portmask, uint16 pagemmd, uint16 addr, uint8 msb, uint8 lsb, uint16 data, uint8 patch_mode)
+{
+    rtk_hwpatch_t op;
+
+    op.patch_op = patch_op;
+    op.portmask = portmask;
+    op.pagemmd  = pagemmd;
+    op.addr     = addr;
+    op.msb      = msb;
+    op.lsb      = lsb;
+    op.data     = data;
+    op.compare_op = RTK_PATCH_CMP_W;
+
+    return pPhy_patchDb->fPatch_op(unit, port, portOffset, &op, patch_mode);
+}
+
+static int32 _phy_patch_process(uint32 unit, rtk_port_t port, uint8 portOffset, rtk_hwpatch_t *pPatch, int32 size, uint8 patch_mode)
+{
+    int32 i = 0;
+    int32 ret = 0;
+    int32 chk_ret = RT_ERR_OK;
+    int32 n;
+    rtk_hwpatch_t *patch = pPatch;
+    rt_phy_patch_db_t *pPatchDb = NULL;
+
+    PHYPATCH_DB_GET(unit, port, pPatchDb);
+
+    if (size <= 0)
+    {
+        return RT_ERR_OK;
+    }
+    n = size / sizeof(rtk_hwpatch_t);
+
+    for (i = 0; i < n; i++)
+    {
+        ret = pPatchDb->fPatch_op(unit, port, portOffset, &patch[i], patch_mode);
+        if ((ret != RT_ERR_ABORT) && (ret != RT_ERR_OK))
+        {
+            if ((ret == RT_ERR_CHECK_FAILED) && (patch_mode == PHY_PATCH_MODE_CMP))
+            {
+                osal_printf("PATCH CHECK: Failed entry:%u|%u|0x%X|0x%X|%u|%u|0x%X\n",
+                            i + 1, patch[i].patch_op, patch[i].pagemmd, patch[i].addr, patch[i].msb, patch[i].lsb, patch[i].data);
+                chk_ret = RT_ERR_CHECK_FAILED;
+                continue;
+            }
+            else
+            {
+                RT_LOG(LOG_MAJOR_ERR, (MOD_HAL | MOD_PHY), "U%u P%u %s failed! %u[%u][0x%X][0x%X][0x%X] ret=0x%X\n", unit, port, __FUNCTION__,
+                       i+1, patch[i].patch_op, patch[i].pagemmd, patch[i].addr, patch[i].data, ret);
+                return ret;
+            }
+        }
+
+    }
+    return (chk_ret == RT_ERR_CHECK_FAILED) ? chk_ret : RT_ERR_OK;
+}
+
+/* Function Name:
+ *      phy_patch
+ * Description:
+ *      apply initial patch data to PHY
+ * Input:
+ *      unit       - unit id
+ *      port       - port id
+ *      portOffset - the index offset of port based the base port in the PHY chip
+ * Output:
+ *      None
+ * Return:
+ *      RT_ERR_OK
+ *      RT_ERR_FAILED
+ *      RT_ERR_CHECK_FAILED
+ *      RT_ERR_NOT_SUPPORTED
+ * Note:
+ *      None
+ */
+int32 phy_patch(uint32 unit, rtk_port_t port, uint8 portOffset, uint8 patch_mode)
+{
+    int32 ret = RT_ERR_OK;
+    int32 chk_ret = RT_ERR_OK;
+    uint32 i = 0;
+    uint8 patch_type = 0;
+    rt_phy_patch_db_t *pPatchDb = NULL;
+    rtk_hwpatch_seq_t *table = NULL;
+
+    PHYPATCH_DB_GET(unit, port, pPatchDb);
+
+    if ((pPatchDb == NULL) || (pPatchDb->fPatch_op == NULL) || (pPatchDb->fPatch_flow == NULL))
+    {
+        RT_LOG(LOG_MAJOR_ERR, (MOD_HAL | MOD_PHY), "U%u P%u phy_patch, db is NULL\n", unit, port);
+        return RT_ERR_DRIVER_NOT_SUPPORTED;
+    }
+
+    if (patch_mode == PHY_PATCH_MODE_CMP)
+    {
+        table = pPatchDb->cmp_table;
+    }
+    else
+    {
+        table = pPatchDb->seq_table;
+    }
+    RT_LOG(LOG_INFO, (MOD_HAL | MOD_PHY), "phy_patch: U%u P%u portOffset:%u  patch_mode:%u\n", unit, port, portOffset, patch_mode);
+
+    for (i = 0; i < RTK_PATCH_SEQ_MAX; i++)
+    {
+        patch_type = table[i].patch_type;
+        RT_LOG(LOG_INFO, (MOD_HAL | MOD_PHY), "phy_patch: table[%u] patch_type:%u\n", i, patch_type);
+
+        if (RTK_PATCH_TYPE_IS_DATA(patch_type))
+        {
+            ret = _phy_patch_process(unit, port, portOffset, table[i].patch.data.conf, table[i].patch.data.size, patch_mode);
+
+            if (ret == RT_ERR_CHECK_FAILED)
+                chk_ret = ret;
+            else if (ret  != RT_ERR_OK)
+            {
+                RT_LOG(LOG_MAJOR_ERR, (MOD_HAL | MOD_PHY), "U%u P%u patch_mode:%u id:%u patch-%u failed. ret:0x%X\n", unit, port, patch_mode, i, patch_type, ret);
+                return ret;
+            }
+        }
+        else if (RTK_PATCH_TYPE_IS_FLOW(patch_type))
+        {
+            RT_ERR_CHK_EHDL(pPatchDb->fPatch_flow(unit, port, portOffset, table[i].patch.flow_id, patch_mode),
+                            ret, RT_LOG(LOG_MAJOR_ERR, (MOD_HAL | MOD_PHY), "U%u P%u patch_mode:%u id:%u patch-%u failed. ret:0x%X\n", unit, port, patch_mode, i, patch_type, ret););
+        }
+        else
+        {
+            break;
+        }
+    }
+
+    return (chk_ret == RT_ERR_CHECK_FAILED) ? chk_ret : RT_ERR_OK;
+}
+
+
+
+

diff --git a/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/phy_patch.h b/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/phy_patch.h
new file mode 100644 (file)
index 0000000..c2b7b12
--- /dev/null
+++ b/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/phy_patch.h
@@ -0,0 +1,174 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-only
+ *
+ * Copyright (c) 2023 Realtek Semiconductor Corp. All rights reserved.
+ */
+
+#ifndef __HAL_PHY_PATCH_H__
+#define __HAL_PHY_PATCH_H__
+
+/*
+ * Include Files
+ */
+#if defined(RTK_PHYDRV_IN_LINUX)
+  #include "rtk_phylib_def.h"
+#else
+  #include <common/rt_type.h>
+  #include <common/rt_autoconf.h>
+#endif
+
+/*
+ * Symbol Definition
+ */
+#define PHYPATCH_PHYCTRL_IN_HALCTRL   0  /* 3.6.x: 1 ,4.0.x: 1, 4.1.x+: 0 */
+#define PHYPATCH_FMAILY_IN_HWP        0  /* 3.6.x: 1 ,4.0.x: 0, 4.1.x+: 0 */
+#define PHY_PATCH_MODE_BCAST_DEFAULT  PHY_PATCH_MODE_BCAST  /* 3.6.x: PHY_PATCH_MODE_BCAST_BUS ,4.0.x+: PHY_PATCH_MODE_BCAST */
+
+#define PHY_PATCH_MODE_NORMAL       0
+#define PHY_PATCH_MODE_CMP          1
+#define PHY_PATCH_MODE_BCAST        2
+#define PHY_PATCH_MODE_BCAST_BUS    3
+
+#define RTK_PATCH_CMP_W        0  /* write */
+#define RTK_PATCH_CMP_WC       1  /* compare */
+#define RTK_PATCH_CMP_SWC      2  /* sram compare */
+#define RTK_PATCH_CMP_WS       3  /* skip */
+
+#define RTK_PATCH_OP_SECTION_SIZE           50
+#define RTK_PATCH_OP_TO_CMP(_op, _cmp)       (_op + (RTK_PATCH_OP_SECTION_SIZE * _cmp))
+/* 0~49 normal op */
+#define RTK_PATCH_OP_PHY                     0
+#define RTK_PATCH_OP_PHYOCP                  1
+#define RTK_PATCH_OP_TOP                     2
+#define RTK_PATCH_OP_TOPOCP                  3
+#define RTK_PATCH_OP_PSDS0                   4
+#define RTK_PATCH_OP_PSDS1                   5
+#define RTK_PATCH_OP_MSDS                    6
+#define RTK_PATCH_OP_MAC                     7
+
+/* 50~99 normal op for compare */
+#define RTK_PATCH_OP_CMP_PHY                 RTK_PATCH_OP_TO_CMP(RTK_PATCH_OP_PHY     , RTK_PATCH_CMP_WC)
+#define RTK_PATCH_OP_CMP_PHYOCP              RTK_PATCH_OP_TO_CMP(RTK_PATCH_OP_PHYOCP  , RTK_PATCH_CMP_WC)
+#define RTK_PATCH_OP_CMP_TOP                 RTK_PATCH_OP_TO_CMP(RTK_PATCH_OP_TOP     , RTK_PATCH_CMP_WC)
+#define RTK_PATCH_OP_CMP_TOPOCP              RTK_PATCH_OP_TO_CMP(RTK_PATCH_OP_TOPOCP  , RTK_PATCH_CMP_WC)
+#define RTK_PATCH_OP_CMP_PSDS0               RTK_PATCH_OP_TO_CMP(RTK_PATCH_OP_PSDS0   , RTK_PATCH_CMP_WC)
+#define RTK_PATCH_OP_CMP_PSDS1               RTK_PATCH_OP_TO_CMP(RTK_PATCH_OP_PSDS1   , RTK_PATCH_CMP_WC)
+#define RTK_PATCH_OP_CMP_MSDS                RTK_PATCH_OP_TO_CMP(RTK_PATCH_OP_MSDS    , RTK_PATCH_CMP_WC)
+#define RTK_PATCH_OP_CMP_MAC                 RTK_PATCH_OP_TO_CMP(RTK_PATCH_OP_MAC     , RTK_PATCH_CMP_WC)
+
+/* 100~149 normal op for sram compare */
+#define RTK_PATCH_OP_CMP_SRAM_PHY            RTK_PATCH_OP_TO_CMP(RTK_PATCH_OP_PHY     , RTK_PATCH_CMP_SWC)
+#define RTK_PATCH_OP_CMP_SRAM_PHYOCP         RTK_PATCH_OP_TO_CMP(RTK_PATCH_OP_PHYOCP  , RTK_PATCH_CMP_SWC)
+#define RTK_PATCH_OP_CMP_SRAM_TOP            RTK_PATCH_OP_TO_CMP(RTK_PATCH_OP_TOP     , RTK_PATCH_CMP_SWC)
+#define RTK_PATCH_OP_CMP_SRAM_TOPOCP         RTK_PATCH_OP_TO_CMP(RTK_PATCH_OP_TOPOCP  , RTK_PATCH_CMP_SWC)
+#define RTK_PATCH_OP_CMP_SRAM_PSDS0          RTK_PATCH_OP_TO_CMP(RTK_PATCH_OP_PSDS0   , RTK_PATCH_CMP_SWC)
+#define RTK_PATCH_OP_CMP_SRAM_PSDS1          RTK_PATCH_OP_TO_CMP(RTK_PATCH_OP_PSDS1   , RTK_PATCH_CMP_SWC)
+#define RTK_PATCH_OP_CMP_SRAM_MSDS           RTK_PATCH_OP_TO_CMP(RTK_PATCH_OP_MSDS    , RTK_PATCH_CMP_SWC)
+#define RTK_PATCH_OP_CMP_SRAM_MAC            RTK_PATCH_OP_TO_CMP(RTK_PATCH_OP_MAC     , RTK_PATCH_CMP_SWC)
+
+/* 200~255 control op */
+#define RTK_PATCH_OP_DELAY_MS                200
+#define RTK_PATCH_OP_SKIP                    255
+
+
+/*
+   patch type  PHY_PATCH_TYPE_NONE => empty
+   patch type: PHY_PATCH_TYPE_TOP ~ (PHY_PATCH_TYPE_END-1)  => data array
+   patch type: PHY_PATCH_TYPE_END ~ (PHY_PATCH_TYPE_END + RTK_PATCH_TYPE_FLOW_MAX)  => flow
+*/
+#define RTK_PATCH_TYPE_IS_DATA(_patch_type)    (_patch_type > PHY_PATCH_TYPE_NONE && _patch_type < PHY_PATCH_TYPE_END)
+#define RTK_PATCH_TYPE_IS_FLOW(_patch_type)    (_patch_type >= PHY_PATCH_TYPE_END && _patch_type <= (PHY_PATCH_TYPE_END + RTK_PATCH_TYPE_FLOWID_MAX))
+
+
+/*
+ * Macro Definition
+ */
+#if PHYPATCH_PHYCTRL_IN_HALCTRL
+  #define PHYPATCH_DB_GET(_unit, _port, _pPatchDb) \
+    do {\
+        hal_control_t   *pHalCtrl = NULL;\
+        if ((pHalCtrl = hal_ctrlInfo_get(_unit)) == NULL)\
+            return RT_ERR_FAILED;\
+        _pPatchDb = (pHalCtrl->pPhy_ctrl[_port]->pPhy_patchDb);\
+    } while(0)
+#else
+  #if defined(RTK_PHYDRV_IN_LINUX)
+  #else
+    #include <hal/phy/phydef.h>
+    #include <hal/phy/phy_probe.h>
+  #endif
+  #define PHYPATCH_DB_GET(_unit, _port, _pPatchDb) \
+    do {\
+        rt_phyctrl_t *pPhyCtrl = NULL;\
+        if ((pPhyCtrl = phy_phyctrl_get(_unit, _port)) == NULL)\
+            return RT_ERR_FAILED;\
+        _pPatchDb = (pPhyCtrl->pPhy_patchDb);\
+    } while(0)
+#endif
+
+#if PHYPATCH_FMAILY_IN_HWP
+  #define PHYPATCH_IS_RTKSDS(_unit) (HWP_9300_FAMILY_ID(_unit) || HWP_9310_FAMILY_ID(_unit))
+#else
+  #define PHYPATCH_IS_RTKSDS(_unit) (RTK_9300_FAMILY_ID(_unit) || RTK_9310_FAMILY_ID(_unit) || RTK_9311B_FAMILY_ID(_unit) || RTK_9330_FAMILY_ID(_unit))
+#endif
+
+#define PHYPATCH_TABLE_ASSIGN(_pPatchDb, _table, _idx, _patch_type, _para) \
+    do {\
+        if (RTK_PATCH_TYPE_IS_DATA(_patch_type)) {\
+            _pPatchDb->_table[_idx].patch_type = _patch_type;\
+            _pPatchDb->_table[_idx].patch.data.conf = _para;\
+            _pPatchDb->_table[_idx].patch.data.size = sizeof(_para);\
+        }\
+        else if (RTK_PATCH_TYPE_IS_FLOW(_patch_type)) {\
+            _pPatchDb->_table[_idx].patch_type = _patch_type;\
+            _pPatchDb->_table[_idx].patch.flow_id = _patch_type;\
+        }\
+        else {\
+            _pPatchDb->_table[_idx].patch_type = PHY_PATCH_TYPE_NONE;\
+        }\
+    } while(0)
+#define PHYPATCH_SEQ_TABLE_ASSIGN(_pPatchDb, _idx, _patch_type, _para) PHYPATCH_TABLE_ASSIGN(_pPatchDb, seq_table, _idx, _patch_type, _para)
+#define PHYPATCH_CMP_TABLE_ASSIGN(_pPatchDb, _idx, _patch_type, _para) PHYPATCH_TABLE_ASSIGN(_pPatchDb, cmp_table, _idx, _patch_type, _para)
+
+#define PHYPATCH_COMPARE(_mmdpage, _reg, _msb, _lsb, _exp, _real, _mask) \
+    do {\
+        uint32 _rData = REG32_FIELD_GET(_real, _lsb, _mask);\
+        if (_exp != _rData) {\
+            osal_printf("PATCH CHECK: %u(0x%X).%u(0x%X)[%u:%u] = 0x%X (!= 0x%X)\n", _mmdpage, _mmdpage, _reg, _reg, _msb, _lsb, _rData, _exp);\
+            return RT_ERR_CHECK_FAILED;\
+        }\
+    } while (0)
+
+/*
+ * Function Declaration
+ */
+
+extern uint8 phy_patch_op_translate(uint8 patch_mode, uint8 patch_op, uint8 compare_op);
+extern int32 phy_patch_op(rt_phy_patch_db_t *pPhy_patchDb, uint32 unit, rtk_port_t port, uint8 portOffset,
+                            uint8 patch_op, uint16 portmask, uint16 pagemmd, uint16 addr, uint8 msb, uint8 lsb, uint16 data,
+                            uint8 patch_mode);
+
+
+/* Function Name:
+ *      phy_patch
+ * Description:
+ *      apply initial patch data to PHY
+ * Input:
+ *      unit       - unit id
+ *      port       - port id
+ *      portOffset - the index offset of port based the base port in the PHY chip
+ * Output:
+ *      None
+ * Return:
+ *      RT_ERR_OK
+ *      RT_ERR_FAILED
+ *      RT_ERR_CHECK_FAILED
+ *      RT_ERR_NOT_SUPPORTED
+ * Note:
+ *      None
+ */
+extern int32 phy_patch(uint32 unit, rtk_port_t port, uint8 portOffset, uint8 patch_mode);
+
+
+
+#endif /* __HAL_PHY_PATCH_H__ */

diff --git a/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/phy_rtl826xb_patch.c b/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/phy_rtl826xb_patch.c
new file mode 100644 (file)
index 0000000..90a792a
--- /dev/null
+++ b/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/phy_rtl826xb_patch.c
@@ -0,0 +1,1031 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-only
+ *
+ * Copyright (c) 2023 Realtek Semiconductor Corp. All rights reserved.
+ */
+
+/*
+ * Include Files
+ */
+#if defined(RTK_PHYDRV_IN_LINUX)
+  #include "phy_rtl826xb_patch.h"
+  #include "construct/conf_rtl8264b.c"
+  #include "construct/conf_rtl8261n_c.c"
+#else
+  #include <common/rt_type.h>
+  #include <common/rt_error.h>
+  #include <common/debug/rt_log.h>
+  #include <soc/type.h>
+  #include <hal/common/halctrl.h>
+  #include <hal/mac/miim_common_drv.h>
+  #include <hal/phy/phy_construct.h>
+  #include <osal/time.h>
+  #include <hal/phy/construct/conftypes.h>
+  #include <hal/phy/phy_probe.h>
+  #include <hal/phy/phy_patch.h>
+  #include <osal/memory.h>
+  #if defined(CONFIG_SDK_RTL826XB)
+    #include <hal/phy/phy_rtl826xb.h>
+    #include <hal/phy/construct/conf_rtl8264b.c>
+    #include <hal/phy/construct/conf_rtl8261n_c.c>
+  #endif
+#endif
+/*
+ * Symbol Definition
+ */
+#define PHY_PATCH_WAIT_TIMEOUT     10000000
+
+#define PHY_PATCH_LOG    LOG_INFO
+
+/*
+ * Data Declaration
+ */
+
+/*
+ * Macro Declaration
+ */
+
+/*
+ * Function Declaration
+ */
+static uint16 _phy_rtl826xb_mmd_convert(uint16 page, uint16 addr)
+{
+    uint16 reg = 0;
+    if (addr < 16)
+    {
+        reg = 0xA400 + (page * 2);
+    }
+    else if (addr < 24)
+    {
+        reg = (16*page) + ((addr - 16) * 2);
+    }
+    else
+    {
+        reg = 0xA430 + ((addr - 24) * 2);
+    }
+    return reg;
+}
+
+int32
+_phy_rtl826xb_patch_wait(uint32 unit, rtk_port_t port, uint32 mmdAddr, uint32 mmdReg, uint32 data, uint32 mask, uint8 patch_mode)
+{
+    int32  ret = 0;
+    uint32 rData = 0;
+    uint32 cnt = 0;
+    WAIT_COMPLETE_VAR()
+
+    rtk_port_t  p = 0;
+    uint8  smiBus = HWP_PORT_SMI(unit, port);
+    uint32 phyChip = HWP_PHY_MODEL_BY_PORT(unit, port);
+    uint8  bcast_phyad = HWP_PHY_ADDR(unit, port);;
+
+
+    if (patch_mode == PHY_PATCH_MODE_BCAST_BUS)
+    {
+        if ((ret = phy_826xb_ctrl_set(unit, port, RTK_PHY_CTRL_MIIM_BCAST, 0)) != RT_ERR_OK)
+        {
+            RT_LOG(LOG_MAJOR_ERR, (MOD_HAL | MOD_PHY), "U%u P%u 826XB patch wait disable broadcast failed! 0x%X\n", unit, p, ret);
+            return ret;
+        }
+
+        HWP_PORT_TRAVS_EXCEPT_CPU(unit, p)
+        {
+            if ((HWP_PORT_SMI(unit, p) == smiBus) && (HWP_PHY_MODEL_BY_PORT(unit, p) == phyChip))
+            {
+                WAIT_COMPLETE(PHY_PATCH_WAIT_TIMEOUT)
+                {
+                    if ((ret = phy_common_general_reg_mmd_get(unit, p, mmdAddr, mmdReg, &rData)) != RT_ERR_OK)
+                    {
+                        return ret;
+                    }
+                    ++cnt;
+
+                    if ((rData & mask) == data)
+                        break;
+
+                    //osal_time_udelay(10);
+                }
+
+                if (WAIT_COMPLETE_IS_TIMEOUT())
+                {
+                    RT_LOG(LOG_MAJOR_ERR, (MOD_HAL | MOD_PHY), "U%u P%u 826XB patch wait[%u,0x%X,0x%X,0x%X]:0x%X cnt:%u\n", unit, p, mmdAddr, mmdReg, data, mask, rData, cnt);
+                    return RT_ERR_TIMEOUT;
+                }
+            }
+        }
+
+        osal_time_mdelay(1);
+        //for port in same SMI bus, set mdio broadcast ENABLE
+        HWP_PORT_TRAVS_EXCEPT_CPU(unit, p)
+        {
+            if ((HWP_PORT_SMI(unit, p) == smiBus) && (HWP_PHY_MODEL_BY_PORT(unit, p) == phyChip))
+            {
+                if ((ret = phy_826xb_ctrl_set(unit, p, RTK_PHY_CTRL_MIIM_BCAST_PHYAD, (uint32)bcast_phyad)) != RT_ERR_OK)
+                {
+                    RT_LOG(LOG_MAJOR_ERR, (MOD_HAL | MOD_PHY), "U%u P%u 826XB patch wait set broadcast PHYAD failed! 0x%X\n", unit, p, ret);
+                    return ret;
+                }
+
+                if ((ret = phy_826xb_ctrl_set(unit, p, RTK_PHY_CTRL_MIIM_BCAST, 1)) != RT_ERR_OK)
+                {
+                    RT_LOG(LOG_MAJOR_ERR, (MOD_HAL | MOD_PHY), "U%u P%u 826XB patch wait enable broadcast failed! 0x%X\n", unit, p, ret);
+                    return ret;
+                }
+            }
+        }
+    }
+    else if (patch_mode == PHY_PATCH_MODE_BCAST)
+    {
+        if ((ret = phy_826xb_ctrl_set(unit, port, RTK_PHY_CTRL_MIIM_BCAST, 0)) != RT_ERR_OK)
+        {
+            RT_LOG(LOG_MAJOR_ERR, (MOD_HAL | MOD_PHY), "U%u P%u 826x patch wait disable broadcast failed! 0x%X\n", unit, p, ret);
+            return ret;
+        }
+
+        HWP_PORT_TRAVS_EXCEPT_CPU(unit, p)
+        {
+            if (HWP_PHY_BASE_MACID(unit, p) == HWP_PHY_BASE_MACID(unit, port))
+            {
+                WAIT_COMPLETE(PHY_PATCH_WAIT_TIMEOUT)
+                {
+                    if ((ret = phy_common_general_reg_mmd_get(unit, p, mmdAddr, mmdReg, &rData)) != RT_ERR_OK)
+                    {
+                        return ret;
+                    }
+                    ++cnt;
+
+                    if ((rData & mask) == data)
+                        break;
+                    //osal_time_udelay(10);
+                }
+
+                if (WAIT_COMPLETE_IS_TIMEOUT())
+                {
+                    RT_LOG(LOG_MAJOR_ERR, (MOD_HAL | MOD_PHY), "U%u P%u 826x patch wait[%u,0x%X,0x%X,0x%X]:0x%X cnt:%u\n", unit, p, mmdAddr, mmdReg, data, mask, rData, cnt);
+                    return RT_ERR_TIMEOUT;
+                }
+            }
+        }
+
+        osal_time_mdelay(1);
+        //for port in same PHY, set mdio broadcast ENABLE
+        HWP_PORT_TRAVS_EXCEPT_CPU(unit, p)
+        {
+            if (HWP_PHY_BASE_MACID(unit, p) == HWP_PHY_BASE_MACID(unit, port))
+            {
+                if ((ret = phy_826xb_ctrl_set(unit, p, RTK_PHY_CTRL_MIIM_BCAST_PHYAD, (uint32)bcast_phyad)) != RT_ERR_OK)
+                {
+                    RT_LOG(LOG_MAJOR_ERR, (MOD_HAL | MOD_PHY), "U%u P%u 826XB patch wait set broadcast PHYAD failed! 0x%X\n", unit, p, ret);
+                    return ret;
+                }
+
+                if ((ret = phy_826xb_ctrl_set(unit, p, RTK_PHY_CTRL_MIIM_BCAST, 1)) != RT_ERR_OK)
+                {
+                    RT_LOG(LOG_MAJOR_ERR, (MOD_HAL | MOD_PHY), "U%u P%u 826XB patch wait enable broadcast failed! 0x%X\n", unit, p, ret);
+                    return ret;
+                }
+            }
+        }
+    }
+    else
+    {
+        WAIT_COMPLETE(PHY_PATCH_WAIT_TIMEOUT)
+        {
+            if ((ret = phy_common_general_reg_mmd_get(unit, port, mmdAddr, mmdReg, &rData)) != RT_ERR_OK)
+                return ret;
+
+            ++cnt;
+            if ((rData & mask) == data)
+                break;
+
+            osal_time_mdelay(1);
+        }
+
+        if (WAIT_COMPLETE_IS_TIMEOUT())
+        {
+            RT_LOG(LOG_MAJOR_ERR, (MOD_HAL | MOD_PHY), "U%u P%u 826XB patch wait[%u,0x%X,0x%X,0x%X]:0x%X cnt:%u\n", unit, port, mmdAddr, mmdReg, data, mask, rData, cnt);
+            return RT_ERR_TIMEOUT;
+        }
+    }
+
+    return RT_ERR_OK;
+}
+
+int32
+_phy_rtl826xb_patch_wait_not_equal(uint32 unit, rtk_port_t port, uint32 mmdAddr, uint32 mmdReg, uint32 data, uint32 mask, uint8 patch_mode)
+{
+    int32  ret = 0;
+    uint32 rData = 0;
+    uint32 cnt = 0;
+    WAIT_COMPLETE_VAR()
+
+    rtk_port_t  p = 0;
+    uint8  smiBus = HWP_PORT_SMI(unit, port);
+    uint32 phyChip = HWP_PHY_MODEL_BY_PORT(unit, port);
+    uint8  bcast_phyad = HWP_PHY_ADDR(unit, port);
+
+    if (patch_mode == PHY_PATCH_MODE_BCAST_BUS)
+    {
+        if ((ret = phy_826xb_ctrl_set(unit, port, RTK_PHY_CTRL_MIIM_BCAST, 0)) != RT_ERR_OK)
+        {
+            RT_LOG(LOG_MAJOR_ERR, (MOD_HAL | MOD_PHY), "U%u P%u 826XB patch wait disable broadcast failed! 0x%X\n", unit, p, ret);
+            return ret;
+        }
+
+        HWP_PORT_TRAVS_EXCEPT_CPU(unit, p)
+        {
+            if ((HWP_PORT_SMI(unit, p) == smiBus) && (HWP_PHY_MODEL_BY_PORT(unit, p) == phyChip))
+            {
+                WAIT_COMPLETE(PHY_PATCH_WAIT_TIMEOUT)
+                {
+                    if ((ret = phy_common_general_reg_mmd_get(unit, p, mmdAddr, mmdReg, &rData)) != RT_ERR_OK)
+                    {
+                        return ret;
+                    }
+                    ++cnt;
+
+                    if ((rData & mask) != data)
+                        break;
+
+                    //osal_time_udelay(10);
+                }
+                if (WAIT_COMPLETE_IS_TIMEOUT())
+                {
+                    RT_LOG(LOG_MAJOR_ERR, (MOD_HAL | MOD_PHY), "U%u P%u 826XB patch wait[%u,0x%X,0x%X,0x%X]:0x%X cnt:%u\n", unit, p, mmdAddr, mmdReg, data, mask, rData, cnt);
+                    return RT_ERR_TIMEOUT;
+                }
+            }
+        }
+
+        osal_time_mdelay(1);
+        //for port in same SMI bus, set mdio broadcast ENABLE
+        HWP_PORT_TRAVS_EXCEPT_CPU(unit, p)
+        {
+            if ((HWP_PORT_SMI(unit, p) == smiBus) && (HWP_PHY_MODEL_BY_PORT(unit, p) == phyChip))
+            {
+                if ((ret = phy_826xb_ctrl_set(unit, p, RTK_PHY_CTRL_MIIM_BCAST_PHYAD, (uint32)bcast_phyad)) != RT_ERR_OK)
+                {
+                    RT_LOG(LOG_MAJOR_ERR, (MOD_HAL | MOD_PHY), "U%u P%u 826XB patch wait set broadcast PHYAD failed! 0x%X\n", unit, p, ret);
+                    return ret;
+                }
+
+                if ((ret = phy_826xb_ctrl_set(unit, p, RTK_PHY_CTRL_MIIM_BCAST, 1)) != RT_ERR_OK)
+                {
+                    RT_LOG(LOG_MAJOR_ERR, (MOD_HAL | MOD_PHY), "U%u P%u 826XB patch wait enable broadcast failed! 0x%X\n", unit, p, ret);
+                    return ret;
+                }
+            }
+        }
+    }
+    else if (patch_mode == PHY_PATCH_MODE_BCAST)
+    {
+        if ((ret = phy_826xb_ctrl_set(unit, port, RTK_PHY_CTRL_MIIM_BCAST, 0)) != RT_ERR_OK)
+        {
+            RT_LOG(LOG_MAJOR_ERR, (MOD_HAL | MOD_PHY), "U%u P%u 826x patch wait disable broadcast failed! 0x%X\n", unit, p, ret);
+            return ret;
+        }
+
+        HWP_PORT_TRAVS_EXCEPT_CPU(unit, p)
+        {
+            if (HWP_PHY_BASE_MACID(unit, p) == HWP_PHY_BASE_MACID(unit, port))
+            {
+                WAIT_COMPLETE(PHY_PATCH_WAIT_TIMEOUT)
+                {
+                    if ((ret = phy_common_general_reg_mmd_get(unit, p, mmdAddr, mmdReg, &rData)) != RT_ERR_OK)
+                    {
+                        return ret;
+                    }
+                    ++cnt;
+
+                    if (((rData & mask) != data))
+                        break;
+
+                    //osal_time_udelay(10);
+                }
+
+                if (WAIT_COMPLETE_IS_TIMEOUT())
+                {
+                    RT_LOG(LOG_MAJOR_ERR, (MOD_HAL | MOD_PHY), "U%u P%u 826XB patch wait[%u,0x%X,0x%X,0x%X]:0x%X cnt:%u\n", unit, p, mmdAddr, mmdReg, data, mask, rData, cnt);
+                    return RT_ERR_TIMEOUT;
+                }
+            }
+        }
+
+        osal_time_mdelay(1);
+        //for port in same PHY, set mdio broadcast ENABLE
+        HWP_PORT_TRAVS_EXCEPT_CPU(unit, p)
+        {
+            if (HWP_PHY_BASE_MACID(unit, p) == HWP_PHY_BASE_MACID(unit, port))
+            {
+                if ((ret = phy_826xb_ctrl_set(unit, p, RTK_PHY_CTRL_MIIM_BCAST_PHYAD, (uint32)bcast_phyad)) != RT_ERR_OK)
+                {
+                    RT_LOG(LOG_MAJOR_ERR, (MOD_HAL | MOD_PHY), "U%u P%u 826XB patch wait set broadcast PHYAD failed! 0x%X\n", unit, p, ret);
+                    return ret;
+                }
+
+                if ((ret = phy_826xb_ctrl_set(unit, p, RTK_PHY_CTRL_MIIM_BCAST, 1)) != RT_ERR_OK)
+                {
+                    RT_LOG(LOG_MAJOR_ERR, (MOD_HAL | MOD_PHY), "U%u P%u 826XB patch wait enable broadcast failed! 0x%X\n", unit, p, ret);
+                    return ret;
+                }
+            }
+        }
+    }
+    else
+    {
+        WAIT_COMPLETE(PHY_PATCH_WAIT_TIMEOUT)
+        {
+            if ((ret = phy_common_general_reg_mmd_get(unit, port, mmdAddr, mmdReg, &rData)) != RT_ERR_OK)
+                return ret;
+
+            ++cnt;
+            if ((rData & mask) != data)
+                break;
+
+            osal_time_mdelay(1);
+        }
+        if (WAIT_COMPLETE_IS_TIMEOUT())
+        {
+            RT_LOG(LOG_MAJOR_ERR, (MOD_HAL | MOD_PHY), "U%u P%u 826xb patch wait[%u,0x%X,0x%X,0x%X]:0x%X cnt:%u\n", unit, port, mmdAddr, mmdReg, data, mask, rData, cnt);
+            return RT_ERR_TIMEOUT;
+        }
+
+    }
+
+    return RT_ERR_OK;
+}
+
+int32
+_phy_rtl826xb_patch_top_get(uint32 unit, rtk_port_t port, uint32 topPage, uint32 topReg, uint32 *pData)
+{
+    int32  ret = 0;
+    uint32 rData = 0;
+    uint32 topAddr = (topPage * 8) + (topReg - 16);
+
+    if ((ret = phy_common_general_reg_mmd_get(unit, port, PHY_MMD_VEND1, topAddr, &rData)) != RT_ERR_OK)
+        return ret;
+    *pData = rData;
+    return RT_ERR_OK;
+}
+
+int32
+_phy_rtl826xb_patch_top_set(uint32 unit, rtk_port_t port, uint32 topPage, uint32 topReg, uint32 wData)
+{
+    int32  ret = 0;
+    uint32 topAddr = (topPage * 8) + (topReg - 16);
+    if ((ret = phy_common_general_reg_mmd_set(unit, port, PHY_MMD_VEND1, topAddr, wData)) != RT_ERR_OK)
+        return ret;
+    return RT_ERR_OK;
+}
+
+int32
+_phy_rtl826xb_patch_sds_get(uint32 unit, rtk_port_t port, uint32 sdsPage, uint32 sdsReg, uint32 *pData)
+{
+    int32  ret = 0;
+    uint32 rData = 0;
+    uint32 sdsAddr = 0x8000 + (sdsReg << 6) + sdsPage;
+
+    if ((ret = _phy_rtl826xb_patch_top_set(unit, port, 40, 19, sdsAddr)) != RT_ERR_OK)
+        return ret;
+    if ((ret = _phy_rtl826xb_patch_top_get(unit, port, 40, 18, &rData)) != RT_ERR_OK)
+        return ret;
+    *pData = rData;
+    return _phy_rtl826xb_patch_wait(unit, port, PHY_MMD_VEND1, 0x143, 0, BIT_15, PHY_PATCH_MODE_NORMAL);
+}
+
+int32
+_phy_rtl826xb_patch_sds_set(uint32 unit, rtk_port_t port, uint32 sdsPage, uint32 sdsReg, uint32 wData, uint8 patch_mode)
+{
+    int32  ret = 0;
+    uint32 sdsAddr = 0x8800 + (sdsReg << 6) + sdsPage;
+
+    if ((ret = _phy_rtl826xb_patch_top_set(unit, port, 40, 17, wData)) != RT_ERR_OK)
+        return ret;
+    if ((ret = _phy_rtl826xb_patch_top_set(unit, port, 40, 19, sdsAddr)) != RT_ERR_OK)
+        return ret;
+    return _phy_rtl826xb_patch_wait(unit, port, PHY_MMD_VEND1, 0x143, 0, BIT_15, patch_mode);
+}
+
+static int32 _phy_rtl826xb_flow_r1(uint32 unit, rtk_port_t port, uint8 portOffset, uint8 patch_mode)
+{
+    int32 ret = RT_ERR_OK;
+    rt_phy_patch_db_t *pPatchDb = NULL;
+
+    PHYPATCH_DB_GET(unit, port, pPatchDb);
+
+    //PHYReg_bit w $PHYID 0xb82 16 4 4 0x1
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHY, 0xFF, 0xb82, 16, 4, 4, 0x1, patch_mode), ret);
+    //PHYReg_bit w $PHYID 0xb82 16 4 4 0x1
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHY, 0xFF, 0xb82, 16, 4, 4, 0x1, patch_mode), ret);
+
+    //set patch_rdy [PHYReg_bit r $PHYID 0xb80 16 6 6] ; Wait for patch ready = 1
+    RT_ERR_CHK(_phy_rtl826xb_patch_wait(unit, port, 31, _phy_rtl826xb_mmd_convert(0xb80, 16), BIT_6, BIT_6, patch_mode), ret);
+
+    //PHYReg w $PHYID 0xa43 27 $0x8023
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHY, 0xFF, 0xa43, 27, 15, 0, 0x8023, patch_mode), ret);
+    //PHYReg w $PHYID 0xa43 28 $0x3802
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHY, 0xFF, 0xa43, 28, 15, 0, 0x3802, patch_mode), ret);
+    //PHYReg w $PHYID 0xa43 27 0xB82E
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHY, 0xFF, 0xa43, 27, 15, 0, 0xB82E, patch_mode), ret);
+    //PHYReg w $PHYID 0xa43 28 0x1
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHY, 0xFF, 0xa43, 28, 15, 0, 0x1, patch_mode), ret);
+
+     return RT_ERR_OK;
+}
+
+static int32 _phy_rtl826xb_flow_r12(uint32 unit, rtk_port_t port, uint8 portOffset, uint8 patch_mode)
+{
+    int32 ret = RT_ERR_OK;
+    rt_phy_patch_db_t *pPatchDb = NULL;
+
+    PHYPATCH_DB_GET(unit, port, pPatchDb);
+
+    //PHYReg_bit w $PHYID 0xb82 16 4 4 0x1
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHY, 0xFF, 0xb82, 16, 4, 4, 0x1, patch_mode), ret);
+    //PHYReg_bit w $PHYID 0xb82 16 4 4 0x1
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHY, 0xFF, 0xb82, 16, 4, 4, 0x1, patch_mode), ret);
+
+    //set patch_rdy [PHYReg_bit r $PHYID 0xb80 16 6 6] ; Wait for patch ready = 1
+    RT_ERR_CHK(_phy_rtl826xb_patch_wait(unit, port, 31, _phy_rtl826xb_mmd_convert(0xb80, 16), BIT_6, BIT_6, patch_mode), ret);
+
+    //PHYReg w $PHYID 0xa43 27 $0x8023
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHY, 0xFF, 0xa43, 27, 15, 0, 0x8023, patch_mode), ret);
+    //PHYReg w $PHYID 0xa43 28 $0x3800
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHY, 0xFF, 0xa43, 28, 15, 0, 0x3800, patch_mode), ret);
+    //PHYReg w $PHYID 0xa43 27 0xB82E
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHY, 0xFF, 0xa43, 27, 15, 0, 0xB82E, patch_mode), ret);
+    //PHYReg w $PHYID 0xa43 28 0x1
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHY, 0xFF, 0xa43, 28, 15, 0, 0x1, patch_mode), ret);
+
+    return RT_ERR_OK;
+}
+
+
+static int32 _phy_rtl826xb_flow_r2(uint32 unit, rtk_port_t port, uint8 portOffset, uint8 patch_mode)
+{
+    int32 ret = RT_ERR_OK;
+    rt_phy_patch_db_t *pPatchDb = NULL;
+
+    PHYPATCH_DB_GET(unit, port, pPatchDb);
+
+    //PHYReg w $PHYID 0xa43 27 0x0000
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHY, 0xFF, 0xa43, 27, 15, 0, 0x0000, patch_mode), ret);
+    //PHYReg w $PHYID 0xa43 28 0x0000
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHY, 0xFF, 0xa43, 28, 15, 0, 0x0000, patch_mode), ret);
+    //PHYReg_bit w $PHYID 0xB82 23 0 0 0x0
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHY, 0xFF, 0xB82, 23, 0, 0, 0x0, patch_mode), ret);
+    //PHYReg w $PHYID 0xa43 27 $0x8023
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHY, 0xFF, 0xa43, 27, 15, 0, 0x8023, patch_mode), ret);
+    //PHYReg w $PHYID 0xa43 28 0x0000
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHY, 0xFF, 0xa43, 28, 15, 0, 0x0000, patch_mode), ret);
+
+    //PHYReg_bit w $PHYID 0xb82 16 4 4 0x0
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHY, 0xFF, 0xb82, 16, 4, 4, 0x0, patch_mode), ret);
+    //set patch_rdy [PHYReg_bit r $PHYID 0xb80 16 6 6] ; Wait for patch ready != 1
+    RT_ERR_CHK( _phy_rtl826xb_patch_wait_not_equal(unit, port, 31, _phy_rtl826xb_mmd_convert(0xb80, 16), BIT_6, BIT_6, patch_mode), ret);
+
+    return RT_ERR_OK;
+}
+
+static int32 _phy_rtl826xb_flow_l1(uint32 unit, rtk_port_t port, uint8 portOffset, uint8 patch_mode)
+{
+    int32 ret = RT_ERR_OK;
+    rt_phy_patch_db_t *pPatchDb = NULL;
+
+    PHYPATCH_DB_GET(unit, port, pPatchDb);
+
+    //PHYReg_bit w $PHYID 0xa4a 16 10 10 0x1
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHY, 0xFF, 0xa4a, 16, 10, 10, 0x1, patch_mode), ret);
+    //PHYReg_bit w $PHYID 0xa4a 16 10 10 0x1
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHY, 0xFF, 0xa4a, 16, 10, 10, 0x1, patch_mode), ret);
+
+    //set pcs_state [PHYReg_bit r $PHYID 0xa60 16 7 0] ; Wait for pcs state = 1
+    RT_ERR_CHK( _phy_rtl826xb_patch_wait(unit, port, 31, _phy_rtl826xb_mmd_convert(0xa60, 16), 0x1, 0xFF, patch_mode), ret);
+
+    return RT_ERR_OK;
+}
+
+static int32 _phy_rtl826xb_flow_l2(uint32 unit, rtk_port_t port, uint8 portOffset, uint8 patch_mode)
+{
+    int32 ret = RT_ERR_OK;
+    rt_phy_patch_db_t *pPatchDb = NULL;
+
+    PHYPATCH_DB_GET(unit, port, pPatchDb);
+
+    //PHYReg_bit w $PHYID 0xa4a 16 10 10 0x0
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHY, 0xFF, 0xa4a, 16, 10, 10, 0x0, patch_mode), ret);
+
+    //set pcs_state [PHYReg_bit r $PHYID 0xa60 16 7 0] ; Wait for pcs state != 1
+    RT_ERR_CHK( _phy_rtl826xb_patch_wait_not_equal(unit, port, 31, _phy_rtl826xb_mmd_convert(0xa60, 16), 0x1, 0xFF, patch_mode), ret);
+
+     return RT_ERR_OK;
+}
+
+static int32 _phy_rtl826xb_flow_pi(uint32 unit, rtk_port_t port, uint8 portOffset, uint8 patch_mode)
+{
+    int32 ret = RT_ERR_OK;
+    rt_phy_patch_db_t *pPatchDb = NULL;
+    uint32 rData = 0, cnt = 0;
+
+    PHYPATCH_DB_GET(unit, port, pPatchDb);
+
+    _phy_rtl826xb_flow_l1(unit, port, portOffset, patch_mode);
+
+    //  PP_PHYReg_bit w $PHYID 0xbf86 9 9 0x1; #SS_EN_XG = 1
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHYOCP, 0xFF, 31, 0xbf86, 9, 9, 0x1, patch_mode), ret);
+    //   PP_PHYReg_bit w $PHYID 0xbf86 8 8 0x0;
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHYOCP, 0xFF, 31, 0xbf86, 8, 8, 0x0, patch_mode), ret);
+    //   PP_PHYReg_bit w $PHYID 0xbf86 7 7 0x1;
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHYOCP, 0xFF, 31, 0xbf86, 7, 7, 0x1, patch_mode), ret);
+    //   PP_PHYReg_bit w $PHYID 0xbf86 6 6 0x1;
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHYOCP, 0xFF, 31, 0xbf86, 6, 6, 0x1, patch_mode), ret);
+    //   PP_PHYReg_bit w $PHYID 0xbf86 5 5 0x1;
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHYOCP, 0xFF, 31, 0xbf86, 5, 5, 0x1, patch_mode), ret);
+    //   PP_PHYReg_bit w $PHYID 0xbf86 4 4 0x1;
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHYOCP, 0xFF, 31, 0xbf86, 4, 4, 0x1, patch_mode), ret);
+    //   PP_PHYReg_bit w $PHYID 0xbf86 6 6 0x0;
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHYOCP, 0xFF, 31, 0xbf86, 6, 6, 0x0, patch_mode), ret);
+    //   PP_PHYReg_bit w $PHYID 0xbf86 9 9 0x0;
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHYOCP, 0xFF, 31, 0xbf86, 9, 9, 0x0, patch_mode), ret);
+    //   PP_PHYReg_bit w $PHYID 0xbf86 7 7 0x0;
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHYOCP, 0xFF, 31, 0xbf86, 7, 7, 0x0, patch_mode), ret);
+
+    //PP_PHYReg_bit r $PHYID 0xbc62 12 8
+    if ((ret = phy_common_general_reg_mmd_get(unit, port, PHY_MMD_VEND2, 0xbc62, &rData)) != RT_ERR_OK)
+        return ret;
+    rData = REG32_FIELD_GET(rData, 8, 0x1F00);
+    for (cnt = 0; cnt <= rData; cnt++)
+    {
+        //PP_PHYReg_bit w $PHYID 0xbc62 12 8 $t
+        RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHYOCP, 0xFF, 31, 0xbc62, 12, 8, cnt, patch_mode), ret);
+    }
+
+    //   PP_PHYReg_bit w $PHYID 0xbc02 2 2 0x1
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHYOCP, 0xFF, 31, 0xbc02, 2, 2, 0x1, patch_mode), ret);
+    //   PP_PHYReg_bit w $PHYID 0xbc02 3 3 0x1
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHYOCP, 0xFF, 31, 0xbc02, 3, 3, 0x1, patch_mode), ret);
+    //   PP_PHYReg_bit w $PHYID 0xbf86 6 6 0x1
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHYOCP, 0xFF, 31, 0xbf86, 6, 6, 0x1, patch_mode), ret);
+    //   PP_PHYReg_bit w $PHYID 0xbf86 9 9 0x1
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHYOCP, 0xFF, 31, 0xbf86, 9, 9, 0x1, patch_mode), ret);
+    //   PP_PHYReg_bit w $PHYID 0xbf86 7 7 0x1
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHYOCP, 0xFF, 31, 0xbf86, 7, 7, 0x1, patch_mode), ret);
+    //   PP_PHYReg_bit w $PHYID 0xbc04 9 2 0xff
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHYOCP, 0xFF, 31, 0xbc04, 9, 2, 0xff, patch_mode), ret);
+
+    _phy_rtl826xb_flow_l2(unit, port, portOffset, patch_mode);
+    return RT_ERR_OK;
+}
+
+static int32 _phy_rtl826xb_flow_n01(uint32 unit, rtk_port_t port, uint8 portOffset, uint8 patch_mode)
+{
+    int32 ret = RT_ERR_OK;
+    rt_phy_patch_db_t *pPatchDb = NULL;
+
+    PHYPATCH_DB_GET(unit, port, pPatchDb);
+
+    //PHYReg_bit w $PHYID 0xa01 21 15 0 0x1
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHY, 0xFF, 0xa01, 21, 15, 0, 0x1, patch_mode), ret);
+    //PHYReg_bit w $PHYID 0xa01 19 15 0 0x0000
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHY, 0xFF, 0xa01, 19, 15, 0, 0x0000, patch_mode), ret);
+    //# PHYReg_bit w $PHYID 0xa01 17 15 0 0x0000
+    //RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHY, 0xFF, 0xa01, 17, 15, 0, 0x0000, patch_mode), ret);
+
+    return RT_ERR_OK;
+}
+
+static int32 _phy_rtl826xb_flow_n02(uint32 unit, rtk_port_t port, uint8 portOffset, uint8 patch_mode)
+{
+    int32 ret = RT_ERR_OK;
+    rt_phy_patch_db_t *pPatchDb = NULL;
+
+    PHYPATCH_DB_GET(unit, port, pPatchDb);
+
+    //PHYReg_bit w $PHYID 0xa01 21 15 0 0x0
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHY, 0xFF, 0xa01, 21, 15, 0, 0x0, patch_mode), ret);
+    //PHYReg_bit w $PHYID 0xa01 19 15 0 0x0000
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHY, 0xFF, 0xa01, 19, 15, 0, 0x0000, patch_mode), ret);
+    //PHYReg_bit w $PHYID 0xa01 17 15 0 0x0000
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHY, 0xFF, 0xa01, 17, 15, 0, 0x0000, patch_mode), ret);
+    return RT_ERR_OK;
+}
+
+static int32 _phy_rtl826xb_flow_n11(uint32 unit, rtk_port_t port, uint8 portOffset, uint8 patch_mode)
+{
+    int32 ret = RT_ERR_OK;
+    rt_phy_patch_db_t *pPatchDb = NULL;
+
+    PHYPATCH_DB_GET(unit, port, pPatchDb);
+
+    //PHYReg_bit w $PHYID 0xa01 21 15 0 0x1
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHY, 0xFF, 0xa01, 21, 15, 0, 0x1, patch_mode), ret);
+    //PHYReg_bit w $PHYID 0xa01 19 15 0 0x0010
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHY, 0xFF, 0xa01, 19, 15, 0, 0x0010, patch_mode), ret);
+    //# PHYReg_bit w $PHYID 0xa01 17 15 0 0x0000
+    //RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHY, 0xFF, 0xa01, 17, 15, 0, 0x0000, patch_mode), ret);
+
+    return RT_ERR_OK;
+}
+
+static int32 _phy_rtl826xb_flow_n12(uint32 unit, rtk_port_t port, uint8 portOffset, uint8 patch_mode)
+{
+    int32 ret = RT_ERR_OK;
+    rt_phy_patch_db_t *pPatchDb = NULL;
+
+    PHYPATCH_DB_GET(unit, port, pPatchDb);
+
+    //PHYReg_bit w $PHYID 0xa01 21 15 0 0x0
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHY, 0xFF, 0xa01, 21, 15, 0, 0x0, patch_mode), ret);
+    //PHYReg_bit w $PHYID 0xa01 19 15 0 0x0010
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHY, 0xFF, 0xa01, 19, 15, 0, 0x0010, patch_mode), ret);
+    //PHYReg_bit w $PHYID 0xa01 17 15 0 0x0000
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHY, 0xFF, 0xa01, 17, 15, 0, 0x0000, patch_mode), ret);
+
+    return RT_ERR_OK;
+}
+
+static int32 _phy_rtl826xb_flow_n21(uint32 unit, rtk_port_t port, uint8 portOffset, uint8 patch_mode)
+{
+    int32 ret = RT_ERR_OK;
+    rt_phy_patch_db_t *pPatchDb = NULL;
+
+    PHYPATCH_DB_GET(unit, port, pPatchDb);
+
+    //PHYReg_bit w $PHYID 0xa01 21 15 0 0x1
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHY, 0xFF, 0xa01, 21, 15, 0, 0x1, patch_mode), ret);
+    //PHYReg_bit w $PHYID 0xa01 19 15 0 0x0020
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHY, 0xFF, 0xa01, 19, 15, 0, 0x0020, patch_mode), ret);
+    //# PHYReg_bit w $PHYID 0xa01 17 15 0 0x0000
+    //RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHY, 0xFF, 0xa01, 17, 15, 0, 0x0000, patch_mode), ret);
+
+    return RT_ERR_OK;
+}
+
+static int32 _phy_rtl826xb_flow_n22(uint32 unit, rtk_port_t port, uint8 portOffset, uint8 patch_mode)
+{
+    int32 ret = RT_ERR_OK;
+    rt_phy_patch_db_t *pPatchDb = NULL;
+
+    PHYPATCH_DB_GET(unit, port, pPatchDb);
+
+    //PHYReg_bit w $PHYID 0xa01 21 15 0 0x0
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHY, 0xFF, 0xa01, 21, 15, 0, 0x0, patch_mode), ret);
+    //PHYReg_bit w $PHYID 0xa01 19 15 0 0x0020
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHY, 0xFF, 0xa01, 19, 15, 0, 0x0020, patch_mode), ret);
+    //PHYReg_bit w $PHYID 0xa01 17 15 0 0x0000
+    RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PHY, 0xFF, 0xa01, 17, 15, 0, 0x0000, patch_mode), ret);
+
+    return RT_ERR_OK;
+}
+
+static int32 _phy_rtl826xb_flow_s(uint32 unit, rtk_port_t port, uint8 portOffset, uint8 patch_mode)
+{
+    int32 ret = RT_ERR_OK;
+    rt_phy_patch_db_t *pPatchDb = NULL;
+
+    if (PHYPATCH_IS_RTKSDS(unit))
+    {
+        PHYPATCH_DB_GET(unit, port, pPatchDb);
+        RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PSDS0, 0xff, 0x07, 0x10, 15, 0, 0x80aa, patch_mode), ret);
+        RT_ERR_CHK(phy_patch_op(pPatchDb, unit, port, portOffset, RTK_PATCH_OP_PSDS0, 0xff, 0x06, 0x12, 15, 0, 0x5078, patch_mode), ret);
+    }
+
+    return RT_ERR_OK;
+}
+
+int32 phy_rtl826xb_patch_op(uint32 unit, rtk_port_t port, uint8 portOffset, rtk_hwpatch_t *pPatch_data, uint8 patch_mode)
+{
+    int32 ret = RT_ERR_OK;
+    uint32 rData = 0, wData = 0;
+    uint16 reg = 0;
+    uint8 patch_op = 0;
+    uint32 mask = 0;
+
+    if ((pPatch_data->portmask & (1 << portOffset)) == 0)
+    {
+        return RT_ERR_ABORT;
+    }
+    mask = UINT32_BITS_MASK(pPatch_data->msb, pPatch_data->lsb);
+    patch_op = phy_patch_op_translate(patch_mode, pPatch_data->patch_op, pPatch_data->compare_op);
+
+    #if 0
+    osal_printf("[%s,%d]u%up%u, patch_mode:%u/patch_op:%u/compare_op:%u => op: %u\n", __FUNCTION__, __LINE__, unit, port,
+                           patch_mode, pPatch_data->patch_op, pPatch_data->compare_op,
+                           patch_op);
+    #endif
+
+    switch (patch_op)
+    {
+        case RTK_PATCH_OP_PHY:
+            reg = _phy_rtl826xb_mmd_convert(pPatch_data->pagemmd, pPatch_data->addr);
+            if ((pPatch_data->msb != 15) || (pPatch_data->lsb != 0))
+            {
+                RT_ERR_CHK(phy_common_general_reg_mmd_get(unit, port, 31, reg, &rData), ret);
+            }
+            wData = REG32_FIELD_SET(rData, pPatch_data->data, pPatch_data->lsb, mask);
+            RT_ERR_CHK(phy_common_general_reg_mmd_set(unit, port, 31, reg, wData), ret);
+            break;
+        case RTK_PATCH_OP_CMP_PHY:
+            reg = _phy_rtl826xb_mmd_convert(pPatch_data->pagemmd, pPatch_data->addr);
+            RT_ERR_CHK(phy_common_general_reg_mmd_get(unit, port, 31, reg, &rData), ret);
+            PHYPATCH_COMPARE(pPatch_data->pagemmd, pPatch_data->addr, pPatch_data->msb, pPatch_data->lsb, pPatch_data->data, rData, mask);
+            break;
+        case RTK_PATCH_OP_CMP_SRAM_PHY:
+            reg = _phy_rtl826xb_mmd_convert(pPatch_data->sram_p, pPatch_data->sram_rw);
+            RT_ERR_CHK(phy_common_general_reg_mmd_set(unit, port, 31, reg, pPatch_data->sram_a), ret);
+            reg = _phy_rtl826xb_mmd_convert(pPatch_data->sram_p, pPatch_data->sram_rr);
+            RT_ERR_CHK(phy_common_general_reg_mmd_get(unit, port, 31, reg, &rData), ret);
+            PHYPATCH_COMPARE(pPatch_data->pagemmd, pPatch_data->addr, pPatch_data->msb, pPatch_data->lsb, pPatch_data->data, rData, mask);
+            break;
+
+        case RTK_PATCH_OP_PHYOCP:
+            if ((pPatch_data->msb != 15) || (pPatch_data->lsb != 0))
+            {
+                RT_ERR_CHK(phy_common_general_reg_mmd_get(unit, port, 31, pPatch_data->addr, &rData), ret);
+            }
+            wData = REG32_FIELD_SET(rData, pPatch_data->data, pPatch_data->lsb, mask);
+            RT_ERR_CHK(phy_common_general_reg_mmd_set(unit, port, 31, pPatch_data->addr, wData), ret);
+            break;
+        case RTK_PATCH_OP_CMP_PHYOCP:
+            RT_ERR_CHK(phy_common_general_reg_mmd_get(unit, port, 31, pPatch_data->addr, &rData), ret);
+            PHYPATCH_COMPARE(pPatch_data->pagemmd, pPatch_data->addr, pPatch_data->msb, pPatch_data->lsb, pPatch_data->data, rData, mask);
+            break;
+        case RTK_PATCH_OP_CMP_SRAM_PHYOCP:
+            RT_ERR_CHK(phy_common_general_reg_mmd_set(unit, port, 31, pPatch_data->sram_rw, pPatch_data->sram_a), ret);
+            RT_ERR_CHK(phy_common_general_reg_mmd_get(unit, port, 31, pPatch_data->sram_rr, &rData), ret);
+            PHYPATCH_COMPARE(pPatch_data->pagemmd, pPatch_data->addr, pPatch_data->msb, pPatch_data->lsb, pPatch_data->data, rData, mask);
+            break;
+
+        case RTK_PATCH_OP_TOP:
+            if ((pPatch_data->msb != 15) || (pPatch_data->lsb != 0))
+            {
+                RT_ERR_CHK(_phy_rtl826xb_patch_top_get(unit, port, pPatch_data->pagemmd, pPatch_data->addr, &rData), ret);
+            }
+            wData = REG32_FIELD_SET(rData, pPatch_data->data, pPatch_data->lsb, mask);
+            RT_ERR_CHK(_phy_rtl826xb_patch_top_set(unit, port, pPatch_data->pagemmd, pPatch_data->addr, wData), ret);
+            break;
+        case RTK_PATCH_OP_CMP_TOP:
+            RT_ERR_CHK(_phy_rtl826xb_patch_top_get(unit, port, pPatch_data->pagemmd, pPatch_data->addr, &rData), ret);
+            PHYPATCH_COMPARE(pPatch_data->pagemmd, pPatch_data->addr, pPatch_data->msb, pPatch_data->lsb, pPatch_data->data, rData, mask);
+            break;
+        case RTK_PATCH_OP_CMP_SRAM_TOP:
+            RT_ERR_CHK(_phy_rtl826xb_patch_top_set(unit, port, pPatch_data->sram_p, pPatch_data->sram_rw, pPatch_data->sram_a), ret);
+            RT_ERR_CHK(_phy_rtl826xb_patch_top_get(unit, port, pPatch_data->sram_p, pPatch_data->sram_rr, &rData), ret);
+            PHYPATCH_COMPARE(pPatch_data->pagemmd, pPatch_data->addr, pPatch_data->msb, pPatch_data->lsb, pPatch_data->data, rData, mask);
+            break;
+
+        case RTK_PATCH_OP_PSDS0:
+            if ((pPatch_data->msb != 15) || (pPatch_data->lsb != 0))
+            {
+                RT_ERR_CHK(_phy_rtl826xb_patch_sds_get(unit, port, pPatch_data->pagemmd, pPatch_data->addr, &rData), ret);
+            }
+            wData = REG32_FIELD_SET(rData, pPatch_data->data, pPatch_data->lsb, mask);
+            RT_ERR_CHK(_phy_rtl826xb_patch_sds_set(unit, port, pPatch_data->pagemmd, pPatch_data->addr, wData, patch_mode), ret);
+            break;
+        case RTK_PATCH_OP_CMP_PSDS0:
+            RT_ERR_CHK(_phy_rtl826xb_patch_sds_get(unit, port, pPatch_data->pagemmd, pPatch_data->addr, &rData), ret);
+            PHYPATCH_COMPARE(pPatch_data->pagemmd, pPatch_data->addr, pPatch_data->msb, pPatch_data->lsb, pPatch_data->data, rData, mask);
+            break;
+        case RTK_PATCH_OP_CMP_SRAM_PSDS0:
+            RT_ERR_CHK(_phy_rtl826xb_patch_sds_set(unit, port, pPatch_data->sram_p, pPatch_data->sram_rw, pPatch_data->sram_a, patch_mode), ret);
+            RT_ERR_CHK(_phy_rtl826xb_patch_sds_get(unit, port, pPatch_data->sram_p, pPatch_data->sram_rr, &rData), ret);
+            PHYPATCH_COMPARE(pPatch_data->pagemmd, pPatch_data->addr, pPatch_data->msb, pPatch_data->lsb, pPatch_data->data, rData, mask);
+            break;
+
+        case RTK_PATCH_OP_SKIP:
+            return RT_ERR_ABORT;
+
+        default:
+            RT_LOG(LOG_MAJOR_ERR, (MOD_HAL | MOD_PHY), "U%u P%u patch_op:%u not implemented yet!\n", unit, port, pPatch_data->patch_op);
+            return RT_ERR_DRIVER_NOT_SUPPORTED;
+    }
+
+    return ret;
+}
+
+int32 phy_rtl826xb_patch_flow(uint32 unit, rtk_port_t port, uint8 portOffset, uint8 patch_flow, uint8 patch_mode)
+{
+    int32 ret = RT_ERR_OK;
+
+    RT_LOG(LOG_INFO, (MOD_HAL | MOD_PHY), "[%s]U%u,P%u,flow%u\n", __FUNCTION__, unit, port, (patch_flow - PHY_PATCH_TYPE_END));
+    switch (patch_flow)
+    {
+        case RTK_PATCH_TYPE_FLOW(0):
+            RT_ERR_CHK(_phy_rtl826xb_flow_r1(unit, port, portOffset, patch_mode), ret);
+            break;
+        case RTK_PATCH_TYPE_FLOW(1):
+            RT_ERR_CHK(_phy_rtl826xb_flow_r2(unit, port, portOffset, patch_mode), ret);
+            break;
+
+        case RTK_PATCH_TYPE_FLOW(2):
+            RT_ERR_CHK(_phy_rtl826xb_flow_l1(unit, port, portOffset, patch_mode), ret);
+            break;
+        case RTK_PATCH_TYPE_FLOW(3):
+            RT_ERR_CHK(_phy_rtl826xb_flow_l2(unit, port, portOffset, patch_mode), ret);
+            break;
+
+        case RTK_PATCH_TYPE_FLOW(4):
+            RT_ERR_CHK(_phy_rtl826xb_flow_n01(unit, port, portOffset, patch_mode), ret);
+            break;
+        case RTK_PATCH_TYPE_FLOW(5):
+            RT_ERR_CHK(_phy_rtl826xb_flow_n02(unit, port, portOffset, patch_mode), ret);
+            break;
+
+        case RTK_PATCH_TYPE_FLOW(6):
+            RT_ERR_CHK(_phy_rtl826xb_flow_n11(unit, port, portOffset, patch_mode), ret);
+            break;
+        case RTK_PATCH_TYPE_FLOW(7):
+            RT_ERR_CHK(_phy_rtl826xb_flow_n12(unit, port, portOffset, patch_mode), ret);
+            break;
+
+        case RTK_PATCH_TYPE_FLOW(8):
+            RT_ERR_CHK(_phy_rtl826xb_flow_n21(unit, port, portOffset, patch_mode), ret);
+            break;
+        case RTK_PATCH_TYPE_FLOW(9):
+            RT_ERR_CHK(_phy_rtl826xb_flow_n22(unit, port, portOffset, patch_mode), ret);
+            break;
+
+        case RTK_PATCH_TYPE_FLOW(10):
+            RT_ERR_CHK(_phy_rtl826xb_flow_s(unit, port, portOffset, patch_mode), ret);
+            break;
+
+        case RTK_PATCH_TYPE_FLOW(11):
+            RT_ERR_CHK(_phy_rtl826xb_flow_pi(unit, port, portOffset, patch_mode), ret);
+            break;
+        case RTK_PATCH_TYPE_FLOW(12):
+            RT_ERR_CHK(_phy_rtl826xb_flow_r12(unit, port, portOffset, patch_mode), ret);
+            break;
+
+        default:
+            return RT_ERR_INPUT;
+    }
+    return RT_ERR_OK;
+}
+
+int32 phy_rtl826xb_patch_db_init(uint32 unit, rtk_port_t port, rt_phy_patch_db_t **pPhy_patchDb)
+{
+    int32 ret = RT_ERR_OK;
+    rt_phy_patch_db_t *patch_db = NULL;
+    uint32 rData = 0;
+
+    patch_db = osal_alloc(sizeof(rt_phy_patch_db_t));
+    RT_PARAM_CHK(NULL == patch_db, RT_ERR_MEM_ALLOC);
+    osal_memset(patch_db, 0x0, sizeof(rt_phy_patch_db_t));
+
+    /* patch callback */
+    patch_db->fPatch_op = phy_rtl826xb_patch_op;
+    patch_db->fPatch_flow = phy_rtl826xb_patch_flow;
+
+    /* patch table */
+    RT_ERR_CHK(phy_common_general_reg_mmd_get(unit, port, 30, 0x104, &rData), ret);
+    if ((rData & 0x7) == 0x0)
+    {
+        /* patch */
+        PHYPATCH_SEQ_TABLE_ASSIGN(patch_db,  0, RTK_PATCH_TYPE_FLOW(12), NULL);
+        PHYPATCH_SEQ_TABLE_ASSIGN(patch_db,  1, PHY_PATCH_TYPE_NCTL0, rtl8264b_nctl0_conf);
+        PHYPATCH_SEQ_TABLE_ASSIGN(patch_db,  2, PHY_PATCH_TYPE_NCTL1, rtl8264b_nctl1_conf);
+        PHYPATCH_SEQ_TABLE_ASSIGN(patch_db,  3, PHY_PATCH_TYPE_NCTL2, rtl8264b_nctl2_conf);
+        PHYPATCH_SEQ_TABLE_ASSIGN(patch_db,  4, PHY_PATCH_TYPE_UC2, rtl8264b_uc2_conf);
+        PHYPATCH_SEQ_TABLE_ASSIGN(patch_db,  5, PHY_PATCH_TYPE_UC, rtl8264b_uc_conf);
+        PHYPATCH_SEQ_TABLE_ASSIGN(patch_db,  6, PHY_PATCH_TYPE_DATARAM, rtl8264b_dataram_conf);
+        PHYPATCH_SEQ_TABLE_ASSIGN(patch_db,  7, RTK_PATCH_TYPE_FLOW(1), NULL);
+        PHYPATCH_SEQ_TABLE_ASSIGN(patch_db,  8, RTK_PATCH_TYPE_FLOW(2), NULL);
+        PHYPATCH_SEQ_TABLE_ASSIGN(patch_db,  9, PHY_PATCH_TYPE_ALGXG, rtl8264b_algxg_conf);
+        PHYPATCH_SEQ_TABLE_ASSIGN(patch_db, 10, PHY_PATCH_TYPE_ALG1G, rtl8264b_alg_giga_conf);
+        PHYPATCH_SEQ_TABLE_ASSIGN(patch_db, 11, PHY_PATCH_TYPE_NORMAL, rtl8264b_normal_conf);
+        PHYPATCH_SEQ_TABLE_ASSIGN(patch_db, 12, PHY_PATCH_TYPE_TOP, rtl8264b_top_conf);
+        PHYPATCH_SEQ_TABLE_ASSIGN(patch_db, 13, PHY_PATCH_TYPE_SDS, rtl8264b_sds_conf);
+        PHYPATCH_SEQ_TABLE_ASSIGN(patch_db, 14, PHY_PATCH_TYPE_AFE, rtl8264b_afe_conf);
+        PHYPATCH_SEQ_TABLE_ASSIGN(patch_db, 15, PHY_PATCH_TYPE_RTCT, rtl8264b_rtct_conf);
+        PHYPATCH_SEQ_TABLE_ASSIGN(patch_db, 16, RTK_PATCH_TYPE_FLOW(3), NULL);
+        PHYPATCH_SEQ_TABLE_ASSIGN(patch_db, 17, RTK_PATCH_TYPE_FLOW(11), NULL);
+        PHYPATCH_SEQ_TABLE_ASSIGN(patch_db, 18, RTK_PATCH_TYPE_FLOW(10), NULL);
+
+        /* compare */
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db,  0, PHY_PATCH_TYPE_TOP, rtl8264b_top_conf);
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db,  1, PHY_PATCH_TYPE_SDS, rtl8264b_sds_conf);
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db,  2, PHY_PATCH_TYPE_AFE, rtl8264b_afe_conf);
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db,  3, RTK_PATCH_TYPE_FLOW(4), NULL);
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db,  4, PHY_PATCH_TYPE_NCTL0, rtl8264b_nctl0_conf);
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db,  5, RTK_PATCH_TYPE_FLOW(5), NULL);
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db,  6, RTK_PATCH_TYPE_FLOW(6), NULL);
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db,  7, PHY_PATCH_TYPE_NCTL1, rtl8264b_nctl1_conf);
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db,  8, RTK_PATCH_TYPE_FLOW(7), NULL);
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db,  9, RTK_PATCH_TYPE_FLOW(8), NULL);
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db, 10, PHY_PATCH_TYPE_NCTL2, rtl8264b_nctl2_conf);
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db, 11, RTK_PATCH_TYPE_FLOW(9), NULL);
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db, 12, PHY_PATCH_TYPE_UC, rtl8264b_uc_conf);
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db, 13, PHY_PATCH_TYPE_UC2, rtl8264b_uc2_conf);
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db, 14, RTK_PATCH_TYPE_FLOW(12), NULL);
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db, 15, PHY_PATCH_TYPE_DATARAM, rtl8264b_dataram_conf);
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db, 16, RTK_PATCH_TYPE_FLOW(1), NULL);
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db, 17, PHY_PATCH_TYPE_ALGXG, rtl8264b_algxg_conf);
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db, 18, PHY_PATCH_TYPE_ALG1G, rtl8264b_alg_giga_conf);
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db, 19, PHY_PATCH_TYPE_NORMAL, rtl8264b_normal_conf);
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db, 20, PHY_PATCH_TYPE_RTCT, rtl8264b_rtct_conf);
+    }
+    else
+    {
+        /* patch */
+        PHYPATCH_SEQ_TABLE_ASSIGN(patch_db,  0, RTK_PATCH_TYPE_FLOW(0), NULL);
+        PHYPATCH_SEQ_TABLE_ASSIGN(patch_db,  1, PHY_PATCH_TYPE_NCTL0, rtl8261n_c_nctl0_conf);
+        PHYPATCH_SEQ_TABLE_ASSIGN(patch_db,  2, PHY_PATCH_TYPE_NCTL1, rtl8261n_c_nctl1_conf);
+        PHYPATCH_SEQ_TABLE_ASSIGN(patch_db,  3, PHY_PATCH_TYPE_NCTL2, rtl8261n_c_nctl2_conf);
+        PHYPATCH_SEQ_TABLE_ASSIGN(patch_db,  4, PHY_PATCH_TYPE_UC2, rtl8261n_c_uc2_conf);
+        PHYPATCH_SEQ_TABLE_ASSIGN(patch_db,  5, PHY_PATCH_TYPE_UC, rtl8261n_c_uc_conf);
+        PHYPATCH_SEQ_TABLE_ASSIGN(patch_db,  6, PHY_PATCH_TYPE_DATARAM, rtl8261n_c_dataram_conf);
+        PHYPATCH_SEQ_TABLE_ASSIGN(patch_db,  7, RTK_PATCH_TYPE_FLOW(1), NULL);
+        PHYPATCH_SEQ_TABLE_ASSIGN(patch_db,  8, RTK_PATCH_TYPE_FLOW(2), NULL);
+        PHYPATCH_SEQ_TABLE_ASSIGN(patch_db,  9, PHY_PATCH_TYPE_ALGXG, rtl8261n_c_algxg_conf);
+        PHYPATCH_SEQ_TABLE_ASSIGN(patch_db, 10, PHY_PATCH_TYPE_ALG1G, rtl8261n_c_alg_giga_conf);
+        PHYPATCH_SEQ_TABLE_ASSIGN(patch_db, 11, PHY_PATCH_TYPE_NORMAL, rtl8261n_c_normal_conf);
+        PHYPATCH_SEQ_TABLE_ASSIGN(patch_db, 12, PHY_PATCH_TYPE_TOP, rtl8261n_c_top_conf);
+        PHYPATCH_SEQ_TABLE_ASSIGN(patch_db, 13, PHY_PATCH_TYPE_SDS, rtl8261n_c_sds_conf);
+        PHYPATCH_SEQ_TABLE_ASSIGN(patch_db, 14, PHY_PATCH_TYPE_AFE, rtl8261n_c_afe_conf);
+        PHYPATCH_SEQ_TABLE_ASSIGN(patch_db, 15, PHY_PATCH_TYPE_RTCT, rtl8261n_c_rtct_conf);
+        PHYPATCH_SEQ_TABLE_ASSIGN(patch_db, 16, RTK_PATCH_TYPE_FLOW(3), NULL);
+        PHYPATCH_SEQ_TABLE_ASSIGN(patch_db, 17, RTK_PATCH_TYPE_FLOW(10), NULL);
+
+        /* compare */
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db,  0, PHY_PATCH_TYPE_TOP, rtl8261n_c_top_conf);
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db,  1, PHY_PATCH_TYPE_SDS, rtl8261n_c_sds_conf);
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db,  2, PHY_PATCH_TYPE_AFE, rtl8261n_c_afe_conf);
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db,  3, RTK_PATCH_TYPE_FLOW(4), NULL);
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db,  4, PHY_PATCH_TYPE_NCTL0, rtl8261n_c_nctl0_conf);
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db,  5, RTK_PATCH_TYPE_FLOW(5), NULL);
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db,  6, RTK_PATCH_TYPE_FLOW(6), NULL);
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db,  7, PHY_PATCH_TYPE_NCTL1, rtl8261n_c_nctl1_conf);
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db,  8, RTK_PATCH_TYPE_FLOW(7), NULL);
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db,  9, RTK_PATCH_TYPE_FLOW(8), NULL);
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db, 10, PHY_PATCH_TYPE_NCTL2, rtl8261n_c_nctl2_conf);
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db, 11, RTK_PATCH_TYPE_FLOW(9), NULL);
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db, 12, PHY_PATCH_TYPE_UC, rtl8261n_c_uc_conf);
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db, 13, PHY_PATCH_TYPE_UC2, rtl8261n_c_uc2_conf);
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db, 14, RTK_PATCH_TYPE_FLOW(0), NULL);
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db, 15, PHY_PATCH_TYPE_DATARAM, rtl8261n_c_dataram_conf);
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db, 16, RTK_PATCH_TYPE_FLOW(1), NULL);
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db, 17, PHY_PATCH_TYPE_ALGXG, rtl8261n_c_algxg_conf);
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db, 18, PHY_PATCH_TYPE_ALG1G, rtl8261n_c_alg_giga_conf);
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db, 19, PHY_PATCH_TYPE_NORMAL, rtl8261n_c_normal_conf);
+        PHYPATCH_CMP_TABLE_ASSIGN(patch_db, 20, PHY_PATCH_TYPE_RTCT, rtl8261n_c_rtct_conf);
+    }
+    *pPhy_patchDb = patch_db;
+    return ret;
+}
+
+/* Function Name:
+ *      phy_rtl826xb_patch
+ * Description:
+ *      apply initial patch data to PHY
+ * Input:
+ *      unit       - unit id
+ *      baseport   - base port id on the PHY chip
+ *      portOffset - the index offset base on baseport for the port to patch
+ * Output:
+ *      None
+ * Return:
+ *      RT_ERR_OK
+ *      RT_ERR_FAILED
+ *      RT_ERR_NOT_SUPPORTED
+ *      RT_ERR_ABORT
+ * Note:
+ *      None
+ */
+int32 phy_rtl826xb_patch(uint32 unit, rtk_port_t port, uint8 portOffset)
+{
+    return phy_patch( unit, port, portOffset, PHY_PATCH_MODE_NORMAL);
+}
+
+/* Function Name:
+ *      phy_rtl826xb_broadcast_patch
+ * Description:
+ *      apply patch data to PHY
+ * Input:
+ *      unit       - unit id
+ *      baseport   - base port id on the PHY chip
+ *      portOffset - the index offset base on baseport for the port to patch
+ *      perChip    - 1 for per-chip mode, 0 for per-bus mode
+ * Output:
+ *      None
+ * Return:
+ *      RT_ERR_OK
+ *      RT_ERR_FAILED
+ *      RT_ERR_NOT_SUPPORTED
+ *      RT_ERR_ABORT
+ * Note:
+ *      None
+ */
+int32 phy_rtl826xb_broadcast_patch(uint32 unit, rtk_port_t port, uint8 portOffset, uint8 perChip)
+{
+    int32 ret = 0;
+    if (perChip == 0)
+    {
+        ret = phy_patch(unit, port, portOffset, PHY_PATCH_MODE_BCAST_BUS);
+    }
+    else
+    {
+        ret = phy_patch(unit, port, portOffset, PHY_PATCH_MODE_BCAST);
+    }
+    return ret;
+}
+

diff --git a/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/phy_rtl826xb_patch.h b/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/phy_rtl826xb_patch.h
new file mode 100644 (file)
index 0000000..c2311ef
--- /dev/null
+++ b/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/phy_rtl826xb_patch.h
@@ -0,0 +1,63 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-only
+ *
+ * Copyright (c) 2023 Realtek Semiconductor Corp. All rights reserved.
+ */
+
+#ifndef __HAL_PHY_PHY_RTL826XB_PATCH_H__
+#define __HAL_PHY_PHY_RTL826XB_PATCH_H__
+
+/*
+ * Include Files
+ */
+#if defined(RTK_PHYDRV_IN_LINUX)
+  #include "rtk_osal.h"
+  #include "rtk_phylib_def.h"
+#else
+  #include <common/rt_type.h>
+  #include <rtk/port.h>
+#endif
+
+/* Function Name:
+ *      phy_rtl826xb_patch
+ * Description:
+ *      apply patch data to PHY
+ * Input:
+ *      unit       - unit id
+ *      baseport   - base port id on the PHY chip
+ *      portOffset - the index offset base on baseport for the port to patch
+ * Output:
+ *      None
+ * Return:
+ *      RT_ERR_OK
+ *      RT_ERR_FAILED
+ *      RT_ERR_NOT_SUPPORTED
+ *      RT_ERR_ABORT
+ * Note:
+ *      None
+ */
+extern int32 phy_rtl826xb_patch(uint32 unit, rtk_port_t baseport, uint8 portOffset);
+
+/* Function Name:
+ *      phy_rtl826xb_broadcast_patch
+ * Description:
+ *      apply patch data to PHY
+ * Input:
+ *      unit       - unit id
+ *      baseport   - base port id on the PHY chip
+ *      portOffset - the index offset base on baseport for the port to patch
+ *      perChip    - 1 for per-chip mode, 0 for per-bus mode
+ * Output:
+ *      None
+ * Return:
+ *      RT_ERR_OK
+ *      RT_ERR_FAILED
+ *      RT_ERR_NOT_SUPPORTED
+ *      RT_ERR_ABORT
+ * Note:
+ *      None
+ */
+extern int32 phy_rtl826xb_broadcast_patch(uint32 unit, rtk_port_t port, uint8 portOffset, uint8 perChip);
+
+extern int32 phy_rtl826xb_patch_db_init(uint32 unit, rtk_port_t port, rt_phy_patch_db_t **pPhy_patchDb);
+#endif /* __HAL_PHY_PHY_RTL826XB_PATCH_H__ */

diff --git a/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/rtk_osal.c b/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/rtk_osal.c
new file mode 100644 (file)
index 0000000..bf3ac4b
--- /dev/null
+++ b/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/rtk_osal.c
@@ -0,0 +1,56 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-only
+ *
+ * Copyright (c) 2023 Realtek Semiconductor Corp. All rights reserved.
+ */
+
+#include "type.h"
+#include "error.h"
+#include "rtk_phylib_def.h"
+
+#include <linux/version.h>
+#include <linux/jiffies.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/sched.h>
+#include <linux/wait.h>
+#include <linux/sched/signal.h>
+#include <linux/phy.h>
+
+int32
+osal_time_usecs_get(osal_usecs_t *pUsec)
+{
+    struct timespec64 ts;
+
+    RT_PARAM_CHK((NULL == pUsec), RT_ERR_NULL_POINTER);
+
+    ktime_get_ts64(&ts);
+    *pUsec = (osal_usecs_t)((ts.tv_sec * USEC_PER_SEC) + (ts.tv_nsec / NSEC_PER_USEC));
+    return RT_ERR_OK;
+}
+
+void *
+osal_alloc(uint32 size)
+{
+    void *p;
+    p = kmalloc((size_t)size, GFP_ATOMIC);
+    return p;
+}
+
+int32
+phy_common_general_reg_mmd_get(uint32 unit, rtk_port_t port, uint32 mmdAddr, uint32 mmdReg, uint32 *pData)
+{
+    int32 rData = 0;
+    rData = phy_read_mmd(port, mmdAddr, mmdReg);
+    if (rData < 0)
+        return RT_ERR_FAILED;
+    *pData = (uint32)rData;
+    return RT_ERR_OK;
+}
+
+int32
+phy_common_general_reg_mmd_set(uint32 unit, rtk_port_t port, uint32 mmdAddr, uint32 mmdReg, uint32 data)
+{
+    int ret = phy_write_mmd(port, mmdAddr, mmdReg, data);
+    return (ret < 0) ? RT_ERR_FAILED : RT_ERR_OK;
+}

diff --git a/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/rtk_osal.h b/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/rtk_osal.h
new file mode 100644 (file)
index 0000000..edf6746
--- /dev/null
+++ b/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/rtk_osal.h
@@ -0,0 +1,99 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-only
+ *
+ * Copyright (c) 2023 Realtek Semiconductor Corp. All rights reserved.
+ */
+
+#ifndef __RTK_PHY_OSAL_H
+#define __RTK_PHY_OSAL_H
+
+#include <linux/kernel.h>
+#include <linux/phy.h>
+#include "type.h"
+#include "error.h"
+#include "phy_patch.h"
+#include "rtk_phylib.h"
+
+#ifdef PHYPATCH_DB_GET
+    #undef PHYPATCH_DB_GET
+#endif
+
+#define PHYPATCH_DB_GET(_unit, _pPhy_device, _pPatchDb) \
+    do { \
+        struct rtk_phy_priv *_pPriv = (_pPhy_device)->priv; \
+        rt_phy_patch_db_t *_pDb = _pPriv->patch; _pPatchDb = _pDb; \
+        /*printk("[PHYPATCH_DB_GET] ? [%s]\n", (_pDb != NULL) ? "E":"N");*/ \
+    } while(0)
+
+#define HWP_9300_FAMILY_ID(_unit)       0
+#define HWP_9310_FAMILY_ID(_unit)       0
+#define RTK_9300_FAMILY_ID(_unit)       0
+#define RTK_9310_FAMILY_ID(_unit)       0
+#define RTK_9311B_FAMILY_ID(_unit)      0
+#define RTK_9330_FAMILY_ID(_unit)       0
+
+#ifndef WAIT_COMPLETE_VAR
+#define WAIT_COMPLETE_VAR() \
+    osal_usecs_t    _t, _now, _t_wait=0, _timeout;  \
+    int32           _chkCnt=0;
+
+#define WAIT_COMPLETE(_timeout_us)     \
+    _timeout = _timeout_us;  \
+    for(osal_time_usecs_get(&_t),osal_time_usecs_get(&_now),_t_wait=0,_chkCnt=0 ; \
+        (_t_wait <= _timeout); \
+        osal_time_usecs_get(&_now), _chkCnt++, _t_wait += ((_now >= _t) ? (_now - _t) : (0xFFFFFFFF - _t + _now)),_t = _now \
+       )
+
+#define WAIT_COMPLETE_IS_TIMEOUT()   (_t_wait > _timeout)
+#endif
+
+/* OSAL */
+#include <linux/slab.h>
+int32 osal_time_usecs_get(osal_usecs_t *pUsec);
+void *osal_alloc(uint32 size);
+#define osal_time_mdelay  mdelay
+
+#include <linux/ctype.h>    /* for Kernel Space */
+#include <linux/kernel.h>
+#include <linux/string.h>
+#define osal_strlen   strlen
+#define osal_strcmp   strcmp
+#define osal_strcpy   strcpy
+#define osal_strncpy  strncpy
+#define osal_strcat   strcat
+#define osal_strchr   strchr
+#define osal_memset   memset
+#define osal_memcpy   memcpy
+#define osal_memcmp   memcmp
+#define osal_strdup   strdup
+#define osal_strncmp  strncmp
+#define osal_strstr   strstr
+#define osal_strtok   strtok
+#define osal_strtok_r   strtok_r
+#define osal_toupper  toupper
+
+#define osal_printf   printk
+
+/* HWP */
+#define HWP_PORT_SMI(unit, port)               0
+#define HWP_PHY_MODEL_BY_PORT(unit, port)      0
+#define HWP_PHY_ADDR(unit, port)               0
+#define HWP_PHY_BASE_MACID(unit, p)            0
+#define HWP_PORT_TRAVS_EXCEPT_CPU(unit, p)     if (bcast_phyad < 0x1F && p != NULL)
+
+
+/* RT_LOG */
+//#define RT_LOG(level, module, fmt, args...)               do { printk("RT_LOG:"fmt, ## args); } while(0)
+#define RT_LOG(level, module, fmt, args...)               do {} while(0)
+#define RT_ERR(error_code, module, fmt, args...)          do {} while(0)
+#define RT_INIT_ERR(error_code, module, fmt, args...)     do {} while(0)
+#define RT_INIT_MSG(fmt, args...)                         do {} while(0)
+
+#define phy_826xb_ctrl_set(unit, p, RTK_PHY_CTRL_MIIM_BCAST_PHYAD, bcast_phyad)  0
+
+/* reg access */
+int32 phy_common_general_reg_mmd_get(uint32 unit, rtk_port_t port, uint32 mmdAddr, uint32 mmdReg, uint32 *pData);
+int32 phy_common_general_reg_mmd_set(uint32 unit, rtk_port_t port, uint32 mmdAddr, uint32 mmdReg, uint32 data);
+
+
+#endif /* __RTK_PHY_OSAL_H */

diff --git a/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/rtk_phy.c b/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/rtk_phy.c
new file mode 100644 (file)
index 0000000..2818a27
--- /dev/null
+++ b/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/rtk_phy.c
@@ -0,0 +1,282 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-only
+ *
+ * Copyright (c) 2023 Realtek Semiconductor Corp. All rights reserved.
+ */
+
+#include <linux/module.h>
+#include <linux/phy.h>
+
+#include "phy_rtl826xb_patch.h"
+#include "rtk_phylib_rtl826xb.h"
+#include "rtk_phylib.h"
+
+#define REALTEK_PHY_ID_RTL8261N         0x001CCAF3
+#define REALTEK_PHY_ID_RTL8264B         0x001CC813
+
+static int rtl826xb_get_features(struct phy_device *phydev)
+{
+    int ret;
+    ret = genphy_c45_pma_read_abilities(phydev);
+    if (ret)
+        return ret;
+
+    linkmode_or(phydev->supported, phydev->supported, PHY_BASIC_FEATURES);
+
+
+    linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
+                       phydev->supported);
+    linkmode_set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT,
+                       phydev->supported);
+
+    /* not support 10M modes */
+    linkmode_clear_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT,
+                       phydev->supported);
+    linkmode_clear_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT,
+                       phydev->supported);
+
+    return 0;
+}
+
+static int rtl826xb_probe(struct phy_device *phydev)
+{
+    struct rtk_phy_priv *priv = NULL;
+
+    priv = devm_kzalloc(&phydev->mdio.dev, sizeof(struct rtk_phy_priv), GFP_KERNEL);
+    if (!priv)
+    {
+        return -ENOMEM;
+    }
+    memset(priv, 0, sizeof(struct rtk_phy_priv));
+
+    if (phy_rtl826xb_patch_db_init(0, phydev, &(priv->patch)) != RT_ERR_OK)
+        return -ENOMEM;
+
+    priv->phytype = (phydev->drv->phy_id == REALTEK_PHY_ID_RTL8261N) ? (RTK_PHYLIB_RTL8261N) : (RTK_PHYLIB_RTL8264B);
+    priv->isBasePort = (phydev->drv->phy_id == REALTEK_PHY_ID_RTL8261N) ? (1) : (((phydev->mdio.addr % 4) == 0) ? (1) : (0));
+    phydev->priv = priv;
+
+    return 0;
+}
+
+static int rtkphy_config_init(struct phy_device *phydev)
+{
+    int ret = 0;
+    switch (phydev->drv->phy_id)
+    {
+        case REALTEK_PHY_ID_RTL8261N:
+        case REALTEK_PHY_ID_RTL8264B:
+            phydev_info(phydev, "%s:%u [RTL8261N/RTL826XB] phy_id: 0x%X PHYAD:%d\n", __FUNCTION__, __LINE__, phydev->drv->phy_id, phydev->mdio.addr);
+
+
+          #if 1 /* toggle reset */
+            phy_modify_mmd_changed(phydev, 30, 0x145, BIT(0)  , 1);
+            phy_modify_mmd_changed(phydev, 30, 0x145, BIT(0)  , 0);
+            mdelay(30);
+          #endif
+
+            ret = phy_patch(0, phydev, 0, PHY_PATCH_MODE_NORMAL);
+            if (ret)
+            {
+                phydev_err(phydev, "%s:%u [RTL8261N/RTL826XB] patch failed!! 0x%X\n", __FUNCTION__, __LINE__, ret);
+                return ret;
+            }
+          #if 0 /* Debug: patch check */
+            ret = phy_patch(0, phydev, 0, PHY_PATCH_MODE_CMP);
+            if (ret)
+            {
+                phydev_err(phydev, "%s:%u [RTL8261N/RTL826XB] phy_patch failed!! 0x%X\n", __FUNCTION__, __LINE__, ret);
+                return ret;
+            }
+            printk("[%s,%u] patch chk %s\n", __FUNCTION__, __LINE__, (ret == 0) ? "PASS" : "FAIL");
+          #endif
+          #if 0 /* Debug: USXGMII*/
+            {
+                uint32 data = 0;
+                rtk_phylib_826xb_sds_read(phydev, 0x07, 0x10, 15, 0, &data);
+                printk("[%s,%u] SDS 0x07, 0x10 : 0x%X\n", __FUNCTION__, __LINE__, data);
+                rtk_phylib_826xb_sds_read(phydev, 0x06, 0x12, 15, 0, &data);
+                printk("[%s,%u] SDS 0x06, 0x12 : 0x%X\n", __FUNCTION__, __LINE__, data);
+            }
+            {
+                u16 sdspage = 0x5, sdsreg = 0x0;
+                u16 regData = (sdspage & 0x3f) | ((sdsreg & 0x1f) << 6) | BIT(15);
+                u16 readData = 0;
+                phy_write_mmd(phydev, 30, 323, regData);
+                do
+                {
+                    udelay(10);
+                    readData = phy_read_mmd(phydev, 30, 323);
+                } while ((readData & BIT(15)) != 0);
+                readData = phy_read_mmd(phydev, 30, 322);
+                printk("[%s,%d] sds link [%s] (0x%X)\n", __FUNCTION__, __LINE__, (readData & BIT(12)) ? "UP" : "DOWN", readData);
+            }
+          #endif
+
+            break;
+        default:
+            phydev_err(phydev, "%s:%u Unknow phy_id: 0x%X\n", __FUNCTION__, __LINE__, phydev->drv->phy_id);
+            return -EPERM;
+    }
+
+    return ret;
+}
+
+static int rtkphy_c45_suspend(struct phy_device *phydev)
+{
+    int ret = 0;
+
+    ret = rtk_phylib_c45_power_low(phydev);
+
+    phydev->speed = SPEED_UNKNOWN;
+    phydev->duplex = DUPLEX_UNKNOWN;
+    phydev->pause = 0;
+    phydev->asym_pause = 0;
+
+    return ret;
+}
+
+static int rtkphy_c45_resume(struct phy_device *phydev)
+{
+    return rtk_phylib_c45_power_normal(phydev);
+}
+
+static int rtkphy_c45_config_aneg(struct phy_device *phydev)
+{
+    bool changed = false;
+    u16 reg = 0;
+    int ret = 0;
+
+    phydev->mdix_ctrl = ETH_TP_MDI_AUTO;
+    if (phydev->autoneg == AUTONEG_DISABLE)
+        return genphy_c45_pma_setup_forced(phydev);
+
+    ret = genphy_c45_an_config_aneg(phydev);
+    if (ret < 0)
+        return ret;
+    if (ret > 0)
+        changed = true;
+
+    reg = 0;
+    if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
+                  phydev->advertising))
+        reg |= BIT(9);
+
+    if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
+                  phydev->advertising))
+        reg |= BIT(8);
+
+    ret = phy_modify_mmd_changed(phydev, MDIO_MMD_VEND2, 0xA412,
+                     BIT(9) | BIT(8) , reg);
+    if (ret < 0)
+        return ret;
+    if (ret > 0)
+        changed = true;
+
+    return genphy_c45_check_and_restart_aneg(phydev, changed);
+}
+
+static int rtkphy_c45_aneg_done(struct phy_device *phydev)
+{
+    return genphy_c45_aneg_done(phydev);
+}
+
+static int rtkphy_c45_read_status(struct phy_device *phydev)
+{
+    int ret = 0, status = 0;
+    phydev->speed = SPEED_UNKNOWN;
+    phydev->duplex = DUPLEX_UNKNOWN;
+    phydev->pause = 0;
+    phydev->asym_pause = 0;
+
+    ret = genphy_c45_read_link(phydev);
+    if (ret)
+        return ret;
+
+    if (phydev->autoneg == AUTONEG_ENABLE)
+    {
+        linkmode_clear_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
+           phydev->lp_advertising);
+
+        ret = genphy_c45_read_lpa(phydev);
+        if (ret)
+            return ret;
+
+        status =  phy_read_mmd(phydev, 31, 0xA414);
+        if (status < 0)
+            return status;
+        linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
+            phydev->lp_advertising, status & BIT(11));
+
+        phy_resolve_aneg_linkmode(phydev);
+    }
+    else
+    {
+        ret = genphy_c45_read_pma(phydev);
+    }
+
+    /* mdix*/
+    status = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_10GBT_SWAPPOL);
+    if (status < 0)
+        return status;
+
+    switch (status & 0x3)
+    {
+        case MDIO_PMA_10GBT_SWAPPOL_ABNX | MDIO_PMA_10GBT_SWAPPOL_CDNX:
+            phydev->mdix = ETH_TP_MDI;
+            break;
+
+        case 0:
+            phydev->mdix = ETH_TP_MDI_X;
+            break;
+
+        default:
+            phydev->mdix = ETH_TP_MDI_INVALID;
+            break;
+    }
+
+    return ret;
+}
+
+
+static struct phy_driver rtk_phy_drivers[] = {
+    {
+        PHY_ID_MATCH_EXACT(REALTEK_PHY_ID_RTL8261N),
+        .name               = "Realtek RTL8261N",
+        .get_features       = rtl826xb_get_features,
+        .config_init        = rtkphy_config_init,
+        .probe              = rtl826xb_probe,
+        .suspend            = rtkphy_c45_suspend,
+        .resume             = rtkphy_c45_resume,
+        .config_aneg        = rtkphy_c45_config_aneg,
+        .aneg_done          = rtkphy_c45_aneg_done,
+        .read_status        = rtkphy_c45_read_status,
+    },
+    {
+        PHY_ID_MATCH_EXACT(REALTEK_PHY_ID_RTL8264B),
+        .name               = "Realtek RTL8264B",
+        .get_features       = rtl826xb_get_features,
+        .config_init        = rtkphy_config_init,
+        .probe              = rtl826xb_probe,
+        .suspend            = rtkphy_c45_suspend,
+        .resume             = rtkphy_c45_resume,
+        .config_aneg        = rtkphy_c45_config_aneg,
+        .aneg_done          = rtkphy_c45_aneg_done,
+        .read_status        = rtkphy_c45_read_status,
+    },
+};
+
+module_phy_driver(rtk_phy_drivers);
+
+
+static struct mdio_device_id __maybe_unused rtk_phy_tbl[] = {
+    { PHY_ID_MATCH_EXACT(REALTEK_PHY_ID_RTL8261N) },
+    { PHY_ID_MATCH_EXACT(REALTEK_PHY_ID_RTL8264B) },
+    { },
+};
+
+MODULE_DEVICE_TABLE(mdio, rtk_phy_tbl);
+
+MODULE_AUTHOR("Realtek");
+MODULE_DESCRIPTION("Realtek PHY drivers");
+MODULE_LICENSE("GPL");

diff --git a/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/rtk_phylib.c b/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/rtk_phylib.c
new file mode 100644 (file)
index 0000000..7dd593c
--- /dev/null
+++ b/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/rtk_phylib.c
@@ -0,0 +1,108 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-only
+ *
+ * Copyright (c) 2023 Realtek Semiconductor Corp. All rights reserved.
+ */
+
+#include "rtk_phylib.h"
+#include <linux/phy.h>
+
+
+/* OSAL */
+
+void rtk_phylib_mdelay(uint32 msec)
+{
+#if defined(RTK_PHYDRV_IN_LINUX)
+    mdelay(msec);
+#else
+    osal_time_mdelay(msec);
+#endif
+}
+
+
+void rtk_phylib_udelay(uint32 usec)
+{
+#if defined(RTK_PHYDRV_IN_LINUX)
+    if (1000 <= usec)
+    {
+        mdelay(usec/1000);
+        usec = usec % 1000;
+    }
+    udelay(usec);
+#else
+    osal_time_udelay(usec);
+#endif
+}
+
+
+/* Register Access APIs */
+int32 rtk_phylib_mmd_write(rtk_phydev *phydev, uint32 mmd, uint32 reg, uint8 msb, uint8 lsb, uint32 data)
+{
+    int32  ret = 0;
+    uint32 mask = 0;
+    mask = UINT32_BITS_MASK(msb,lsb);
+
+#if defined(RTK_PHYDRV_IN_LINUX)
+    ret = phy_modify_mmd(phydev, mmd, reg, mask, data);
+#else
+    {
+        uint32 rData = 0, wData = 0;
+        if ((msb != 15) || (lsb != 0))
+        {
+            if ((ret = phy_common_general_reg_mmd_get(phydev->unit, phydev->port, page, reg, &rData)) != RT_ERR_OK)
+                return ret;
+        }
+        wData = REG32_FIELD_SET(rData, data, lsb, mask);
+        ret = phy_common_general_reg_mmd_set(phydev->unit, phydev->port, page, reg, wData);
+    }
+#endif
+
+    return ret;
+}
+
+int32 rtk_phylib_mmd_read(rtk_phydev *phydev, uint32 mmd, uint32 reg, uint8 msb, uint8 lsb, uint32 *pData)
+{
+    int32  ret = 0;
+    uint32 rData = 0;
+    uint32 mask = 0;
+    mask = UINT32_BITS_MASK(msb,lsb);
+
+#if defined(RTK_PHYDRV_IN_LINUX)
+    rData =  phy_read_mmd(phydev, mmd, reg);
+#else
+    {
+        ret = phy_common_general_reg_mmd_get(phydev->unit, phydev->port, page, reg, &rData);
+    }
+#endif
+
+    *pData = REG32_FIELD_GET(rData, lsb, mask);
+    return ret;
+}
+
+/* Function Driver */
+
+int32 rtk_phylib_c45_power_normal(rtk_phydev *phydev)
+{
+    int32  ret = 0;
+    RTK_PHYLIB_ERR_CHK(rtk_phylib_mmd_write(phydev, 1, 0, 11, 11, 0));
+
+    return 0;
+}
+
+int32 rtk_phylib_c45_power_low(rtk_phydev *phydev)
+{
+    int32  ret = 0;
+    RTK_PHYLIB_ERR_CHK(rtk_phylib_mmd_write(phydev, 1, 0, 11, 11, 1));
+
+    return 0;
+}
+
+int32 rtk_phylib_c45_pcs_loopback(rtk_phydev *phydev, uint32 enable)
+{
+    int32  ret = 0;
+    RTK_PHYLIB_ERR_CHK(rtk_phylib_mmd_write(phydev, 3, 0, 14, 14, (enable == 0) ? 0 : 1));
+
+    return 0;
+}
+
+

diff --git a/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/rtk_phylib.h b/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/rtk_phylib.h
new file mode 100644 (file)
index 0000000..70eb8e4
--- /dev/null
+++ b/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/rtk_phylib.h
@@ -0,0 +1,101 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-only
+ *
+ * Copyright (c) 2023 Realtek Semiconductor Corp. All rights reserved.
+ */
+
+#ifndef __RTK_PHYLIB_H
+#define __RTK_PHYLIB_H
+
+#if defined(RTK_PHYDRV_IN_LINUX)
+  #include "type.h"
+  #include "rtk_phylib_def.h"
+#else
+  //#include SDK headers
+#endif
+
+#if defined(RTK_PHYDRV_IN_LINUX)
+  #define PR_INFO(_fmt, _args...) pr_info(_fmt, ##_args)
+  #define PR_DBG(_fmt, _args...)  pr_debug(_fmt, ##_args)
+  #define PR_ERR(_fmt, _args...)  pr_err("ERROR: "_fmt, ##_args)
+
+  #define RTK_PHYLIB_ERR_FAILED             (-EPERM)
+  #define RTK_PHYLIB_ERR_INPUT              (-EINVAL)
+  #define RTK_PHYLIB_ERR_EXCEEDS_CAPACITY   (-ENOSPC)
+  #define RTK_PHYLIB_ERR_TIMEOUT            (-ETIME)
+  #define RTK_PHYLIB_ERR_ENTRY_NOTFOUND     (-ENODATA)
+#else
+  #define PR_INFO(_fmt, _args...) RT_LOG(LOG_INFO, (MOD_HAL|MOD_PHY), _fmt, ##_args)
+  #define PR_DBG(_fmt, _args...)  RT_LOG(LOG_DEBUG, (MOD_HAL|MOD_PHY), _fmt, ##_args)
+  #define PR_ERR(_fmt, _args...)  RT_LOG(LOG_MAJOR_ERR, (MOD_HAL|MOD_PHY), _fmt, ##_args)
+
+  #define RTK_PHYLIB_ERR_FAILED              (RT_ERR_FAILED)
+  #define RTK_PHYLIB_ERR_INPUT               (RT_ERR_INPUT)
+  #define RTK_PHYLIB_ERR_EXCEEDS_CAPACITY    (RT_ERR_EXCEEDS_CAPACITY)
+  #define RTK_PHYLIB_ERR_TIMEOUT             (RT_ERR_BUSYWAIT_TIMEOUT)
+  #define RTK_PHYLIB_ERR_ENTRY_NOTFOUND      (RT_ERR_ENTRY_NOTFOUND)
+#endif
+
+typedef enum rtk_phylib_phy_e
+{
+    RTK_PHYLIB_NONE,
+    RTK_PHYLIB_RTL8261N,
+    RTK_PHYLIB_RTL8264B,
+    RTK_PHYLIB_END
+} rtk_phylib_phy_t;
+
+struct rtk_phy_priv {
+    rtk_phylib_phy_t phytype;
+    uint8 isBasePort;
+    rt_phy_patch_db_t *patch;
+};
+
+#if defined(RTK_PHYDRV_IN_LINUX)
+    typedef struct phy_device rtk_phydev;
+#else
+    struct rtk_phy_dev_s
+    {
+        uint32 unit;
+        rtk_port_t port;
+
+        struct rtk_phy_priv *priv;
+    };
+    typedef struct rtk_phy_dev_s rtk_phydev;
+#endif
+
+#define RTK_PHYLIB_ERR_CHK(op)\
+do {\
+    if ((ret = (op)) != 0)\
+        return ret;\
+} while(0)
+
+#define RTK_PHYLIB_VAL_TO_BYTE_ARRAY(_val, _valbytes, _array, _start, _bytes)\
+do{\
+    uint32 _i = 0;\
+    for (_i = 0; _i < _bytes; _i++)\
+        _array[_start+_i] = (_val >> (8* (_valbytes - _i - 1)));\
+}while(0)
+
+#define RTK_PHYLIB_BYTE_ARRAY_TO_VAL(_val, _array, _start, _bytes)\
+do{\
+    uint32 _i = 0;\
+    for (_i = 0; _i < _bytes; _i++)\
+        _val = (_val << 8) | _array[_start + _i];\
+}while(0)
+
+
+/* OSAL */
+void rtk_phylib_mdelay(uint32 msec);
+void rtk_phylib_udelay(uint32 usec);
+
+/* Register Access APIs */
+int32 rtk_phylib_mmd_write(rtk_phydev *phydev, uint32 mmd, uint32 reg, uint8 msb, uint8 lsb, uint32 data);
+int32 rtk_phylib_mmd_read(rtk_phydev *phydev, uint32 mmd, uint32 reg, uint8 msb, uint8 lsb, uint32 *pData);
+
+/* Function Driver */
+int32 rtk_phylib_c45_power_normal(rtk_phydev *phydev);
+int32 rtk_phylib_c45_power_low(rtk_phydev *phydev);
+int32 rtk_phylib_c45_pcs_loopback(rtk_phydev *phydev, uint32 enable);
+
+
+#endif /* __RTK_PHYLIB_H */

diff --git a/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/rtk_phylib_def.h b/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/rtk_phylib_def.h
new file mode 100644 (file)
index 0000000..f49f0b5
--- /dev/null
+++ b/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/rtk_phylib_def.h
@@ -0,0 +1,166 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-only
+ *
+ * Copyright (c) 2023 Realtek Semiconductor Corp. All rights reserved.
+ */
+#ifndef __RTK_PHYLIB_DEF_H
+#define __RTK_PHYLIB_DEF_H
+
+#include "type.h"
+
+//#define PHY_C22_MMD_PAGE            0
+#define PHY_C22_MMD_PAGE            0x0A41
+#define PHY_C22_MMD_DEV_REG         13
+#define PHY_C22_MMD_ADD_REG         14
+
+/* MDIO Manageable Device(MDD) address*/
+#define PHY_MMD_PMAPMD              1
+#define PHY_MMD_PCS                 3
+#define PHY_MMD_AN                  7
+#define PHY_MMD_VEND1               30   /* Vendor specific 1 */
+#define PHY_MMD_VEND2               31   /* Vendor specific 2 */
+
+#define BIT_0        0x00000001U
+#define BIT_1        0x00000002U
+#define BIT_2        0x00000004U
+#define BIT_3        0x00000008U
+#define BIT_4        0x00000010U
+#define BIT_5        0x00000020U
+#define BIT_6        0x00000040U
+#define BIT_7        0x00000080U
+#define BIT_8        0x00000100U
+#define BIT_9        0x00000200U
+#define BIT_10       0x00000400U
+#define BIT_11       0x00000800U
+#define BIT_12       0x00001000U
+#define BIT_13       0x00002000U
+#define BIT_14       0x00004000U
+#define BIT_15       0x00008000U
+#define BIT_16       0x00010000U
+#define BIT_17       0x00020000U
+#define BIT_18       0x00040000U
+#define BIT_19       0x00080000U
+#define BIT_20       0x00100000U
+#define BIT_21       0x00200000U
+#define BIT_22       0x00400000U
+#define BIT_23       0x00800000U
+#define BIT_24       0x01000000U
+#define BIT_25       0x02000000U
+#define BIT_26       0x04000000U
+#define BIT_27       0x08000000U
+#define BIT_28       0x10000000U
+#define BIT_29       0x20000000U
+#define BIT_30       0x40000000U
+#define BIT_31       0x80000000U
+
+#define MASK_1_BITS     (BIT_1 - 1)
+#define MASK_2_BITS     (BIT_2 - 1)
+#define MASK_3_BITS     (BIT_3 - 1)
+#define MASK_4_BITS     (BIT_4 - 1)
+#define MASK_5_BITS     (BIT_5 - 1)
+#define MASK_6_BITS     (BIT_6 - 1)
+#define MASK_7_BITS     (BIT_7 - 1)
+#define MASK_8_BITS     (BIT_8 - 1)
+#define MASK_9_BITS     (BIT_9 - 1)
+#define MASK_10_BITS    (BIT_10 - 1)
+#define MASK_11_BITS    (BIT_11 - 1)
+#define MASK_12_BITS    (BIT_12 - 1)
+#define MASK_13_BITS    (BIT_13 - 1)
+#define MASK_14_BITS    (BIT_14 - 1)
+#define MASK_15_BITS    (BIT_15 - 1)
+#define MASK_16_BITS    (BIT_16 - 1)
+#define MASK_17_BITS    (BIT_17 - 1)
+#define MASK_18_BITS    (BIT_18 - 1)
+#define MASK_19_BITS    (BIT_19 - 1)
+#define MASK_20_BITS    (BIT_20 - 1)
+#define MASK_21_BITS    (BIT_21 - 1)
+#define MASK_22_BITS    (BIT_22 - 1)
+#define MASK_23_BITS    (BIT_23 - 1)
+#define MASK_24_BITS    (BIT_24 - 1)
+#define MASK_25_BITS    (BIT_25 - 1)
+#define MASK_26_BITS    (BIT_26 - 1)
+#define MASK_27_BITS    (BIT_27 - 1)
+#define MASK_28_BITS    (BIT_28 - 1)
+#define MASK_29_BITS    (BIT_29 - 1)
+#define MASK_30_BITS    (BIT_30 - 1)
+#define MASK_31_BITS    (BIT_31 - 1)
+
+#define REG32_FIELD_SET(_data, _val, _fOffset, _fMask)      ((_data & ~(_fMask)) | ((_val << (_fOffset)) & (_fMask)))
+#define REG32_FIELD_GET(_data, _fOffset, _fMask)            ((_data & (_fMask)) >> (_fOffset))
+#define UINT32_BITS_MASK(_mBit, _lBit)                      ((0xFFFFFFFF >> (31 - _mBit)) ^ ((1 << _lBit) - 1))
+
+typedef struct phy_device *  rtk_port_t;
+
+#if 1 /* ss\sdk\include\hal\phy\phydef.h */
+/* unified patch format */
+typedef enum rtk_phypatch_type_e
+{
+    PHY_PATCH_TYPE_NONE = 0,
+    PHY_PATCH_TYPE_TOP = 1,
+    PHY_PATCH_TYPE_SDS,
+    PHY_PATCH_TYPE_AFE,
+    PHY_PATCH_TYPE_UC,
+    PHY_PATCH_TYPE_UC2,
+    PHY_PATCH_TYPE_NCTL0,
+    PHY_PATCH_TYPE_NCTL1,
+    PHY_PATCH_TYPE_NCTL2,
+    PHY_PATCH_TYPE_ALGXG,
+    PHY_PATCH_TYPE_ALG1G,
+    PHY_PATCH_TYPE_NORMAL,
+    PHY_PATCH_TYPE_DATARAM,
+    PHY_PATCH_TYPE_RTCT,
+    PHY_PATCH_TYPE_END
+} rtk_phypatch_type_t;
+
+#define RTK_PATCH_TYPE_FLOW(_id)    (PHY_PATCH_TYPE_END + _id)
+#define RTK_PATCH_TYPE_FLOWID_MAX   PHY_PATCH_TYPE_END
+#define RTK_PATCH_SEQ_MAX     ( PHY_PATCH_TYPE_END + RTK_PATCH_TYPE_FLOWID_MAX -1)
+
+typedef struct rtk_hwpatch_s
+{
+    uint8    patch_op;
+    uint8    portmask;
+    uint16   pagemmd;
+    uint16   addr;
+    uint8    msb;
+    uint8    lsb;
+    uint16   data;
+    uint8    compare_op;
+    uint16   sram_p;
+    uint16   sram_rr;
+    uint16   sram_rw;
+    uint16   sram_a;
+} rtk_hwpatch_t;
+
+typedef struct rtk_hwpatch_data_s
+{
+    rtk_hwpatch_t *conf;
+    uint32        size;
+} rtk_hwpatch_data_t;
+
+typedef struct rtk_hwpatch_seq_s
+{
+    uint8 patch_type;
+    union
+    {
+        rtk_hwpatch_data_t data;
+        uint8 flow_id;
+    } patch;
+} rtk_hwpatch_seq_t;
+
+typedef struct rt_phy_patch_db_s
+{
+    /* patch operation */
+    int32   (*fPatch_op)(uint32 unit, rtk_port_t port, uint8 portOffset, rtk_hwpatch_t *pPatch_data, uint8 patch_mode);
+    int32   (*fPatch_flow)(uint32 unit, rtk_port_t port, uint8 portOffset, uint8 patch_flow, uint8 patch_mode);
+
+    /* patch data */
+    rtk_hwpatch_seq_t seq_table[RTK_PATCH_SEQ_MAX];
+    rtk_hwpatch_seq_t cmp_table[RTK_PATCH_SEQ_MAX];
+
+} rt_phy_patch_db_t;
+#endif
+
+
+
+#endif /* __RTK_PHYLIB_DEF_H */

diff --git a/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/rtk_phylib_rtl826xb.c b/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/rtk_phylib_rtl826xb.c
new file mode 100644 (file)
index 0000000..1c33846
--- /dev/null
+++ b/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/rtk_phylib_rtl826xb.c
@@ -0,0 +1,57 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-only
+ *
+ * Copyright (c) 2023 Realtek Semiconductor Corp. All rights reserved.
+ */
+
+#include "rtk_phylib_rtl826xb.h"
+
+/* Indirect Register Access APIs */
+int rtk_phylib_826xb_sds_read(rtk_phydev *phydev, uint32 page, uint32 reg, uint8 msb, uint8 lsb, uint32 *pData)
+{
+    int32  ret = 0;
+    uint32 rData = 0;
+    uint32 op = (page & 0x3f) | ((reg & 0x1f) << 6) | (0x8000);
+    uint32 i = 0;
+    uint32 mask = 0;
+    mask = UINT32_BITS_MASK(msb,lsb);
+
+    RTK_PHYLIB_ERR_CHK(rtk_phylib_mmd_write(phydev, 30, 323, 15, 0, op));
+
+    for (i = 0; i < 10; i++)
+    {
+        RTK_PHYLIB_ERR_CHK(rtk_phylib_mmd_read(phydev, 30, 323, 15, 15, &rData));
+        if (rData == 0)
+        {
+            break;
+        }
+        rtk_phylib_udelay(10);
+    }
+    if (i == 10)
+    {
+        return -1;
+    }
+
+    RTK_PHYLIB_ERR_CHK(rtk_phylib_mmd_read(phydev, 30, 322, 15, 0, &rData));
+    *pData = REG32_FIELD_GET(rData, lsb, mask);
+
+    return ret;
+}
+
+int rtk_phylib_826xb_sds_write(rtk_phydev *phydev, uint32 page, uint32 reg, uint8 msb, uint8 lsb, uint32 data)
+{
+    int32  ret = 0;
+    uint32 wData = 0, rData = 0;
+    uint32 op = (page & 0x3f) | ((reg & 0x1f) << 6) | (0x8800);
+    uint32 mask = 0;
+    mask = UINT32_BITS_MASK(msb,lsb);
+
+    RTK_PHYLIB_ERR_CHK(rtk_phylib_826xb_sds_read(phydev, page, reg, 15, 0, &rData));
+
+    wData = REG32_FIELD_SET(rData, data, lsb, mask);
+
+    RTK_PHYLIB_ERR_CHK(rtk_phylib_mmd_write(phydev, 30, 321, 15, 0, wData));
+    RTK_PHYLIB_ERR_CHK(rtk_phylib_mmd_write(phydev, 30, 323, 15, 0, op));
+
+    return ret;
+}

diff --git a/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/rtk_phylib_rtl826xb.h b/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/rtk_phylib_rtl826xb.h
new file mode 100644 (file)
index 0000000..9f827d4
--- /dev/null
+++ b/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/rtk_phylib_rtl826xb.h
@@ -0,0 +1,19 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-only
+ *
+ * Copyright (c) 2023 Realtek Semiconductor Corp. All rights reserved.
+ */
+
+#ifndef __RTK_PHYLIB_RTL826XB_H
+#define __RTK_PHYLIB_RTL826XB_H
+
+#if defined(RTK_PHYDRV_IN_LINUX)
+  #include "rtk_phylib.h"
+#else
+  //#include SDK headers
+#endif
+
+int rtk_phylib_826xb_sds_read(rtk_phydev *phydev, uint32 page, uint32 reg, uint8 msb, uint8 lsb, uint32 *pData);
+int rtk_phylib_826xb_sds_write(rtk_phydev *phydev, uint32 page, uint32 reg, uint8 msb, uint8 lsb, uint32 data);
+
+#endif /* __RTK_PHYLIB_RTL826XB_H */

diff --git a/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/type.h b/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/type.h
new file mode 100644 (file)
index 0000000..98d7e15
--- /dev/null
+++ b/target/linux/mediatek/files-6.6/drivers/net/phy/rtl8261n/type.h
@@ -0,0 +1,117 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-only
+ *
+ * Copyright (c) 2023 Realtek Semiconductor Corp. All rights reserved.
+ */
+
+#ifndef __COMMON_TYPE_H__
+#define __COMMON_TYPE_H__
+
+/*
+ * Symbol Definition
+ */
+
+#define USING_RTSTK_PKT_AS_RAIL
+
+
+#ifndef NULL
+#define NULL 0
+#endif
+
+#ifndef TRUE
+#define TRUE 1
+#endif
+
+#ifndef FALSE
+#define FALSE 0
+#endif
+
+#ifndef ETHER_ADDR_LEN
+#define ETHER_ADDR_LEN 6
+#endif
+
+#ifndef IP6_ADDR_LEN
+#define IP6_ADDR_LEN    16
+#endif
+
+
+/*
+ * Data Type Declaration
+ */
+#ifndef uint64
+typedef unsigned long long  uint64;
+#endif
+
+#ifndef int64
+typedef signed long long    int64;
+#endif
+
+#ifndef uint32
+typedef unsigned int        uint32;
+#endif
+
+#ifndef int32
+typedef signed int          int32;
+#endif
+
+#ifndef uint16
+typedef unsigned short      uint16;
+#endif
+
+#ifndef int16
+typedef signed short        int16;
+#endif
+
+#ifndef uint8
+typedef unsigned char       uint8;
+#endif
+
+#ifndef int8
+typedef signed char         int8;
+#endif
+
+//#define CONFIG_SDK_WORDSIZE_64 /* not ready */
+#ifdef CONFIG_SDK_WORDSIZE_64
+  typedef long int                intptr;
+  typedef unsigned long int       uintptr;
+#else
+  typedef int                     intptr;
+  typedef unsigned int            uintptr;
+#endif
+
+
+#ifndef ipaddr_t
+typedef uint32  ipaddr_t;           /* ipv4 address type */
+#endif
+
+/* configuration mode type */
+typedef enum rtk_enable_e
+{
+    DISABLED = 0,
+    ENABLED,
+    RTK_ENABLE_END
+} rtk_enable_t;
+
+/* initial state of module */
+typedef enum init_state_e
+{
+    INIT_NOT_COMPLETED = 0,
+    INIT_COMPLETED,
+    INIT_STATE_END
+} init_state_t;
+
+/* ethernet address type */
+typedef struct  rtk_mac_s
+{
+    uint8 octet[ETHER_ADDR_LEN];
+} rtk_mac_t;
+
+typedef uint32  osal_time_t;
+typedef uint32  osal_usecs_t;
+
+/*
+ * Macro Definition
+ */
+
+#endif /* __COMMON_TYPE_H__ */
+

diff --git a/target/linux/mediatek/filogic/config-6.6 b/target/linux/mediatek/filogic/config-6.6
index 7cf045ade2a5e2846f5aa6860ca691bebf26b39c..ba472b6ced78aff60f2de2008e1b375f2a068833 100644 (file)
--- a/target/linux/mediatek/filogic/config-6.6
+++ b/target/linux/mediatek/filogic/config-6.6
@@ -428,6 +428,7 @@ CONFIG_RPS=y
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_MT7622=y
 CONFIG_RTC_I2C_AND_SPI=y
+CONFIG_RTL8261N_PHY=y
 # CONFIG_RTL8367S_GSW is not set
 CONFIG_RWSEM_SPIN_ON_OWNER=y
 CONFIG_SCHED_MC=y

diff --git a/target/linux/mediatek/mt7622/config-6.6 b/target/linux/mediatek/mt7622/config-6.6
index 138eb2aaca0e0419e2f33ed0923c425616bada4e..e4a9e4b9cb66e975362f340ed8de40bbfba111a0 100644 (file)
--- a/target/linux/mediatek/mt7622/config-6.6
+++ b/target/linux/mediatek/mt7622/config-6.6
@@ -424,6 +424,7 @@ CONFIG_RPS=y
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_MT7622=y
 CONFIG_RTC_I2C_AND_SPI=y
+# CONFIG_RTL8261N_PHY is not set
 CONFIG_RTL8367S_GSW=y
 CONFIG_RWSEM_SPIN_ON_OWNER=y
 CONFIG_SCHED_MC=y

diff --git a/target/linux/mediatek/mt7623/config-6.6 b/target/linux/mediatek/mt7623/config-6.6
index baa31b465df9ad6e2075be7aa8cf39f6b8dfbd5e..d04188f20cd6d011875983f5545a52069b8444a7 100644 (file)
--- a/target/linux/mediatek/mt7623/config-6.6
+++ b/target/linux/mediatek/mt7623/config-6.6
@@ -541,6 +541,7 @@ CONFIG_RTC_CLASS=y
 # CONFIG_RTC_DRV_MT7622 is not set
 CONFIG_RTC_I2C_AND_SPI=y
 CONFIG_RTC_MC146818_LIB=y
+# CONFIG_RTL8261N_PHY is not set
 # CONFIG_RTL8367S_GSW is not set
 CONFIG_RWSEM_SPIN_ON_OWNER=y
 # CONFIG_SERIAL_8250_DMA is not set

diff --git a/target/linux/mediatek/mt7629/config-6.6 b/target/linux/mediatek/mt7629/config-6.6
index 5169acb99f003372144c49426a9301d640db4802..384311dc7107cff9756e79210038e5dc2f63f30f 100644 (file)
--- a/target/linux/mediatek/mt7629/config-6.6
+++ b/target/linux/mediatek/mt7629/config-6.6
@@ -301,6 +301,7 @@ CONFIG_REGMAP_MMIO=y
 CONFIG_RESET_CONTROLLER=y
 CONFIG_RFS_ACCEL=y
 CONFIG_RPS=y
+# CONFIG_RTL8261N_PHY is not set
 # CONFIG_RTL8367S_GSW is not set
 CONFIG_RWSEM_SPIN_ON_OWNER=y
 CONFIG_SCSI=y

diff --git a/target/linux/mediatek/patches-6.6/735-net-phy-realtek-rtl8261n.patch b/target/linux/mediatek/patches-6.6/735-net-phy-realtek-rtl8261n.patch
new file mode 100644 (file)
index 0000000..3612b52
--- /dev/null
+++ b/target/linux/mediatek/patches-6.6/735-net-phy-realtek-rtl8261n.patch
@@ -0,0 +1,21 @@
+--- a/drivers/net/phy/Kconfig
++++ b/drivers/net/phy/Kconfig
+@@ -334,6 +334,8 @@ config REALTEK_PHY
+       help
+         Supports the Realtek 821x PHY.
+ 
++source "drivers/net/phy/rtl8261n/Kconfig"
++
+ config RENESAS_PHY
+       tristate "Renesas PHYs"
+       help
+--- a/drivers/net/phy/Makefile
++++ b/drivers/net/phy/Makefile
+@@ -85,6 +85,7 @@ obj-$(CONFIG_ADIN_PHY)               += adin.o
+ obj-y                         += qcom/
+ obj-$(CONFIG_QSEMI_PHY)               += qsemi.o
+ obj-$(CONFIG_REALTEK_PHY)     += realtek.o
++obj-y                         += rtl8261n/
+ obj-$(CONFIG_RENESAS_PHY)     += uPD60620.o
+ obj-$(CONFIG_ROCKCHIP_PHY)    += rockchip.o
+ obj-$(CONFIG_SMSC_PHY)                += smsc.o