drm/i915: Clean up DP/HDMI limited color range handling
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Mon, 6 Jul 2015 12:10:00 +0000 (15:10 +0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 14 Aug 2015 16:16:34 +0000 (18:16 +0200)
Currently we treat intel_{dp,hdmi}->color_range as partly user
controller value (via the property) but we also change it during
.compute_config() when using the "Automatic" mode. That is a bit
confusing, so let's just change things so that we store the user
property values in intel_dp, and only change what's stored in
pipe_config during .compute_config().

There should be no functional change.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_dp.c
drivers/gpu/drm/i915/intel_drv.h
drivers/gpu/drm/i915/intel_hdmi.c

index a028246494232087fe817596f42f1cddc98dd55e..df1b663300c4ff63eb85ca4fbe6633f6fb25aaea 100644 (file)
@@ -1492,15 +1492,13 @@ found:
                 * CEA-861-E - 5.1 Default Encoding Parameters
                 * VESA DisplayPort Ver.1.2a - 5.1.1.1 Video Colorimetry
                 */
-               if (bpp != 18 && drm_match_cea_mode(adjusted_mode) > 1)
-                       intel_dp->color_range = DP_COLOR_RANGE_16_235;
-               else
-                       intel_dp->color_range = 0;
+               pipe_config->limited_color_range =
+                       bpp != 18 && drm_match_cea_mode(adjusted_mode) > 1;
+       } else {
+               pipe_config->limited_color_range =
+                       intel_dp->limited_color_range;
        }
 
-       if (intel_dp->color_range)
-               pipe_config->limited_color_range = true;
-
        intel_dp->lane_count = lane_count;
 
        if (intel_dp->num_sink_rates) {
@@ -1642,8 +1640,9 @@ static void intel_dp_prepare(struct intel_encoder *encoder)
                        trans_dp &= ~TRANS_DP_ENH_FRAMING;
                I915_WRITE(TRANS_DP_CTL(crtc->pipe), trans_dp);
        } else {
-               if (!HAS_PCH_SPLIT(dev) && !IS_VALLEYVIEW(dev))
-                       intel_dp->DP |= intel_dp->color_range;
+               if (!HAS_PCH_SPLIT(dev) && !IS_VALLEYVIEW(dev) &&
+                   crtc->config->limited_color_range)
+                       intel_dp->DP |= DP_COLOR_RANGE_16_235;
 
                if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
                        intel_dp->DP |= DP_SYNC_HS_HIGH;
@@ -4751,7 +4750,7 @@ intel_dp_set_property(struct drm_connector *connector,
 
        if (property == dev_priv->broadcast_rgb_property) {
                bool old_auto = intel_dp->color_range_auto;
-               uint32_t old_range = intel_dp->color_range;
+               bool old_range = intel_dp->limited_color_range;
 
                switch (val) {
                case INTEL_BROADCAST_RGB_AUTO:
@@ -4759,18 +4758,18 @@ intel_dp_set_property(struct drm_connector *connector,
                        break;
                case INTEL_BROADCAST_RGB_FULL:
                        intel_dp->color_range_auto = false;
-                       intel_dp->color_range = 0;
+                       intel_dp->limited_color_range = false;
                        break;
                case INTEL_BROADCAST_RGB_LIMITED:
                        intel_dp->color_range_auto = false;
-                       intel_dp->color_range = DP_COLOR_RANGE_16_235;
+                       intel_dp->limited_color_range = true;
                        break;
                default:
                        return -EINVAL;
                }
 
                if (old_auto == intel_dp->color_range_auto &&
-                   old_range == intel_dp->color_range)
+                   old_range == intel_dp->limited_color_range)
                        return 0;
 
                goto done;
index 6b3e2c6e6c5415e418f9e8c1547fa1b9bc08e4d5..e2456bc089b8283d1d12c89872f592e07ef0b803 100644 (file)
@@ -657,7 +657,7 @@ struct cxsr_latency {
 struct intel_hdmi {
        u32 hdmi_reg;
        int ddc_bus;
-       uint32_t color_range;
+       bool limited_color_range;
        bool color_range_auto;
        bool has_hdmi_sink;
        bool has_audio;
@@ -708,7 +708,7 @@ struct intel_dp {
        uint32_t DP;
        bool has_audio;
        enum hdmi_force_audio force_audio;
-       uint32_t color_range;
+       bool limited_color_range;
        bool color_range_auto;
        uint8_t link_bw;
        uint8_t rate_select;
index 0cfbe85fe27124ddba8b4844dca15cb4ac2a4213..7185062c8c9b497225f5e0268dc3c4a5c192288c 100644 (file)
@@ -848,8 +848,8 @@ static void intel_hdmi_prepare(struct intel_encoder *encoder)
        u32 hdmi_val;
 
        hdmi_val = SDVO_ENCODING_HDMI;
-       if (!HAS_PCH_SPLIT(dev))
-               hdmi_val |= intel_hdmi->color_range;
+       if (!HAS_PCH_SPLIT(dev) && crtc->config->limited_color_range)
+               hdmi_val |= HDMI_COLOR_RANGE_16_235;
        if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
                hdmi_val |= SDVO_VSYNC_ACTIVE_HIGH;
        if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
@@ -1260,11 +1260,12 @@ bool intel_hdmi_compute_config(struct intel_encoder *encoder,
 
        if (intel_hdmi->color_range_auto) {
                /* See CEA-861-E - 5.1 Default Encoding Parameters */
-               if (pipe_config->has_hdmi_sink &&
-                   drm_match_cea_mode(adjusted_mode) > 1)
-                       intel_hdmi->color_range = HDMI_COLOR_RANGE_16_235;
-               else
-                       intel_hdmi->color_range = 0;
+               pipe_config->limited_color_range =
+                       pipe_config->has_hdmi_sink &&
+                       drm_match_cea_mode(adjusted_mode) > 1;
+       } else {
+               pipe_config->limited_color_range =
+                       intel_hdmi->limited_color_range;
        }
 
        if (adjusted_mode->flags & DRM_MODE_FLAG_DBLCLK) {
@@ -1273,9 +1274,6 @@ bool intel_hdmi_compute_config(struct intel_encoder *encoder,
                clock_12bpc *= 2;
        }
 
-       if (intel_hdmi->color_range)
-               pipe_config->limited_color_range = true;
-
        if (HAS_PCH_SPLIT(dev) && !HAS_DDI(dev))
                pipe_config->has_pch_encoder = true;
 
@@ -1470,7 +1468,7 @@ intel_hdmi_set_property(struct drm_connector *connector,
 
        if (property == dev_priv->broadcast_rgb_property) {
                bool old_auto = intel_hdmi->color_range_auto;
-               uint32_t old_range = intel_hdmi->color_range;
+               bool old_range = intel_hdmi->limited_color_range;
 
                switch (val) {
                case INTEL_BROADCAST_RGB_AUTO:
@@ -1478,18 +1476,18 @@ intel_hdmi_set_property(struct drm_connector *connector,
                        break;
                case INTEL_BROADCAST_RGB_FULL:
                        intel_hdmi->color_range_auto = false;
-                       intel_hdmi->color_range = 0;
+                       intel_hdmi->limited_color_range = false;
                        break;
                case INTEL_BROADCAST_RGB_LIMITED:
                        intel_hdmi->color_range_auto = false;
-                       intel_hdmi->color_range = HDMI_COLOR_RANGE_16_235;
+                       intel_hdmi->limited_color_range = true;
                        break;
                default:
                        return -EINVAL;
                }
 
                if (old_auto == intel_hdmi->color_range_auto &&
-                   old_range == intel_hdmi->color_range)
+                   old_range == intel_hdmi->limited_color_range)
                        return 0;
 
                goto done;