unsigned int vced_count, vcei_count;
static const char *cpu_name[] = {
- [CPU_UNKNOWN] "unknown",
- [CPU_R2000] "R2000",
- [CPU_R3000] "R3000",
- [CPU_R3000A] "R3000A",
- [CPU_R3041] "R3041",
- [CPU_R3051] "R3051",
- [CPU_R3052] "R3052",
- [CPU_R3081] "R3081",
- [CPU_R3081E] "R3081E",
- [CPU_R4000PC] "R4000PC",
- [CPU_R4000SC] "R4000SC",
- [CPU_R4000MC] "R4000MC",
- [CPU_R4200] "R4200",
- [CPU_R4400PC] "R4400PC",
- [CPU_R4400SC] "R4400SC",
- [CPU_R4400MC] "R4400MC",
- [CPU_R4600] "R4600",
- [CPU_R6000] "R6000",
- [CPU_R6000A] "R6000A",
- [CPU_R8000] "R8000",
- [CPU_R10000] "R10000",
- [CPU_R12000] "R12000",
- [CPU_R4300] "R4300",
- [CPU_R4650] "R4650",
- [CPU_R4700] "R4700",
- [CPU_R5000] "R5000",
- [CPU_R5000A] "R5000A",
- [CPU_R4640] "R4640",
- [CPU_NEVADA] "Nevada",
- [CPU_RM7000] "RM7000",
- [CPU_RM9000] "RM9000",
- [CPU_R5432] "R5432",
- [CPU_4KC] "MIPS 4Kc",
- [CPU_5KC] "MIPS 5Kc",
- [CPU_R4310] "R4310",
- [CPU_SB1] "SiByte SB1",
- [CPU_TX3912] "TX3912",
- [CPU_TX3922] "TX3922",
- [CPU_TX3927] "TX3927",
- [CPU_AU1000] "Au1000",
- [CPU_AU1500] "Au1500",
- [CPU_AU1100] "Au1100",
- [CPU_AU1550] "Au1550",
- [CPU_AU1200] "Au1200",
- [CPU_4KEC] "MIPS 4KEc",
- [CPU_4KSC] "MIPS 4KSc",
- [CPU_VR41XX] "NEC Vr41xx",
- [CPU_R5500] "R5500",
- [CPU_TX49XX] "TX49xx",
- [CPU_20KC] "MIPS 20Kc",
- [CPU_24K] "MIPS 24K",
- [CPU_25KF] "MIPS 25Kf",
- [CPU_VR4111] "NEC VR4111",
- [CPU_VR4121] "NEC VR4121",
- [CPU_VR4122] "NEC VR4122",
- [CPU_VR4131] "NEC VR4131",
- [CPU_VR4133] "NEC VR4133",
- [CPU_VR4181] "NEC VR4181",
- [CPU_VR4181A] "NEC VR4181A",
- [CPU_SR71000] "Sandcraft SR71000"
+ [CPU_UNKNOWN] = "unknown",
+ [CPU_R2000] = "R2000",
+ [CPU_R3000] = "R3000",
+ [CPU_R3000A] = "R3000A",
+ [CPU_R3041] = "R3041",
+ [CPU_R3051] = "R3051",
+ [CPU_R3052] = "R3052",
+ [CPU_R3081] = "R3081",
+ [CPU_R3081E] = "R3081E",
+ [CPU_R4000PC] = "R4000PC",
+ [CPU_R4000SC] = "R4000SC",
+ [CPU_R4000MC] = "R4000MC",
+ [CPU_R4200] = "R4200",
+ [CPU_R4400PC] = "R4400PC",
+ [CPU_R4400SC] = "R4400SC",
+ [CPU_R4400MC] = "R4400MC",
+ [CPU_R4600] = "R4600",
+ [CPU_R6000] = "R6000",
+ [CPU_R6000A] = "R6000A",
+ [CPU_R8000] = "R8000",
+ [CPU_R10000] = "R10000",
+ [CPU_R12000] = "R12000",
+ [CPU_R4300] = "R4300",
+ [CPU_R4650] = "R4650",
+ [CPU_R4700] = "R4700",
+ [CPU_R5000] = "R5000",
+ [CPU_R5000A] = "R5000A",
+ [CPU_R4640] = "R4640",
+ [CPU_NEVADA] = "Nevada",
+ [CPU_RM7000] = "RM7000",
+ [CPU_RM9000] = "RM9000",
+ [CPU_R5432] = "R5432",
+ [CPU_4KC] = "MIPS 4Kc",
+ [CPU_5KC] = "MIPS 5Kc",
+ [CPU_R4310] = "R4310",
+ [CPU_SB1] = "SiByte SB1",
+ [CPU_TX3912] = "TX3912",
+ [CPU_TX3922] = "TX3922",
+ [CPU_TX3927] = "TX3927",
+ [CPU_AU1000] = "Au1000",
+ [CPU_AU1500] = "Au1500",
+ [CPU_AU1100] = "Au1100",
+ [CPU_AU1550] = "Au1550",
+ [CPU_AU1200] = "Au1200",
+ [CPU_4KEC] = "MIPS 4KEc",
+ [CPU_4KSC] = "MIPS 4KSc",
+ [CPU_VR41XX] = "NEC Vr41xx",
+ [CPU_R5500] = "R5500",
+ [CPU_TX49XX] = "TX49xx",
+ [CPU_20KC] = "MIPS 20Kc",
+ [CPU_24K] = "MIPS 24K",
+ [CPU_25KF] = "MIPS 25Kf",
+ [CPU_VR4111] = "NEC VR4111",
+ [CPU_VR4121] = "NEC VR4121",
+ [CPU_VR4122] = "NEC VR4122",
+ [CPU_VR4131] = "NEC VR4131",
+ [CPU_VR4133] = "NEC VR4133",
+ [CPU_VR4181] = "NEC VR4181",
+ [CPU_VR4181A] = "NEC VR4181A",
+ [CPU_SR71000] = "Sandcraft SR71000"
};
#define JAGUAR_ATX_SERIAL1_BASE 0xfd000023L
#define _JAGUAR_ATX_SERIAL_INIT(int, base) \
- { baud_base: JAGUAR_ATX_BASE_BAUD, irq: int, \
- flags: (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \
- iomem_base: (u8 *) base, iomem_reg_shift: 2, \
+ { .baud_base = JAGUAR_ATX_BASE_BAUD, irq: int, \
+ .flags = (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \
+ .iomem_base = (u8 *) base, iomem_reg_shift: 2, \
io_type: SERIAL_IO_MEM }
#define MOMENCO_JAGUAR_ATX_SERIAL_PORT_DEFNS \
_JAGUAR_ATX_SERIAL_INIT(JAGUAR_ATX_SERIAL1_IRQ, JAGUAR_ATX_SERIAL1_BASE)
#define OCELOT_3_SERIAL_BASE (signed)0xfd000020
#define _OCELOT_3_SERIAL_INIT(int, base) \
- { baud_base: OCELOT_3_BASE_BAUD, irq: int, \
- flags: STD_COM_FLAGS, \
- iomem_base: (u8 *) base, iomem_reg_shift: 2, \
+ { .baud_base = OCELOT_3_BASE_BAUD, irq: int, \
+ .flags = STD_COM_FLAGS, \
+ .iomem_base = (u8 *) base, iomem_reg_shift: 2, \
io_type: SERIAL_IO_MEM }
#define MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS \