net: hns3: add some DFX info for reset issue
authorHuazhong Tan <tanhuazhong@huawei.com>
Wed, 11 Sep 2019 02:40:39 +0000 (10:40 +0800)
committerDavid S. Miller <davem@davemloft.net>
Wed, 11 Sep 2019 08:08:46 +0000 (09:08 +0100)
This patch adds more information for reset DFX. Also, adds some
cleanups to reset info, move reset_fail_cnt into struct
hclge_rst_stats, and modifies some print formats.

Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h

index 6dcce489fdc578659c5680367f176015638ff447..d0128d792717b07baacfddae32e81f3e81ff31f3 100644 (file)
@@ -931,22 +931,36 @@ static void hclge_dbg_fd_tcam(struct hclge_dev *hdev)
 
 static void hclge_dbg_dump_rst_info(struct hclge_dev *hdev)
 {
-       dev_info(&hdev->pdev->dev, "PF reset count: %d\n",
+       dev_info(&hdev->pdev->dev, "PF reset count: %u\n",
                 hdev->rst_stats.pf_rst_cnt);
-       dev_info(&hdev->pdev->dev, "FLR reset count: %d\n",
+       dev_info(&hdev->pdev->dev, "FLR reset count: %u\n",
                 hdev->rst_stats.flr_rst_cnt);
-       dev_info(&hdev->pdev->dev, "CORE reset count: %d\n",
-                hdev->rst_stats.core_rst_cnt);
-       dev_info(&hdev->pdev->dev, "GLOBAL reset count: %d\n",
+       dev_info(&hdev->pdev->dev, "GLOBAL reset count: %u\n",
                 hdev->rst_stats.global_rst_cnt);
-       dev_info(&hdev->pdev->dev, "IMP reset count: %d\n",
+       dev_info(&hdev->pdev->dev, "IMP reset count: %u\n",
                 hdev->rst_stats.imp_rst_cnt);
-       dev_info(&hdev->pdev->dev, "reset done count: %d\n",
+       dev_info(&hdev->pdev->dev, "reset done count: %u\n",
                 hdev->rst_stats.reset_done_cnt);
-       dev_info(&hdev->pdev->dev, "HW reset done count: %d\n",
+       dev_info(&hdev->pdev->dev, "HW reset done count: %u\n",
                 hdev->rst_stats.hw_reset_done_cnt);
-       dev_info(&hdev->pdev->dev, "reset count: %d\n",
+       dev_info(&hdev->pdev->dev, "reset count: %u\n",
                 hdev->rst_stats.reset_cnt);
+       dev_info(&hdev->pdev->dev, "reset count: %u\n",
+                hdev->rst_stats.reset_cnt);
+       dev_info(&hdev->pdev->dev, "reset fail count: %u\n",
+                hdev->rst_stats.reset_fail_cnt);
+       dev_info(&hdev->pdev->dev, "vector0 interrupt enable status: 0x%x\n",
+                hclge_read_dev(&hdev->hw, HCLGE_MISC_VECTOR_REG_BASE));
+       dev_info(&hdev->pdev->dev, "reset interrupt source: 0x%x\n",
+                hclge_read_dev(&hdev->hw, HCLGE_MISC_RESET_STS_REG));
+       dev_info(&hdev->pdev->dev, "reset interrupt status: 0x%x\n",
+                hclge_read_dev(&hdev->hw, HCLGE_MISC_VECTOR_INT_STS));
+       dev_info(&hdev->pdev->dev, "hardware reset status: 0x%x\n",
+                hclge_read_dev(&hdev->hw, HCLGE_GLOBAL_RESET_REG));
+       dev_info(&hdev->pdev->dev, "handshake status: 0x%x\n",
+                hclge_read_dev(&hdev->hw, HCLGE_NIC_CSQ_DEPTH_REG));
+       dev_info(&hdev->pdev->dev, "function reset status: 0x%x\n",
+                hclge_read_dev(&hdev->hw, HCLGE_FUN_RST_ING));
 }
 
 static void hclge_dbg_get_m7_stats_info(struct hclge_dev *hdev)
index bc5bad3e845905a846b31a90edcf63d371df8b11..fd7f94372ff0dfae9d37103a8b4b8d93f7bed7aa 100644 (file)
@@ -3547,12 +3547,12 @@ static bool hclge_reset_err_handle(struct hclge_dev *hdev)
                         "reset failed because new reset interrupt\n");
                hclge_clear_reset_cause(hdev);
                return false;
-       } else if (hdev->reset_fail_cnt < MAX_RESET_FAIL_CNT) {
-               hdev->reset_fail_cnt++;
+       } else if (hdev->rst_stats.reset_fail_cnt < MAX_RESET_FAIL_CNT) {
+               hdev->rst_stats.reset_fail_cnt++;
                set_bit(hdev->reset_type, &hdev->reset_pending);
                dev_info(&hdev->pdev->dev,
                         "re-schedule reset task(%d)\n",
-                        hdev->reset_fail_cnt);
+                        hdev->rst_stats.reset_fail_cnt);
                return true;
        }
 
@@ -3679,7 +3679,8 @@ static void hclge_reset(struct hclge_dev *hdev)
        /* ignore RoCE notify error if it fails HCLGE_RESET_MAX_FAIL_CNT - 1
         * times
         */
-       if (ret && hdev->reset_fail_cnt < HCLGE_RESET_MAX_FAIL_CNT - 1)
+       if (ret &&
+           hdev->rst_stats.reset_fail_cnt < HCLGE_RESET_MAX_FAIL_CNT - 1)
                goto err_reset;
 
        rtnl_lock();
@@ -3695,7 +3696,7 @@ static void hclge_reset(struct hclge_dev *hdev)
                goto err_reset;
 
        hdev->last_reset_time = jiffies;
-       hdev->reset_fail_cnt = 0;
+       hdev->rst_stats.reset_fail_cnt = 0;
        hdev->rst_stats.reset_done_cnt++;
        ae_dev->reset_type = HNAE3_NONE_RESET;
 
index 870550fa9ff1ea4d9633fffb11f1cf5a7dd7addd..3e9574a9e22dcbac92ef06832ef266d3687a42f0 100644 (file)
@@ -659,6 +659,7 @@ struct hclge_rst_stats {
        u32 global_rst_cnt;     /* the number of GLOBAL */
        u32 imp_rst_cnt;        /* the number of IMP reset */
        u32 reset_cnt;          /* the number of reset */
+       u32 reset_fail_cnt;     /* the number of reset fail */
 };
 
 /* time and register status when mac tunnel interruption occur */
@@ -725,7 +726,6 @@ struct hclge_dev {
        unsigned long reset_request;    /* reset has been requested */
        unsigned long reset_pending;    /* client rst is pending to be served */
        struct hclge_rst_stats rst_stats;
-       u32 reset_fail_cnt;
        u32 fw_version;
        u16 num_vmdq_vport;             /* Num vmdq vport this PF has set up */
        u16 num_tqps;                   /* Num task queue pairs of this PF */