mpc8313erdb: Enable GPIO support on the MPC8313E RDB
authorJoe Hershberger <joe.hershberger@ni.com>
Fri, 11 Nov 2011 21:55:38 +0000 (15:55 -0600)
committerKim Phillips <kim.phillips@freescale.com>
Tue, 10 Jan 2012 02:10:33 +0000 (20:10 -0600)
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
board/freescale/mpc8313erdb/mpc8313erdb.c
include/configs/MPC8313ERDB.h

index 08f873d7e453d058b689d2ede93271130cc228f0..730ec4e734808948c7b3331d8b1bed7723969a24 100644 (file)
@@ -31,6 +31,9 @@
 #include <vsc7385.h>
 #include <ns16550.h>
 #include <nand.h>
+#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_NAND_SPL)
+#include <asm/gpio.h>
+#endif
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -42,6 +45,18 @@ int board_early_init_f(void)
        if (im->pmc.pmccr1 & PMCCR1_POWER_OFF)
                gd->flags |= GD_FLG_SILENT;
 #endif
+#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_NAND_SPL)
+       mpc83xx_gpio_init_f();
+#endif
+
+       return 0;
+}
+
+int board_early_init_r(void)
+{
+#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_NAND_SPL)
+       mpc83xx_gpio_init_r();
+#endif
 
        return 0;
 }
index 31503af5d239eb9d37142e6f1e868d69f3ba9fe6..39bdcf85c54b9ba6d029f6b24fc58355558a1ffd 100644 (file)
@@ -82,7 +82,8 @@
 
 #define CONFIG_SYS_CLK_FREQ    CONFIG_83XX_CLKIN
 
-#define CONFIG_BOARD_EARLY_INIT_F              /* call board_pre_init */
+#define CONFIG_BOARD_EARLY_INIT_F              /* call board_early_init_f */
+#define CONFIG_BOARD_EARLY_INIT_R              /* call board_early_init_r */
 
 #define CONFIG_SYS_IMMR                0xE0000000
 
 #define CONFIG_OF_BOARD_SETUP  1
 #define CONFIG_OF_STDOUT_VIA_ALIAS     1
 
+#define CONFIG_MPC83XX_GPIO 1
+#define CONFIG_CMD_GPIO 1
+
 /*
  * Serial Port
  */
 
 /* System IO Config */
 #define CONFIG_SYS_SICRH       (SICRH_TSOBI1 | SICRH_TSOBI2)   /* RGMII */
-#define CONFIG_SYS_SICRL       SICRL_USBDR_10  /* Enable Internal USB Phy  */
+                       /* Enable Internal USB Phy and GPIO on LCD Connector */
+#define CONFIG_SYS_SICRL       (SICRL_USBDR_10 | SICRL_LBC)
 
 #define CONFIG_SYS_HID0_INIT   0x000000000
 #define CONFIG_SYS_HID0_FINAL  (HID0_ENABLE_MACHINE_CHECK | \