powerpc/8xx: Remove cpu dependent macro instructions from head_8xx

head_8xx is dedicated to 8xx so no need to use macros that
depends on the CPU

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index a1c2a2cfec7efbbb4144383d59b3edd956e4d881..471936704261cd784236c960c3757b66ccf462f8 100644 (file)
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -123,7 +123,6 @@ turn_on_mmu:
        lis     r0,start_here@h
        ori     r0,r0,start_here@l
        mtspr   SPRN_SRR0,r0
-       SYNC
        rfi                             /* enables MMU */
 
 /*
@@ -170,7 +169,7 @@ turn_on_mmu:
        stw     r1,0(r11);      \
        tovirt(r1,r11);                 /* set new kernel sp */ \
        li      r10,MSR_KERNEL & ~(MSR_IR|MSR_DR); /* can take exceptions */ \
-       MTMSRD(r10);                    /* (except for mach check in rtas) */ \
+       mtmsr   r10;            \
        stw     r0,GPR0(r11);   \
        SAVE_4GPRS(3, r11);     \
        SAVE_2GPRS(7, r11)
@@ -915,10 +914,8 @@ start_here:
        rfi
 /* Load up the kernel context */
 2:
-       SYNC                    /* Force all PTE updates to finish */
        tlbia                   /* Clear all TLB entries */
        sync                    /* wait for tlbia/tlbie to finish */
-       TLBSYNC                 /* ... on all CPUs */
 
        /* set up the PTE pointers for the Abatron bdiGDB.
        */