irqchip/stm32: Don't clear rising/falling config registers at init
authorFabien Dessenne <fabien.dessenne@st.com>
Thu, 7 Mar 2019 18:40:35 +0000 (19:40 +0100)
committerMarc Zyngier <marc.zyngier@arm.com>
Thu, 21 Mar 2019 11:08:25 +0000 (11:08 +0000)
Falling and rising configuration and status registers are not banked.
As they are shared with M4 co-processor, they should not be cleared
at probe time, else M4 co-processor configuration will be lost.

Fixes: f9fc1745501e ("irqchip/stm32: Add host and driver data structures")
Signed-off-by: Loic Pallardy <loic.pallardy@st.com>
Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
drivers/irqchip/irq-stm32-exti.c

index 6edfd4bfa169ecbf488c897154d5e7000a9c5581..dab37fbfab825b3cf5a1e061d7d2f9ce057c8595 100644 (file)
@@ -735,11 +735,6 @@ stm32_exti_chip_data *stm32_exti_chip_init(struct stm32_exti_host_data *h_data,
         */
        writel_relaxed(0, base + stm32_bank->imr_ofst);
        writel_relaxed(0, base + stm32_bank->emr_ofst);
-       writel_relaxed(0, base + stm32_bank->rtsr_ofst);
-       writel_relaxed(0, base + stm32_bank->ftsr_ofst);
-       writel_relaxed(~0UL, base + stm32_bank->rpr_ofst);
-       if (stm32_bank->fpr_ofst != UNDEF_REG)
-               writel_relaxed(~0UL, base + stm32_bank->fpr_ofst);
 
        pr_info("%pOF: bank%d\n", h_data->node, bank_idx);