arm64: dts: renesas: r8a77980: add Cortex-A53 PMU support
authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Wed, 25 Jul 2018 16:43:41 +0000 (19:43 +0300)
committerSimon Horman <horms+renesas@verge.net.au>
Tue, 11 Sep 2018 13:49:45 +0000 (15:49 +0200)
Describe the performance monitor unit (PMU) for the Cortex-A53 cores in
the R8A77980 SoC's device tree.

Based on the original (and large) patch by Vladimir Barinov.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm64/boot/dts/renesas/r8a77980.dtsi

index d3532fd4c94a0d657255552aa77dfe97e2b02856..1013da3e2ec4ee335d64a3b00469f79c38c7c3ab 100644 (file)
                clock-frequency = <0>;
        };
 
+       pmu_a53 {
+               compatible = "arm,cortex-a53-pmu";
+               interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
+                                     <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
+                                     <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
+                                     <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
+       };
+
        psci {
                compatible = "arm,psci-1.0", "arm,psci-0.2";
                method = "smc";