/* Save in extraction pattern for later deposit. */
R3.H = R4.L << 0;
-
+
/* So:
* R0 = Page start
* R1 = Page length (actually, offset into size/prefix tables)
* (b) on whether address bit A[x] is set. x is determined
* by DCBS in DMEM_CONTROL
*/
-
+
R2 = 0; /* Default to Bank A (Bank B would be 1)*/
P0.L = (DMEM_CONTROL & 0xFFFF);
SSYNC;
/* As per HW reference manual DAG registers,
- * DATA and Address resgister shall be zero'd
+ * DATA and Address resgister shall be zero'd
* in initialization, after a reset state
*/
r1 = 0; /* Data registers zero'd */
p3 = 0;
p4 = 0;
p5 = 0;
-
+
i0 = 0; /* DAG Registers zero'd */
i1 = 0;
i2 = 0;
r1 = 0;
LSETUP(4,4) lc0 = p1;
[ p0 ++ ] = r1;
-
+
p0.h = hi(SIC_IWR);
p0.l = lo(SIC_IWR);
r0.l = 0x1;
/* Set Destination DMAConfig = DMA Enable,
Memory Write, 8-Bit Transfers, 1-D DMA, Flow - Stop, IOC */
W[P1+OFFSET_(MDMA_D0_CONFIG)] = R4;
-
-WAIT_DMA_DONE:
+
+WAIT_DMA_DONE:
p0.h = hi(MDMA_D0_IRQ_STATUS);
p0.l = lo(MDMA_D0_IRQ_STATUS);
R0 = W[P0](Z);
*/
#define CFG_FLASH_CFI /* The flash is CFI compatible */
-#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */
+#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */
#define CFG_FLASH_CFI_AMD_RESET
#define CFG_FLASH_BASE 0x20000000
#endif
/* configuration lookup from the BOOTP/DHCP server, */
-/* but not try to load any image using TFTP */
+/* but not try to load any image using TFTP */
#define CONFIG_BOOTDELAY 5
#define CONFIG_BOOT_RETRY_TIME -1 /* Enable this if bootretry required, currently its disabled */
"$(rootpath) console=ttyBF0,57600\0" \
"addip=setenv bootargs $(bootargs) ip=$(ipaddr):$(serverip):" \
"$(gatewayip):$(netmask):$(hostname):eth0:off\0" \
- "ramboot=tftpboot $(loadaddr) linux; " \
+ "ramboot=tftpboot $(loadaddr) linux; " \
"run ramargs;run addip;bootelf\0" \
"nfsboot=tftpboot $(loadaddr) linux; " \
"run nfsargs;run addip;bootelf\0" \