};
soc {
- mdio0: mdio {
- compatible = "virtual,mdio-gpio";
+ mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
- gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
- <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
+
+ compatible = "qcom,ipq8064-mdio", "syscon";
+ reg = <0x37000000 0x200000>;
+ resets = <&gcc GMAC_CORE1_RESET>;
+ reset-names = "stmmaceth";
+ clocks = <&gcc GMAC_CORE1_CLK>;
+ clock-names = "stmmaceth";
+
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
mdio0_pins: mdio0_pins {
mux {
pins = "gpio0", "gpio1";
- function = "gpio";
+ function = "mdio";
drive-strength = <8>;
bias-disable;
};
mdio0_pins: mdio0_pins {
mux {
pins = "gpio0", "gpio1";
- function = "gpio";
+ function = "mdio";
drive-strength = <8>;
bias-disable;
};
};
};
- mdio0: mdio {
- compatible = "virtual,mdio-gpio";
+ mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
- gpios = <&qcom_pinmux 1 0 &qcom_pinmux 0 0>;
+
+ compatible = "qcom,ipq8064-mdio", "syscon";
+ reg = <0x37000000 0x200000>;
+ resets = <&gcc GMAC_CORE1_RESET>;
+ reset-names = "stmmaceth";
+ clocks = <&gcc GMAC_CORE1_CLK>;
+ clock-names = "stmmaceth";
+
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
mdio0_pins: mdio0_pins {
mux {
pins = "gpio0", "gpio1";
- function = "gpio";
+ function = "mdio";
drive-strength = <8>;
bias-disable;
};
force_gen1 = <1>;
};
- mdio0: mdio {
- compatible = "virtual,mdio-gpio";
+ mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
- gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
- <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
+
+ compatible = "qcom,ipq8064-mdio", "syscon";
+ reg = <0x37000000 0x200000>;
+ resets = <&gcc GMAC_CORE1_RESET>;
+ reset-names = "stmmaceth";
+ clocks = <&gcc GMAC_CORE1_CLK>;
+ clock-names = "stmmaceth";
+
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
mdio0_pins: mdio0_pins {
mux {
pins = "gpio0", "gpio1";
- function = "gpio";
+ function = "mdio";
drive-strength = <8>;
bias-disable;
};
};
};
- mdio0: mdio {
- compatible = "virtual,mdio-gpio";
+ mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
- gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
- <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
+
+ compatible = "qcom,ipq8064-mdio", "syscon";
+ reg = <0x37000000 0x200000>;
+ resets = <&gcc GMAC_CORE1_RESET>;
+ reset-names = "stmmaceth";
+ clocks = <&gcc GMAC_CORE1_CLK>;
+ clock-names = "stmmaceth";
+
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
mdio0_pins: mdio0_pins {
mux {
pins = "gpio0", "gpio1";
- function = "gpio";
+ function = "mdio";
drive-strength = <8>;
bias-disable;
};
status = "okay";
};
- mdio0: mdio {
- compatible = "virtual,mdio-gpio";
+ mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
- gpios = <&qcom_pinmux 1 0 &qcom_pinmux 0 0>;
+
+ compatible = "qcom,ipq8064-mdio", "syscon";
+ reg = <0x37000000 0x200000>;
+ resets = <&gcc GMAC_CORE1_RESET>;
+ reset-names = "stmmaceth";
+ clocks = <&gcc GMAC_CORE1_CLK>;
+ clock-names = "stmmaceth";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
mdio0_pins: mdio0_pins {
mux {
pins = "gpio0", "gpio1";
- function = "gpio";
+ function = "mdio";
drive-strength = <8>;
bias-disable;
};
};
};
- mdio0: mdio {
- compatible = "virtual,mdio-gpio";
+ mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
- gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
- <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
+
+ compatible = "qcom,ipq8064-mdio", "syscon";
+ reg = <0x37000000 0x200000>;
+ resets = <&gcc GMAC_CORE1_RESET>;
+ reset-names = "stmmaceth";
+ clocks = <&gcc GMAC_CORE1_CLK>;
+ clock-names = "stmmaceth";
+
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
mdio0_pins: mdio0_pins {
mux {
pins = "gpio0", "gpio1";
- function = "gpio";
+ function = "mdio";
drive-strength = <8>;
bias-disable;
};
};
};
- mdio0: mdio {
- compatible = "virtual,mdio-gpio";
+ mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
- gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
- <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
+
+ compatible = "qcom,ipq8064-mdio", "syscon";
+ reg = <0x37000000 0x200000>;
+ resets = <&gcc GMAC_CORE1_RESET>;
+ reset-names = "stmmaceth";
+ clocks = <&gcc GMAC_CORE1_CLK>;
+ clock-names = "stmmaceth";
+
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
mdio0_pins: mdio0_pins {
mux {
pins = "gpio0", "gpio1";
- function = "gpio";
+ function = "mdio";
drive-strength = <8>;
bias-disable;
};
};
};
- mdio0: mdio {
- compatible = "virtual,mdio-gpio";
+ mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
- gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
- <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
+
+ compatible = "qcom,ipq8064-mdio", "syscon";
+ reg = <0x37000000 0x200000>;
+ resets = <&gcc GMAC_CORE1_RESET>;
+ reset-names = "stmmaceth";
+ clocks = <&gcc GMAC_CORE1_CLK>;
+ clock-names = "stmmaceth";
+
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
mdio0_pins: mdio0_pins {
mux {
pins = "gpio0", "gpio1";
- function = "gpio";
+ function = "mdio";
drive-strength = <8>;
bias-disable;
};
force_gen1 = <1>;
};
- mdio0: mdio {
- compatible = "virtual,mdio-gpio";
+ mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
- gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
- <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
+
+ compatible = "qcom,ipq8064-mdio", "syscon";
+ reg = <0x37000000 0x200000>;
+ resets = <&gcc GMAC_CORE1_RESET>;
+ reset-names = "stmmaceth";
+ clocks = <&gcc GMAC_CORE1_CLK>;
+ clock-names = "stmmaceth";
+
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
};
soc {
- mdio0: mdio {
- compatible = "virtual,mdio-gpio";
+ mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
- gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
- <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
+
+ compatible = "qcom,ipq8064-mdio", "syscon";
+ reg = <0x37000000 0x200000>;
+ resets = <&gcc GMAC_CORE1_RESET>;
+ reset-names = "stmmaceth";
+ clocks = <&gcc GMAC_CORE1_CLK>;
+ clock-names = "stmmaceth";
+
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
mdio0_pins: mdio0_pins {
mux {
pins = "gpio0", "gpio1";
- function = "gpio";
+ function = "mdio";
drive-strength = <8>;
bias-disable;
};
};
};
- mdio0: mdio {
+ mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "virtual,mdio-gpio";
+ compatible = "qcom,ipq8064-mdio", "syscon";
+ reg = <0x37000000 0x200000>;
+ resets = <&gcc GMAC_CORE1_RESET>;
+ reset-names = "stmmaceth";
+ clocks = <&gcc GMAC_CORE1_CLK>;
+ clock-names = "stmmaceth";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
- gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
- <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
-
ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
mdio0_pins: mdio0_pins {
mux {
pins = "gpio0", "gpio1";
- function = "gpio";
+ function = "mdio";
drive-strength = <8>;
bias-disable;
};
};
};
- mdio {
- compatible = "virtual,mdio-gpio";
+ mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
- gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
- <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
+
+ compatible = "qcom,ipq8064-mdio", "syscon";
+ reg = <0x37000000 0x200000>;
+ resets = <&gcc GMAC_CORE1_RESET>;
+ reset-names = "stmmaceth";
+ clocks = <&gcc GMAC_CORE1_CLK>;
+ clock-names = "stmmaceth";
+
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
mdio0_pins: mdio0_pins {
mux {
pins = "gpio0", "gpio1";
- function = "gpio";
+ function = "mdio";
drive-strength = <8>;
bias-disable;
};
mdio0_pins: mdio0_pins {
mux {
pins = "gpio0", "gpio1";
- function = "gpio";
+ function = "mdio";
drive-strength = <8>;
bias-disable;
};
force_gen1 = <1>;
};
- mdio0: mdio {
- compatible = "virtual,mdio-gpio";
+ mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
- gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
- <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
+
+ compatible = "qcom,ipq8064-mdio", "syscon";
+ reg = <0x37000000 0x200000>;
+ resets = <&gcc GMAC_CORE1_RESET>;
+ reset-names = "stmmaceth";
+ clocks = <&gcc GMAC_CORE1_CLK>;
+ clock-names = "stmmaceth";
+
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
mdio0_pins: mdio0_pins {
mux {
pins = "gpio0", "gpio1";
- function = "gpio";
+ function = "mdio";
drive-strength = <8>;
bias-disable;
};
};
};
- mdio0: mdio {
- compatible = "virtual,mdio-gpio";
+ mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
- gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
- <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
+
+ compatible = "qcom,ipq8064-mdio", "syscon";
+ reg = <0x37000000 0x200000>;
+ resets = <&gcc GMAC_CORE1_RESET>;
+ reset-names = "stmmaceth";
+ clocks = <&gcc GMAC_CORE1_CLK>;
+ clock-names = "stmmaceth";
+
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
-
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <