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crypto: arm64/aes-cts-cbc-ce - performance tweak
author
Ard Biesheuvel
<ard.biesheuvel@linaro.org>
Tue, 3 Sep 2019 16:43:31 +0000
(09:43 -0700)
committer
Herbert Xu
<herbert@gondor.apana.org.au>
Mon, 9 Sep 2019 07:35:38 +0000
(17:35 +1000)
Optimize away one of the tbl instructions in the decryption path,
which turns out to be unnecessary.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
arch/arm64/crypto/aes-modes.S
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diff --git
a/arch/arm64/crypto/aes-modes.S
b/arch/arm64/crypto/aes-modes.S
index 2879f030a749efdb7baf2b87db6be147afced4c4..38cd5a2091a8c276e186481e5a6335175d09171d 100644
(file)
--- a/
arch/arm64/crypto/aes-modes.S
+++ b/
arch/arm64/crypto/aes-modes.S
@@
-293,12
+293,11
@@
AES_ENTRY(aes_cbc_cts_decrypt)
ld1 {v5.16b}, [x5] /* get iv */
dec_prepare w3, x2, x6
- tbl v2.16b, {v1.16b}, v4.16b
decrypt_block v0, w3, x2, x6, w7
- eor v2.16b, v2.16b, v0.16b
+ tbl v2.16b, {v0.16b}, v3.16b
+ eor v2.16b, v2.16b, v1.16b
tbx v0.16b, {v1.16b}, v4.16b
- tbl v2.16b, {v2.16b}, v3.16b
decrypt_block v0, w3, x2, x6, w7
eor v0.16b, v0.16b, v5.16b /* xor with iv */