endef
TARGET_DEVICES += radxa_rock-3a
+define Device/radxa_rock-5a
+ DEVICE_VENDOR := Radxa
+ DEVICE_MODEL := ROCK 5A
+ SOC := rk3588s
+ UBOOT_DEVICE_NAME := rock5a-rk3588s
+ DEVICE_PACKAGES := kmod-hwmon-pwmfan
+endef
+TARGET_DEVICES += radxa_rock-5a
+
define Device/radxa_rock-pi-4a
DEVICE_VENDOR := Radxa
DEVICE_MODEL := ROCK Pi 4A
--- /dev/null
+From 0773a4a199aabb60afe50f5a19a6772abf4ad0bf Mon Sep 17 00:00:00 2001
+From: Sebastian Reichel <sebastian.reichel@collabora.com>
+Date: Mon, 6 Nov 2023 16:54:32 +0100
+Subject: [PATCH] arm64: dts: rockchip: add USB3 host to rock-5a
+
+Enable USB3 host controller for the Radxa ROCK 5 Model A. This adds
+USB3 for the lower USB3 port (the one closer to the PCB).
+
+The upper USB3 port uses the RK3588 USB TypeC host controller, which
+use a different PHY without upstream support.
+
+Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
+Link: https://lore.kernel.org/r/20231106155934.80838-2-sebastian.reichel@collabora.com
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+---
+ arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
+@@ -113,6 +113,10 @@
+ };
+ };
+
++&combphy2_psu {
++ status = "okay";
++};
++
+ &cpu_b0 {
+ cpu-supply = <&vdd_cpu_big0_s0>;
+ };
+@@ -734,3 +738,7 @@
+ &usb_host1_ohci {
+ status = "okay";
+ };
++
++&usb_host2_xhci {
++ status = "okay";
++};
--- /dev/null
+From af7ec140ddc1815bc462109792d95bcad05cfbc4 Mon Sep 17 00:00:00 2001
+From: Sebastian Reichel <sebastian.reichel@collabora.com>
+Date: Tue, 9 Apr 2024 00:50:36 +0200
+Subject: [PATCH] arm64: dts: rockchip: add upper USB3 port to rock-5a
+
+Enable full support (XHCI, EHCI, OHCI) for the upper USB3 port from
+Radxa Rock 5 Model A. The lower one is already supported.
+
+Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
+Link: https://lore.kernel.org/r/20240408225109.128953-10-sebastian.reichel@collabora.com
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+---
+ .../boot/dts/rockchip/rk3588s-rock-5a.dts | 18 ++++++++++++++++++
+ 1 file changed, 18 insertions(+)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
+@@ -698,6 +698,14 @@
+ };
+ };
+
++&u2phy0 {
++ status = "okay";
++};
++
++&u2phy0_otg {
++ status = "okay";
++};
++
+ &u2phy2 {
+ status = "okay";
+ };
+@@ -721,6 +729,11 @@
+ status = "okay";
+ };
+
++&usbdp_phy0 {
++ status = "okay";
++ rockchip,dp-lane-mux = <2 3>;
++};
++
+ &usb_host0_ehci {
+ status = "okay";
+ pinctrl-names = "default";
+@@ -731,6 +744,11 @@
+ status = "okay";
+ };
+
++&usb_host0_xhci {
++ dr_mode = "host";
++ status = "okay";
++};
++
+ &usb_host1_ehci {
+ status = "okay";
+ };
--- /dev/null
+From 00224650dd45e166ea6eb1593f5f064583963ccf Mon Sep 17 00:00:00 2001
+From: FUKAUMI Naoki <naoki@radxa.com>
+Date: Sun, 23 Jun 2024 11:33:28 +0900
+Subject: [PATCH] arm64: dts: rockchip: add (but disabled) SFC node for Radxa
+ ROCK 5A
+
+This commit adds SFC node for Radxa ROCK 5A.
+
+since sdhci and sfc on RK3588s share pins(i.e. exclusive), it cannot
+be enabled both nodes at the same time. so status = "okay" is omitted
+here.
+
+you may be able to enable sfc (and disable sdhci) by fdt overlay.
+
+SPI NOR flash chip may vary, so use safe(lowest) spi-max-frequency.
+
+Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
+Link: https://lore.kernel.org/r/20240623023329.1044-2-naoki@radxa.com
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+---
+ arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts | 13 +++++++++++++
+ 1 file changed, 13 insertions(+)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
+@@ -376,6 +376,19 @@
+ status = "okay";
+ };
+
++&sfc {
++ pinctrl-names = "default";
++ pinctrl-0 = <&fspim0_pins>;
++
++ flash@0 {
++ compatible = "jedec,spi-nor";
++ reg = <0>;
++ spi-max-frequency = <104000000>;
++ spi-rx-bus-width = <4>;
++ spi-tx-bus-width = <1>;
++ };
++};
++
+ &spi2 {
+ status = "okay";
+ assigned-clocks = <&cru CLK_SPI2>;
--- /dev/null
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Tianling Shen <cnsztl@gmail.com>
+Date: Mon Aug 05 16:14:33 2024 +0800
+Subject: [PATCH] arm64: dts: rockchip: Update LED properties for Radxa
+ Rock 5A
+
+Add OpenWrt's LED aliases for showing system status.
+
+Signed-off-by: Tianling Shen <cnsztl@gmail.com>
+---
+
+--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
+@@ -9,11 +9,16 @@
+
+ / {
+ model = "Radxa ROCK 5A";
+- compatible = "radxa,rock-5a", "rockchip,rk3588s";
++ compatible = "radxa,rock-5a", "rockchip,rk3588";
+
+ aliases {
+ mmc0 = &sdhci;
+ mmc1 = &sdmmc;
++
++ led-boot = &status_led;
++ led-failsafe = &status_led;
++ led-running = &status_led;
++ led-upgrade = &status_led;
+ };
+
+ analog-sound {
+@@ -39,11 +44,10 @@
+ pinctrl-names = "default";
+ pinctrl-0 = <&io_led>;
+
+- io-led {
++ status_led: io-led {
+ color = <LED_COLOR_ID_BLUE>;
+ function = LED_FUNCTION_STATUS;
+ gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
+- linux,default-trigger = "heartbeat";
+ };
+ };
+
--- /dev/null
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Tianling Shen <cnsztl@gmail.com>
+Date: Mon Aug 05 16:14:33 2024 +0800
+Subject: [PATCH] arm64: dts: rockchip: lower mmc speed for Radxa Rock 5A
+
+The previously stated speed of sdr-104 in is too high for the hardware
+to reliably communicate with some fast SD cards.
+Rockchip boards have a common bug when operating uhs speed, which will
+hang the system during a soft reboot.
+
+To be on the safe side, lower the speed to workaround.
+
+Signed-off-by: Tianling Shen <cnsztl@gmail.com>
+---
+
+--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
+@@ -374,7 +374,7 @@
+ max-frequency = <150000000>;
+ no-sdio;
+ no-mmc;
+- sd-uhs-sdr104;
++ sd-uhs-sdr50;
+ vmmc-supply = <&vcc_3v3_s0>;
+ vqmmc-supply = <&vccio_sd_s0>;
+ status = "okay";