bcm53xx: add DT patch describing pins mux controller
authorRafał Miłecki <rafal@milecki.pl>
Fri, 9 Nov 2018 21:28:31 +0000 (22:28 +0100)
committerRafał Miłecki <rafal@milecki.pl>
Fri, 9 Nov 2018 21:29:16 +0000 (22:29 +0100)
It's needed to support new devices that use specific pin functions.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
target/linux/bcm53xx/patches-4.14/131-ARM-dts-BCM5301X-Describe-Northstar-pins-mux-control.patch [new file with mode: 0644]

diff --git a/target/linux/bcm53xx/patches-4.14/131-ARM-dts-BCM5301X-Describe-Northstar-pins-mux-control.patch b/target/linux/bcm53xx/patches-4.14/131-ARM-dts-BCM5301X-Describe-Northstar-pins-mux-control.patch
new file mode 100644 (file)
index 0000000..7b2904a
--- /dev/null
@@ -0,0 +1,73 @@
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Fri, 9 Nov 2018 09:53:56 +0100
+Subject: [PATCH] ARM: dts: BCM5301X: Describe Northstar pins mux controller
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+This describes hardware & will allow referencing pin functions. The
+first usage is UART1 which allows supporting devices using it.
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+---
+
+--- a/arch/arm/boot/dts/bcm5301x.dtsi
++++ b/arch/arm/boot/dts/bcm5301x.dtsi
+@@ -37,6 +37,8 @@
+                       reg = <0x0400 0x100>;
+                       interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&iprocslow>;
++                      pinctrl-names = "default";
++                      pinctrl-0 = <&pinmux_uart1>;
+                       status = "disabled";
+               };
+       };
+@@ -391,6 +393,48 @@
+               status = "disabled";
+       };
++      dmu@1800c000 {
++              compatible = "simple-bus";
++              ranges = <0 0x1800c000 0x1000>;
++              #address-cells = <1>;
++              #size-cells = <1>;
++
++              cru@100 {
++                      compatible = "simple-bus";
++                      reg = <0x100 0x1a4>;
++                      ranges;
++                      #address-cells = <1>;
++                      #size-cells = <1>;
++
++                      pin-controller@1c0 {
++                              compatible = "brcm,bcm4708-pinmux";
++                              reg = <0x1c0 0x24>;
++                              reg-names = "cru_gpio_control";
++
++                              spi-pins {
++                                      groups = "spi_grp";
++                                      function = "spi";
++                              };
++
++                              i2c {
++                                      groups = "i2c_grp";
++                                      function = "i2c";
++                              };
++
++                              pwm {
++                                      groups = "pwm0_grp", "pwm1_grp",
++                                               "pwm2_grp", "pwm3_grp";
++                                      function = "pwm";
++                              };
++
++                              pinmux_uart1: uart1 {
++                                      groups = "uart1_grp";
++                                      function = "uart1";
++                              };
++                      };
++              };
++      };
++
+       lcpll0: lcpll0@1800c100 {
+               #clock-cells = <1>;
+               compatible = "brcm,nsp-lcpll0";