ARM: at91: pm: add pmc_version member to at91_pm_data
authorClaudiu Beznea <claudiu.beznea@microchip.com>
Mon, 20 Jan 2020 12:10:04 +0000 (14:10 +0200)
committerAlexandre Belloni <alexandre.belloni@bootlin.com>
Tue, 18 Feb 2020 20:47:54 +0000 (21:47 +0100)
This will be used to differentiate b/w different PLLs settings to be
applied in the final/first steps of the suspend/resume process by doing
PLL specific configurations.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/1579522208-19523-5-git-send-email-claudiu.beznea@microchip.com
arch/arm/mach-at91/pm.c
arch/arm/mach-at91/pm.h
arch/arm/mach-at91/pm_data-offsets.c
arch/arm/mach-at91/pm_suspend.S
include/linux/clk/at91_pmc.h

index ae7b148febd9037d90aec97529280607c4f698a7..074bde64064e424c1ed2806656feeb2cd67555ec 100644 (file)
@@ -737,28 +737,34 @@ backup_default:
 struct pmc_info {
        unsigned long uhp_udp_mask;
        unsigned long mckr;
+       unsigned long version;
 };
 
 static const struct pmc_info pmc_infos[] __initconst = {
        {
                .uhp_udp_mask = AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP,
                .mckr = 0x30,
+               .version = AT91_PMC_V1,
        },
 
        {
                .uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP,
                .mckr = 0x30,
+               .version = AT91_PMC_V1,
        },
        {
                .uhp_udp_mask = AT91SAM926x_PMC_UHP,
                .mckr = 0x30,
+               .version = AT91_PMC_V1,
        },
        {       .uhp_udp_mask = 0,
                .mckr = 0x30,
+               .version = AT91_PMC_V1,
        },
        {
                .uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP,
                .mckr = 0x28,
+               .version = AT91_PMC_V2,
        },
 };
 
@@ -797,6 +803,7 @@ static void __init at91_pm_init(void (*pm_idle)(void))
        pmc = of_id->data;
        soc_pm.data.uhp_udp_mask = pmc->uhp_udp_mask;
        soc_pm.data.pmc_mckr_offset = pmc->mckr;
+       soc_pm.data.pmc_version = pmc->version;
 
        if (pm_idle)
                arm_pm_idle = pm_idle;
index 6f7f4236865a4acd6af685f62d84e7e80512e22a..218e8d1a30fb5d4b768b7f7d019f98126d5cdc3d 100644 (file)
@@ -34,6 +34,7 @@ struct at91_pm_data {
        unsigned int standby_mode;
        unsigned int suspend_mode;
        unsigned int pmc_mckr_offset;
+       unsigned int pmc_version;
 };
 #endif
 
index dfcbe626865cc651b65a1af8f18a538a5695cb2f..82089ff258c040c8c88b15e131dc08635dc3d3da 100644 (file)
@@ -14,6 +14,8 @@ int main(void)
        DEFINE(PM_DATA_SFRBU,           offsetof(struct at91_pm_data, sfrbu));
        DEFINE(PM_DATA_PMC_MCKR_OFFSET, offsetof(struct at91_pm_data,
                                                 pmc_mckr_offset));
+       DEFINE(PM_DATA_PMC_VERSION,     offsetof(struct at91_pm_data,
+                                                pmc_version));
 
        return 0;
 }
index 64460b4e0fc1bbfd6d6a2b63cca085bbf7470a20..5fa0c2aa10f7ef12289bdefb55bcd825323d1e5f 100644 (file)
@@ -95,6 +95,8 @@ ENTRY(at91_pm_suspend_in_sram)
        str     tmp1, .pm_mode
        ldr     tmp1, [r0, #PM_DATA_PMC_MCKR_OFFSET]
        str     tmp1, .mckr_offset
+       ldr     tmp1, [r0, #PM_DATA_PMC_VERSION]
+       str     tmp1, .pmc_version
        /* Both ldrne below are here to preload their address in the TLB */
        ldr     tmp1, [r0, #PM_DATA_SHDWC]
        str     tmp1, .shdwc
@@ -542,6 +544,8 @@ ENDPROC(at91_sramc_self_refresh)
        .word 0
 .mckr_offset:
        .word 0
+.pmc_version:
+       .word 0
 .saved_mckr:
        .word 0
 .saved_pllar:
index 390437887b46778d56fa3a792504b6ef9efce79e..f3d691fc5f299a00e9620c6a0a257317af66a49f 100644 (file)
@@ -12,6 +12,9 @@
 #ifndef AT91_PMC_H
 #define AT91_PMC_H
 
+#define AT91_PMC_V1            (1)                     /* PMC version 1 */
+#define AT91_PMC_V2            (2)                     /* PMC version 2 [SAM9X60] */
+
 #define        AT91_PMC_SCER           0x00                    /* System Clock Enable Register */
 #define        AT91_PMC_SCDR           0x04                    /* System Clock Disable Register */