drm/amd/powerplay: initialzie the dpm intial enabled state
authorKenneth Feng <kenneth.feng@amd.com>
Tue, 10 Apr 2018 09:05:36 +0000 (17:05 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 15 May 2018 18:43:09 +0000 (13:43 -0500)
To expose the right dpm levels to the sysfs

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

index df234db6485eb3d144d971207681de9f467f3ec5..3e1ed0aca29ce6dc2bd4bf6f895ae6a4b36b780c 100644 (file)
@@ -545,6 +545,7 @@ static int vega12_setup_default_dpm_tables(struct pp_hwmgr *hwmgr)
                        return -EINVAL);
 
                dpm_table->dpm_levels[i].value = clock;
+               dpm_table->dpm_levels[i].enabled = true;
        }
 
        vega12_init_dpm_state(&(dpm_table->dpm_state));
@@ -564,6 +565,7 @@ static int vega12_setup_default_dpm_tables(struct pp_hwmgr *hwmgr)
                        return -EINVAL);
 
                dpm_table->dpm_levels[i].value = clock;
+               dpm_table->dpm_levels[i].enabled = true;
        }
 
        vega12_init_dpm_state(&(dpm_table->dpm_state));
@@ -584,6 +586,7 @@ static int vega12_setup_default_dpm_tables(struct pp_hwmgr *hwmgr)
                        return -EINVAL);
 
                dpm_table->dpm_levels[i].value = clock;
+               dpm_table->dpm_levels[i].enabled = true;
        }
 
        vega12_init_dpm_state(&(dpm_table->dpm_state));
@@ -604,6 +607,7 @@ static int vega12_setup_default_dpm_tables(struct pp_hwmgr *hwmgr)
                return -EINVAL);
 
                dpm_table->dpm_levels[i].value = clock;
+               dpm_table->dpm_levels[i].enabled = true;
        }
 
        vega12_init_dpm_state(&(dpm_table->dpm_state));
@@ -624,6 +628,7 @@ static int vega12_setup_default_dpm_tables(struct pp_hwmgr *hwmgr)
                        return -EINVAL);
 
                dpm_table->dpm_levels[i].value = clock;
+               dpm_table->dpm_levels[i].enabled = true;
        }
 
        vega12_init_dpm_state(&(dpm_table->dpm_state));
@@ -644,6 +649,7 @@ static int vega12_setup_default_dpm_tables(struct pp_hwmgr *hwmgr)
                return -EINVAL);
 
                dpm_table->dpm_levels[i].value = clock;
+               dpm_table->dpm_levels[i].enabled = true;
        }
 
        vega12_init_dpm_state(&(dpm_table->dpm_state));
@@ -665,6 +671,7 @@ static int vega12_setup_default_dpm_tables(struct pp_hwmgr *hwmgr)
                        return -EINVAL);
 
                dpm_table->dpm_levels[i].value = clock;
+               dpm_table->dpm_levels[i].enabled = true;
        }
 
        vega12_init_dpm_state(&(dpm_table->dpm_state));
@@ -685,6 +692,7 @@ static int vega12_setup_default_dpm_tables(struct pp_hwmgr *hwmgr)
                        return -EINVAL);
 
                dpm_table->dpm_levels[i].value = clock;
+               dpm_table->dpm_levels[i].enabled = true;
        }
 
        vega12_init_dpm_state(&(dpm_table->dpm_state));
@@ -705,6 +713,7 @@ static int vega12_setup_default_dpm_tables(struct pp_hwmgr *hwmgr)
                        return -EINVAL);
 
                dpm_table->dpm_levels[i].value = clock;
+               dpm_table->dpm_levels[i].enabled = true;
        }
 
        vega12_init_dpm_state(&(dpm_table->dpm_state));
@@ -725,6 +734,7 @@ static int vega12_setup_default_dpm_tables(struct pp_hwmgr *hwmgr)
                        return -EINVAL);
 
                dpm_table->dpm_levels[i].value = clock;
+               dpm_table->dpm_levels[i].enabled = true;
        }
 
        vega12_init_dpm_state(&(dpm_table->dpm_state));