CONFIG_AR71XX_DEV_LEDS_GPIO=y
CONFIG_AR71XX_DEV_M25P80=y
CONFIG_AR71XX_DEV_PB42_PCI=y
+CONFIG_AR71XX_DEV_PB9X_PCI=y
CONFIG_AR71XX_DEV_USB=y
CONFIG_AR71XX_MACH_AP81=y
CONFIG_AR71XX_MACH_AP83=y
CONFIG_AR71XX_MACH_MZK_W300NH=y
CONFIG_AR71XX_MACH_PB42=y
CONFIG_AR71XX_MACH_PB44=y
+CONFIG_AR71XX_MACH_PB92=y
CONFIG_AR71XX_MACH_RB4XX=y
CONFIG_AR71XX_MACH_RB750=y
CONFIG_AR71XX_MACH_TEW_632BRP=y
CONFIG_AR71XX_DEV_LEDS_GPIO=y
CONFIG_AR71XX_DEV_M25P80=y
CONFIG_AR71XX_DEV_PB42_PCI=y
+CONFIG_AR71XX_DEV_PB9X_PCI=y
CONFIG_AR71XX_DEV_USB=y
CONFIG_AR71XX_MACH_AP81=y
CONFIG_AR71XX_MACH_AP83=y
CONFIG_AR71XX_MACH_MZK_W300NH=y
CONFIG_AR71XX_MACH_PB42=y
CONFIG_AR71XX_MACH_PB44=y
+CONFIG_AR71XX_MACH_PB92=y
CONFIG_AR71XX_MACH_RB4XX=y
CONFIG_AR71XX_MACH_RB750=y
CONFIG_AR71XX_MACH_TEW_632BRP=y
CONFIG_AR71XX_DEV_LEDS_GPIO=y
CONFIG_AR71XX_DEV_M25P80=y
CONFIG_AR71XX_DEV_PB42_PCI=y
+CONFIG_AR71XX_DEV_PB9X_PCI=y
CONFIG_AR71XX_DEV_USB=y
CONFIG_AR71XX_MACH_AP81=y
CONFIG_AR71XX_MACH_AP83=y
CONFIG_AR71XX_MACH_MZK_W300NH=y
CONFIG_AR71XX_MACH_PB42=y
CONFIG_AR71XX_MACH_PB44=y
+CONFIG_AR71XX_MACH_PB92=y
CONFIG_AR71XX_MACH_RB4XX=y
CONFIG_AR71XX_MACH_RB750=y
CONFIG_AR71XX_MACH_TEW_632BRP=y
select AR71XX_DEV_USB
default n
+config AR71XX_MACH_PB92
+ bool "Atheros PB92 board support"
+ select AR71XX_DEV_GPIO_BUTTONS
+ select AR71XX_DEV_PB9X_PCI if PCI
+ select AR71XX_DEV_LEDS_GPIO
+ select AR71XX_DEV_USB
+ default n
+
config AR71XX_MACH_AW_NR580
bool "AzureWave AW-NR580 board support"
select AR71XX_DEV_M25P80
config AR71XX_DEV_PB42_PCI
def_bool n
+config AR71XX_DEV_PB9X_PCI
+ def_bool n
+
config AR71XX_DEV_USB
def_bool n
obj-$(CONFIG_AR71XX_DEV_LEDS_GPIO) += dev-leds-gpio.o
obj-$(CONFIG_AR71XX_DEV_M25P80) += dev-m25p80.o
obj-$(CONFIG_AR71XX_DEV_PB42_PCI) += dev-pb42-pci.o
+obj-$(CONFIG_AR71XX_DEV_PB9X_PCI) += dev-pb9x-pci.o
obj-$(CONFIG_AR71XX_DEV_USB) += dev-usb.o
obj-$(CONFIG_AR71XX_NVRAM) += nvram.o
obj-$(CONFIG_AR71XX_MACH_MZK_W300NH) += mach-mzk-w300nh.o
obj-$(CONFIG_AR71XX_MACH_PB42) += mach-pb42.o
obj-$(CONFIG_AR71XX_MACH_PB44) += mach-pb44.o
+obj-$(CONFIG_AR71XX_MACH_PB92) += mach-pb92.o
obj-$(CONFIG_AR71XX_MACH_RB4XX) += mach-rb4xx.o
obj-$(CONFIG_AR71XX_MACH_RB750) += mach-rb750.o
obj-$(CONFIG_AR71XX_MACH_TEW_632BRP) += mach-tew-632brp.o
--- /dev/null
+/*
+ * Atheros PB9x reference board PCI initialization
+ *
+ * Copyright (C) 2010 Felix Fietkau <nbd@openwrt.org>
+ * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
+ * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ * Parts of this file are based on Atheros' 2.6.15 BSP
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <linux/pci.h>
+
+#include <asm/mach-ar71xx/ar71xx.h>
+#include <asm/mach-ar71xx/pci.h>
+
+#include "dev-pb9x-pci.h"
+
+static struct ar71xx_pci_irq pb9x_pci_irqs[] __initdata = {
+ {
+ .slot = 0,
+ .pin = 1,
+ .irq = AR71XX_PCI_IRQ_DEV0,
+ }
+};
+
+void __init pb9x_pci_init(void)
+{
+ ar71xx_pci_init(ARRAY_SIZE(pb9x_pci_irqs), pb9x_pci_irqs);
+}
--- /dev/null
+/*
+ * Atheros PB9x reference board PCI initialization
+ *
+ * Copyright (C) 2010 Felix Fietkau <nbd@openwrt.org>
+ * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
+ * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#ifndef _AR71XX_DEV_PB9X_PCI_H
+#define _AR71XX_DEV_PB9X_PCI_H
+
+#if defined(CONFIG_AR71XX_DEV_PB9X_PCI)
+void pb9x_pci_init(void) __init;
+#else
+static inline void pb9x_pci_init(void) { }
+#endif
+
+#endif /* _AR71XX_DEV_PB9X_PCI_H */
--- /dev/null
+/*
+ * Atheros PB92 board support
+ *
+ * Copyright (C) 2010 Felix Fietkau <nbd@openwrt.org>
+ * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
+ * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <asm/mach-ar71xx/ar71xx.h>
+
+#include "machtype.h"
+#include "devices.h"
+#include "dev-m25p80.h"
+#include "dev-gpio-buttons.h"
+#include "dev-pb9x-pci.h"
+#include "dev-usb.h"
+
+#ifdef CONFIG_MTD_PARTITIONS
+static struct mtd_partition pb92_partitions[] = {
+ {
+ .name = "u-boot",
+ .offset = 0,
+ .size = 0x040000,
+ .mask_flags = MTD_WRITEABLE,
+ } , {
+ .name = "u-boot-env",
+ .offset = 0x040000,
+ .size = 0x010000,
+ } , {
+ .name = "rootfs",
+ .offset = 0x050000,
+ .size = 0x2b0000,
+ } , {
+ .name = "uImage",
+ .offset = 0x300000,
+ .size = 0x0e0000,
+ } , {
+ .name = "ART",
+ .offset = 0x3e0000,
+ .size = 0x020000,
+ .mask_flags = MTD_WRITEABLE,
+ }
+};
+#endif /* CONFIG_MTD_PARTITIONS */
+
+static struct flash_platform_data pb92_flash_data = {
+#ifdef CONFIG_MTD_PARTITIONS
+ .parts = pb92_partitions,
+ .nr_parts = ARRAY_SIZE(pb92_partitions),
+#endif
+};
+
+
+#define PB92_BUTTONS_POLL_INTERVAL 20
+
+#define PB92_GPIO_BTN_SW4 8
+#define PB92_GPIO_BTN_SW5 3
+
+static struct gpio_button pb92_gpio_buttons[] __initdata = {
+ {
+ .desc = "sw4",
+ .type = EV_KEY,
+ .code = BTN_0,
+ .threshold = 3,
+ .gpio = PB92_GPIO_BTN_SW4,
+ .active_low = 1,
+ } , {
+ .desc = "sw5",
+ .type = EV_KEY,
+ .code = BTN_1,
+ .threshold = 3,
+ .gpio = PB92_GPIO_BTN_SW5,
+ .active_low = 1,
+ }
+};
+
+#define PB92_WAN_PHYMASK BIT(20)
+#define PB92_LAN_PHYMASK (BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4))
+#define PB92_MDIO_PHYMASK (PB92_LAN_PHYMASK | PB92_WAN_PHYMASK)
+
+static void __init pb92_init(void)
+{
+ ar71xx_add_device_m25p80(&pb92_flash_data);
+
+ ar71xx_add_device_mdio(~PB92_MDIO_PHYMASK);
+
+ ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
+ ar71xx_eth0_data.phy_mask = PB92_WAN_PHYMASK;
+
+ ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
+ ar71xx_eth1_data.phy_mask = PB92_LAN_PHYMASK;
+ ar71xx_eth1_data.speed = SPEED_1000;
+ ar71xx_eth1_data.duplex = DUPLEX_FULL;
+
+ ar71xx_add_device_eth(0);
+ ar71xx_add_device_eth(1);
+
+ ar71xx_add_device_gpio_buttons(-1, PB92_BUTTONS_POLL_INTERVAL,
+ ARRAY_SIZE(pb92_gpio_buttons),
+ pb92_gpio_buttons);
+
+ pb9x_pci_init();
+}
+
+MIPS_MACHINE(AR71XX_MACH_PB92, "PB92", "Atheros PB92", pb92_init);
AR71XX_MACH_RB_750, /* MikroTik RouterBOARD 750 */
AR71XX_MACH_PB42, /* Atheros PB42 */
AR71XX_MACH_PB44, /* Atheros PB44 */
+ AR71XX_MACH_PB92, /* Atheros PB92 */
AR71XX_MACH_MZK_W04NU, /* Planex MZK-W04NU */
AR71XX_MACH_MZK_W300NH, /* Planex MZK-W300NH */
AR71XX_MACH_TEW_632BRP, /* TRENDnet TEW-632BRP */
projects / openwrt / staging / lynxis.git / commitdiff