Commit
7849398fa28c21dad24292b838b059a862f99f16 introduced a bug,
causing the following error to be reported:
[ 370.827819] cannot lock PLL
[ 370.830749] CFG1 0x1e
[ 370.833160] CFG2 0x602004
[ 370.835876] CFG4 0x40000
[ 370.838562] omapdss HDMI: Failed to lock PLL
However, HDMI output is still enabled.
The problem is that we enable the HDMI video output temporarily when
reading EDID or detecting if a HDMI cable is connected (ugh), and the
commit above changes the behavior of the driver so that the video
timings are not yet configured at the point when EDID is read.
This patch fixes the problem by configuring the initial VGA timings at
HDMI probe.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
dssdev->panel.timings.x_res,
dssdev->panel.timings.y_res);
+ omapdss_hdmi_display_set_timing(dssdev, &dssdev->panel.timings);
+
return 0;
}