fsl_ddr: Adds 16 bit DDR Data width option
authorPoonam Aggrwal <poonam.aggrwal@freescale.com>
Mon, 7 Feb 2011 09:39:51 +0000 (15:09 +0530)
committerKumar Gala <galak@kernel.crashing.org>
Mon, 4 Apr 2011 14:24:41 +0000 (09:24 -0500)
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Cc: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
arch/powerpc/cpu/mpc8xxx/ddr/util.c
arch/powerpc/include/asm/fsl_ddr_sdram.h

index 815c5e3a9ef8bbb613c7fdcd2ff16363bfbf0731..b9a5a690cb0534636c33c5f743628905831a6923 100644 (file)
@@ -1,5 +1,5 @@
 /*
- * Copyright 2008 Freescale Semiconductor, Inc.
+ * Copyright 2008-2011 Freescale Semiconductor, Inc.
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License
@@ -139,6 +139,8 @@ void board_add_ram_info(int use_default)
 
        if (sdram_cfg & SDRAM_CFG_32_BE)
                puts(", 32-bit");
+       else if (sdram_cfg & SDRAM_CFG_16_BE)
+               puts(", 16-bit");
        else
                puts(", 64-bit");
 
index b5b1efe66925cbfd249aad32689d6c22091b84a2..99dddb4f00404a71ca4605c20b6f253724bfbde7 100644 (file)
@@ -84,6 +84,7 @@ typedef ddr3_spd_eeprom_t generic_spd_eeprom_t;
 #define SDRAM_CFG_SDRAM_TYPE_SHIFT     24
 #define SDRAM_CFG_DYN_PWR              0x00200000
 #define SDRAM_CFG_32_BE                        0x00080000
+#define SDRAM_CFG_16_BE                        0x00100000
 #define SDRAM_CFG_8_BE                 0x00040000
 #define SDRAM_CFG_NCAP                 0x00020000
 #define SDRAM_CFG_2T_EN                        0x00008000