return 0;
}
+void
+gf100_gr_init_419eb4(struct gf100_gr *gr)
+{
+ struct nvkm_device *device = gr->base.engine.subdev.device;
+ nvkm_mask(device, 0x419eb4, 0x00001000, 0x00001000);
+}
+
void
gf100_gr_init_419cc0(struct gf100_gr *gr)
{
if (gr->func->init_419cc0)
gr->func->init_419cc0(gr);
-
- nvkm_mask(device, 0x419eb4, 0x00001000, 0x00001000);
+ if (gr->func->init_419eb4)
+ gr->func->init_419eb4(gr);
for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
nvkm_wr32(device, GPC_UNIT(gpc, 0x0420), 0xc0000000);
.init_fecs_exceptions = gf100_gr_init_fecs_exceptions,
.init_40601c = gf100_gr_init_40601c,
.init_419cc0 = gf100_gr_init_419cc0,
+ .init_419eb4 = gf100_gr_init_419eb4,
.mmio = gf100_gr_pack_mmio,
.fecs.ucode = &gf100_gr_fecs_ucode,
.gpccs.ucode = &gf100_gr_gpccs_ucode,
void (*init_40601c)(struct gf100_gr *);
void (*init_sked_hww_esr)(struct gf100_gr *);
void (*init_419cc0)(struct gf100_gr *);
+ void (*init_419eb4)(struct gf100_gr *);
void (*init_ppc_exceptions)(struct gf100_gr *);
void (*set_hww_esr_report_mask)(struct gf100_gr *);
const struct gf100_gr_pack *mmio;
void gf100_gr_init_fecs_exceptions(struct gf100_gr *);
void gf100_gr_init_40601c(struct gf100_gr *);
void gf100_gr_init_419cc0(struct gf100_gr *);
+void gf100_gr_init_419eb4(struct gf100_gr *);
void gf117_gr_init_zcull(struct gf100_gr *);
void gk104_gr_init_ppc_exceptions(struct gf100_gr *);
void gk104_gr_init_sked_hww_esr(struct gf100_gr *);
+void gk110_gr_init_419eb4(struct gf100_gr *);
+
int gk20a_gr_init(struct gf100_gr *);
int gm200_gr_rops(struct gf100_gr *);
.init_fecs_exceptions = gf100_gr_init_fecs_exceptions,
.init_40601c = gf100_gr_init_40601c,
.init_419cc0 = gf100_gr_init_419cc0,
+ .init_419eb4 = gf100_gr_init_419eb4,
.mmio = gf104_gr_pack_mmio,
.fecs.ucode = &gf100_gr_fecs_ucode,
.gpccs.ucode = &gf100_gr_gpccs_ucode,
.init_fecs_exceptions = gf100_gr_init_fecs_exceptions,
.init_40601c = gf100_gr_init_40601c,
.init_419cc0 = gf100_gr_init_419cc0,
+ .init_419eb4 = gf100_gr_init_419eb4,
.mmio = gf108_gr_pack_mmio,
.fecs.ucode = &gf100_gr_fecs_ucode,
.gpccs.ucode = &gf100_gr_gpccs_ucode,
.init_fecs_exceptions = gf100_gr_init_fecs_exceptions,
.init_40601c = gf100_gr_init_40601c,
.init_419cc0 = gf100_gr_init_419cc0,
+ .init_419eb4 = gf100_gr_init_419eb4,
.mmio = gf110_gr_pack_mmio,
.fecs.ucode = &gf100_gr_fecs_ucode,
.gpccs.ucode = &gf100_gr_gpccs_ucode,
.init_fecs_exceptions = gf100_gr_init_fecs_exceptions,
.init_40601c = gf100_gr_init_40601c,
.init_419cc0 = gf100_gr_init_419cc0,
+ .init_419eb4 = gf100_gr_init_419eb4,
.mmio = gf117_gr_pack_mmio,
.fecs.ucode = &gf117_gr_fecs_ucode,
.gpccs.ucode = &gf117_gr_gpccs_ucode,
.init_fecs_exceptions = gf100_gr_init_fecs_exceptions,
.init_40601c = gf100_gr_init_40601c,
.init_419cc0 = gf100_gr_init_419cc0,
+ .init_419eb4 = gf100_gr_init_419eb4,
.mmio = gf119_gr_pack_mmio,
.fecs.ucode = &gf100_gr_fecs_ucode,
.gpccs.ucode = &gf100_gr_gpccs_ucode,
nvkm_wr32(device, 0x405840, 0xc0000000);
nvkm_wr32(device, 0x405844, 0x00ffffff);
gr->func->init_419cc0(gr);
- nvkm_mask(device, 0x419eb4, 0x00001000, 0x00001000);
+ gr->func->init_419eb4(gr);
gr->func->init_ppc_exceptions(gr);
.init_fecs_exceptions = gk104_gr_init_fecs_exceptions,
.init_sked_hww_esr = gk104_gr_init_sked_hww_esr,
.init_419cc0 = gf100_gr_init_419cc0,
+ .init_419eb4 = gf100_gr_init_419eb4,
.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
.mmio = gk104_gr_pack_mmio,
.fecs.ucode = &gk104_gr_fecs_ucode,
.data.size = sizeof(gk110_grgpc_data),
};
+void
+gk110_gr_init_419eb4(struct gf100_gr *gr)
+{
+ struct nvkm_device *device = gr->base.engine.subdev.device;
+ nvkm_mask(device, 0x419eb4, 0x00001000, 0x00001000);
+ nvkm_mask(device, 0x419eb4, 0x00002000, 0x00002000);
+ nvkm_mask(device, 0x419eb4, 0x00004000, 0x00004000);
+ nvkm_mask(device, 0x419eb4, 0x00008000, 0x00008000);
+ nvkm_mask(device, 0x419eb4, 0x00001000, 0x00000000);
+ nvkm_mask(device, 0x419eb4, 0x00002000, 0x00000000);
+ nvkm_mask(device, 0x419eb4, 0x00004000, 0x00000000);
+ nvkm_mask(device, 0x419eb4, 0x00008000, 0x00000000);
+}
+
static const struct gf100_gr_func
gk110_gr = {
.init = gk104_gr_init,
.init_fecs_exceptions = gf100_gr_init_fecs_exceptions,
.init_sked_hww_esr = gk104_gr_init_sked_hww_esr,
.init_419cc0 = gf100_gr_init_419cc0,
+ .init_419eb4 = gk110_gr_init_419eb4,
.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
.mmio = gk110_gr_pack_mmio,
.fecs.ucode = &gk110_gr_fecs_ucode,
.init_fecs_exceptions = gf100_gr_init_fecs_exceptions,
.init_sked_hww_esr = gk104_gr_init_sked_hww_esr,
.init_419cc0 = gf100_gr_init_419cc0,
+ .init_419eb4 = gk110_gr_init_419eb4,
.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
.mmio = gk110b_gr_pack_mmio,
.fecs.ucode = &gk110_gr_fecs_ucode,