configs: move CONFIG_MXC_OCOTP to Kconfig
authorMarcel Ziswiler <marcel.ziswiler@toradex.com>
Mon, 25 Mar 2019 16:24:57 +0000 (17:24 +0100)
committerStefano Babic <sbabic@denx.de>
Sat, 13 Apr 2019 18:30:09 +0000 (20:30 +0200)
While commit 3e020f03e94f ("driver: misc: add MXC_OCOTP Kconfig entry")
introduced a Kconfig entry it did not actually migrate all
configurations to using it.

As CONFIG_MXC_OCOTP was in mx{6/7}_common.h enable it by default on
those architectures. Additionally, also enable it on ARCH_IMX8M and
ARCH_VF610 where all current members enabled it through their legacy
configuration header files.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
14 files changed:
configs/bk4r1_defconfig
configs/pcm052_defconfig
drivers/misc/Kconfig
include/configs/advantech_dms-ba16.h
include/configs/apalis_imx6.h
include/configs/colibri_imx6.h
include/configs/colibri_vf.h
include/configs/dh_imx6.h
include/configs/ge_bx50v3.h
include/configs/imx8mq_evk.h
include/configs/kp_imx6q_tpc.h
include/configs/mx6_common.h
include/configs/mx7_common.h
include/configs/vf610twr.h

index e3852f4856db063186f51f204894abf9ac108fc2..439207fd39a287d042fbcd6fe5ccf5627d853bb8 100644 (file)
@@ -49,7 +49,6 @@ CONFIG_SYS_I2C_MXC_I2C4=y
 CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_MISC=y
-CONFIG_MXC_OCOTP=y
 CONFIG_I2C_EEPROM=y
 CONFIG_SYS_I2C_EEPROM_ADDR=0x50
 CONFIG_SYS_I2C_EEPROM_BUS=2
index 906abbfd69c350b31fd2528758e598160ae8a891..fd093b35c23f74ac672f73a19566068e205bb189 100644 (file)
@@ -36,7 +36,6 @@ CONFIG_SYS_I2C_MXC_I2C2=y
 CONFIG_SYS_I2C_MXC_I2C3=y
 CONFIG_SYS_I2C_MXC_I2C4=y
 CONFIG_MISC=y
-CONFIG_MXC_OCOTP=y
 CONFIG_I2C_EEPROM=y
 CONFIG_SYS_I2C_EEPROM_ADDR=0x50
 CONFIG_SYS_I2C_EEPROM_BUS=2
index d6e677fba847b9985935d4c61748bf03e2709d77..0e645f58be0e8b7735057461e01f0c56a14c3601 100644 (file)
@@ -128,6 +128,8 @@ config JZ4780_EFUSE
 
 config MXC_OCOTP
        bool "Enable MXC OCOTP Driver"
+       depends on ARCH_IMX8M || ARCH_MX6 || ARCH_MX7 || ARCH_VF610
+       default y
        help
          If you say Y here, you will get support for the One Time
          Programmable memory pages that are stored on the some
index 034fd9c51bb730f29581c2c5f1475b0d2d42d693..57edeee941e7e15fe241fa5d6562d8662f5c6e14 100644 (file)
@@ -34,8 +34,6 @@
 
 #define CONFIG_MXC_UART
 
-#define CONFIG_MXC_OCOTP
-
 /* SATA Configs */
 #define CONFIG_SYS_SATA_MAX_DEVICE     1
 #define CONFIG_DWC_AHSATA_PORT_ID      0
index fc72a5525530cad394ba48fafe85a718cea02e22..96169f55f08c6f7d87f69a5c98a26fd5e8c4bc96 100644 (file)
 #define CONFIG_SYS_I2C_SPEED           100000
 #define CONFIG_SYS_MXC_I2C3_SPEED      400000
 
-/* OCOTP Configs */
-#ifdef CONFIG_CMD_FUSE
-#define CONFIG_MXC_OCOTP
-#endif
-
 /* MMC Configs */
 #define CONFIG_FSL_USDHC
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
index 802270e4013e1328d88568e46b02df72d9fa38e2..803c9be0646b5854c40cfd9e26e605982cb25efe 100644 (file)
 #define CONFIG_SYS_I2C_SPEED           100000
 #define CONFIG_SYS_MXC_I2C3_SPEED      400000
 
-/* OCOTP Configs */
-#ifdef CONFIG_CMD_FUSE
-#define CONFIG_MXC_OCOTP
-#endif
-
 /* MMC Configs */
 #define CONFIG_FSL_USDHC
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
index 7b974d9e97289f2c41d8a0d1579c61df4a5ea7e1..e7b786e48bb878834dd38b33ecfc4f1be6b5d7b1 100644 (file)
 
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
-#ifdef CONFIG_CMD_FUSE
-#define CONFIG_MXC_OCOTP
-#endif
-
 #ifdef CONFIG_VIDEO_FSL_DCU_FB
 #define CONFIG_SPLASH_SCREEN_ALIGN
 #define CONFIG_VIDEO_LOGO
index 48514ff076b37ce4d18946b206afbc170ff3802b..3eee382a6431cf8bab1df2aa2e99281a66def93a 100644 (file)
 #define CONFIG_FEC_MXC_PHYADDR         0
 #define CONFIG_ARP_TIMEOUT             200UL
 
-/* Fuses */
-#ifdef CONFIG_CMD_FUSE
-#define CONFIG_MXC_OCOTP
-#endif
-
 /* I2C Configs */
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
index 7c2d8918650633c5a1ed9d47b353e5827c01339e..196f114c60e874a6cdca93e5ec03e6f797ab4e0b 100644 (file)
@@ -35,8 +35,6 @@
 
 #define CONFIG_MXC_UART
 
-#define CONFIG_MXC_OCOTP
-
 /* SATA Configs */
 #ifdef CONFIG_CMD_SATA
 #define CONFIG_SYS_SATA_MAX_DEVICE     1
index a9e38a70e60fbbeb4ad7bce8d8df12c7d4724143..6094d1bf1800c7c78bd27285e1af416e8ca468db 100644 (file)
 
 #define CONFIG_MXC_GPIO
 
-#define CONFIG_MXC_OCOTP
 #define CONFIG_CMD_FUSE
 
 /* I2C Configs */
index b6b27ee1d5eba0da11703efd8f0d952da07827ff..d2ebf9295361bad5ccf3bf18e0e33b78550dc7dd 100644 (file)
 #define CONFIG_FEC_MXC_PHYADDR         0
 #define CONFIG_ARP_TIMEOUT             200UL
 
-/* Fuses */
-#ifdef CONFIG_CMD_FUSE
-#define CONFIG_MXC_OCOTP
-#endif
-
 /* I2C Configs */
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
index cdc88337780a6489f18939c9967e6980d005e41c..6b20c6db5803ab350dc3ee8b6b1281ba9aceb9ef 100644 (file)
@@ -57,9 +57,6 @@
 /* MMC */
 #define CONFIG_FSL_USDHC
 
-/* Fuses */
-#define CONFIG_MXC_OCOTP
-
 /* Secure boot (HAB) support */
 #ifdef CONFIG_SECURE_BOOT
 #define CONFIG_CSF_SIZE                        0x2000
index a895c936aa2c9aa5ba331b31a98afadbb3bcbf32..cc7e87269ee8d4bf5a90f5e3fef4907646505ebd 100644 (file)
@@ -42,9 +42,6 @@
 /* MMC */
 #define CONFIG_FSL_USDHC
 
-/* Fuses */
-#define CONFIG_MXC_OCOTP
-
 #define CONFIG_ARMV7_SECURE_BASE       0x00900000
 
 #define CONFIG_ARMV7_PSCI_1_0
index 686a3837393f773d754a7581bdf1fc86bb7e0ad9..ba85bc91e74df860dd1f3d97002cd57d41dca652 100644 (file)
 /* Enable passing of ATAGs */
 #define CONFIG_CMDLINE_TAG
 
-#ifdef CONFIG_CMD_FUSE
-#define CONFIG_MXC_OCOTP
-#endif
-
 /* Size of malloc() pool */
 #define CONFIG_SYS_MALLOC_LEN          (CONFIG_ENV_SIZE + 2 * 1024 * 1024)