struct pt_regs *regs)
{
long addr;
- long breakno;
char *ptr;
int newPC;
- int wp_status;
int i;
switch (remcom_in_buffer[0]) {
default:
err = EFAULT;
}
- } else if (cpu == 0 && (unsigned int)mem >= L1_CODE_START &&
- (unsigned int)(mem + count) <= L1_CODE_START + L1_CODE_LENGTH
+ } else if ((cpu == 0 && (unsigned int)mem >= L1_CODE_START &&
+ (unsigned int)(mem + count) <= L1_CODE_START + L1_CODE_LENGTH)
#ifdef CONFIG_SMP
- || cpu == 1 && (unsigned int)mem >= COREB_L1_CODE_START &&
+ || (cpu == 1 && (unsigned int)mem >= COREB_L1_CODE_START &&
(unsigned int)(mem + count) <=
- COREB_L1_CODE_START + L1_CODE_LENGTH
+ COREB_L1_CODE_START + L1_CODE_LENGTH)
#endif
) {
/* access L1 instruction SRAM*/
default:
return EFAULT;
}
- } else if (cpu == 0 && (unsigned int)mem >= L1_CODE_START &&
- (unsigned int)(mem + count) < L1_CODE_START + L1_CODE_LENGTH
+ } else if ((cpu == 0 && (unsigned int)mem >= L1_CODE_START &&
+ (unsigned int)(mem + count) < L1_CODE_START + L1_CODE_LENGTH)
#ifdef CONFIG_SMP
- || cpu == 1 && (unsigned int)mem >= COREB_L1_CODE_START &&
+ || (cpu == 1 && (unsigned int)mem >= COREB_L1_CODE_START &&
(unsigned int)(mem + count) <=
- COREB_L1_CODE_START + L1_CODE_LENGTH
+ COREB_L1_CODE_START + L1_CODE_LENGTH)
#endif
) {
/* access L1 instruction SRAM */
default:
return EFAULT;
}
- } else if (cpu == 0 && (unsigned int)mem >= L1_CODE_START &&
- (unsigned int)(mem + count) <= L1_CODE_START + L1_CODE_LENGTH
+ } else if ((cpu == 0 && (unsigned int)mem >= L1_CODE_START &&
+ (unsigned int)(mem + count) <= L1_CODE_START + L1_CODE_LENGTH)
#ifdef CONFIG_SMP
- || cpu == 1 && (unsigned int)mem >= COREB_L1_CODE_START &&
+ || (cpu == 1 && (unsigned int)mem >= COREB_L1_CODE_START &&
(unsigned int)(mem + count) <=
- COREB_L1_CODE_START + L1_CODE_LENGTH
+ COREB_L1_CODE_START + L1_CODE_LENGTH)
#endif
) {
/* access L1 instruction SRAM */