rockchip: Streamline and complete UARTn_BASE macros.
authorChristoph Müllner <christophm30@gmail.com>
Tue, 30 Apr 2019 23:37:58 +0000 (01:37 +0200)
committerChristoph Müllner <christophm30@gmail.com>
Wed, 1 May 2019 00:15:43 +0000 (02:15 +0200)
In order to set the UART base during bootup in common code of
plat/rockchip, we need to streamline the way the UART base addresses
are defined and add the missing definitions and mappings.

This patch does so by following the pattern UARTn_BASE, which is
already in use on RK3399 and RK3328. The numbering itself is derived
from the upstream Linux DTS files of the individual SoCs.

Signed-off-by: Christoph Müllner <christophm30@gmail.com>
Change-Id: I341a1996f4ceed5f82a2f6687d4dead9d7cc5c1f

plat/rockchip/rk3288/drivers/soc/soc.c
plat/rockchip/rk3288/include/platform_def.h
plat/rockchip/rk3288/rk3288_def.h
plat/rockchip/rk3328/drivers/soc/soc.c
plat/rockchip/rk3328/include/platform_def.h
plat/rockchip/rk3328/rk3328_def.h
plat/rockchip/rk3368/drivers/soc/soc.c
plat/rockchip/rk3368/include/platform_def.h
plat/rockchip/rk3368/rk3368_def.h

index db90ae41bf53a8640fd9e33fdf214fe7f68c6e8f..36f410b1a72f53c908b3bf6b22e42a8893c9e76b 100644 (file)
@@ -34,7 +34,15 @@ const mmap_region_t plat_rk_mmap[] = {
                        MT_DEVICE | MT_RW | MT_SECURE),
        MAP_REGION_FLAT(PMU_BASE, PMU_SIZE,
                        MT_DEVICE | MT_RW | MT_SECURE),
-       MAP_REGION_FLAT(UART_DBG_BASE, UART_DBG_SIZE,
+       MAP_REGION_FLAT(UART0_BASE, UART0_SIZE,
+                       MT_DEVICE | MT_RW | MT_SECURE),
+       MAP_REGION_FLAT(UART1_BASE, UART1_SIZE,
+                       MT_DEVICE | MT_RW | MT_SECURE),
+       MAP_REGION_FLAT(UART2_BASE, UART2_SIZE,
+                       MT_DEVICE | MT_RW | MT_SECURE),
+       MAP_REGION_FLAT(UART3_BASE, UART3_SIZE,
+                       MT_DEVICE | MT_RW | MT_SECURE),
+       MAP_REGION_FLAT(UART4_BASE, UART4_SIZE,
                        MT_DEVICE | MT_RW | MT_SECURE),
        MAP_REGION_FLAT(CRU_BASE, CRU_SIZE,
                        MT_DEVICE | MT_RW | MT_SECURE),
index d9e0bc64c92aaae26d6f42813a076e24e74a4bf1..e24aeffacaeb960e1222e9bba770a57414802844 100644 (file)
@@ -87,7 +87,7 @@
 #define PLAT_RK_GICD_BASE              RK3288_GICD_BASE
 #define PLAT_RK_GICC_BASE              RK3288_GICC_BASE
 
-#define PLAT_RK_UART_BASE              RK3288_UART2_BASE
+#define PLAT_RK_UART_BASE              UART2_BASE
 #define PLAT_RK_UART_CLOCK             RK3288_UART_CLOCK
 #define PLAT_RK_UART_BAUDRATE          RK3288_BAUDRATE
 
index 7b5018c7afd70fb5abfb4b1cafa6fef5536f3734..7bff8651d064ad43afb9efced3da7a80cada7bf0 100644 (file)
 #define DDR_PHY1_BASE          0xff640000
 #define DDR_PHY1_SIZE          SIZE_K(64)
 
-#define UART_DBG_BASE          0xff690000
-#define UART_DBG_SIZE          SIZE_K(64)
+#define UART0_BASE             0xff180000
+#define UART0_SIZE             SIZE_K(64)
+
+#define UART1_BASE             0xff190000
+#define UART1_SIZE             SIZE_K(64)
+
+#define UART2_BASE             0xff690000
+#define UART2_SIZE             SIZE_K(64)
+
+#define UART3_BASE             0xff1b0000
+#define UART3_SIZE             SIZE_K(64)
+
+#define UART4_BASE             0xff1c0000
+#define UART4_SIZE             SIZE_K(64)
 
 /* 96k instead of 64k? */
 #define SRAM_BASE              0xff700000
@@ -71,7 +83,6 @@
 /**************************************************************************
  * UART related constants
  **************************************************************************/
-#define RK3288_UART2_BASE      UART_DBG_BASE
 #define RK3288_BAUDRATE                115200
 #define RK3288_UART_CLOCK      24000000
 
index d216020c58085bab9ead385cc9f88e77c10ea5c0..59d857244af1f8e00805a444cd2392bd2ea1af2a 100644 (file)
 
 /* Table of regions to map using the MMU. */
 const mmap_region_t plat_rk_mmap[] = {
+       MAP_REGION_FLAT(UART0_BASE, UART0_SIZE,
+                       MT_DEVICE | MT_RW | MT_SECURE),
+       MAP_REGION_FLAT(UART1_BASE, UART1_SIZE,
+                       MT_DEVICE | MT_RW | MT_SECURE),
        MAP_REGION_FLAT(UART2_BASE, UART2_SIZE,
                        MT_DEVICE | MT_RW | MT_SECURE),
        MAP_REGION_FLAT(PMU_BASE, PMU_SIZE,
index b62c8686935ce9a4d5741117131b82c509aed373..3104d9fcbfae18bcf6bd8135ab7d33ca924eb7fa 100644 (file)
 #define PLAT_RK_GICD_BASE      RK3328_GICD_BASE
 #define PLAT_RK_GICC_BASE      RK3328_GICC_BASE
 
-#define PLAT_RK_UART_BASE      RK3328_UART2_BASE
+#define PLAT_RK_UART_BASE      UART2_BASE
 #define PLAT_RK_UART_CLOCK     RK3328_UART_CLOCK
 #define PLAT_RK_UART_BAUDRATE  RK3328_BAUDRATE
 
index 0ce13ad129d615f8223de8b71db124505d287441..60055e8468ccbacc6b0c50d954d80da5f0a63d6b 100644 (file)
 /* Special value used to verify platform parameters from BL2 to BL3-1 */
 #define RK_BL31_PLAT_PARAM_VAL 0x0f1e2d3c4b5a6978ULL
 
+#define UART0_BASE             0xff110000
+#define UART0_SIZE             SIZE_K(64)
+
+#define UART1_BASE             0xff120000
+#define UART1_SIZE             SIZE_K(64)
+
 #define UART2_BASE             0xff130000
 #define UART2_SIZE             SIZE_K(64)
 
 /**************************************************************************
  * UART related constants
  **************************************************************************/
-#define RK3328_UART2_BASE      UART2_BASE
 #define RK3328_BAUDRATE        1500000
 #define RK3328_UART_CLOCK      24000000
 
index 0c34554187c504a6faf32b467cc89b19e235904a..7d51bb8e822e29ca8d5f6dff401ffa55609a82a1 100644 (file)
@@ -30,7 +30,15 @@ const mmap_region_t plat_rk_mmap[] = {
                        MT_MEMORY | MT_RW | MT_SECURE),
        MAP_REGION_FLAT(PMU_BASE, PMU_SIZE,
                        MT_DEVICE | MT_RW | MT_SECURE),
-       MAP_REGION_FLAT(UART_DBG_BASE, UART_DBG_SIZE,
+       MAP_REGION_FLAT(UART0_BASE, UART0_SIZE,
+                       MT_DEVICE | MT_RW | MT_SECURE),
+       MAP_REGION_FLAT(UART1_BASE, UART1_SIZE,
+                       MT_DEVICE | MT_RW | MT_SECURE),
+       MAP_REGION_FLAT(UART2_BASE, UART2_SIZE,
+                       MT_DEVICE | MT_RW | MT_SECURE),
+       MAP_REGION_FLAT(UART3_BASE, UART3_SIZE,
+                       MT_DEVICE | MT_RW | MT_SECURE),
+       MAP_REGION_FLAT(UART4_BASE, UART4_SIZE,
                        MT_DEVICE | MT_RW | MT_SECURE),
        MAP_REGION_FLAT(CRU_BASE, CRU_SIZE,
                        MT_DEVICE | MT_RW | MT_SECURE),
index 815650fd3a0e450643acb45bd30e9498b2b74237..7b3cc6eba9e43daeeb79a556ece13eeb30614348 100644 (file)
 #define PLAT_RK_GICD_BASE      RK3368_GICD_BASE
 #define PLAT_RK_GICC_BASE      RK3368_GICC_BASE
 
-#define PLAT_RK_UART_BASE      RK3368_UART2_BASE
+#define PLAT_RK_UART_BASE      UART2_BASE
 #define PLAT_RK_UART_CLOCK     RK3368_UART_CLOCK
 #define PLAT_RK_UART_BAUDRATE  RK3368_BAUDRATE
 
index 10ac77b1ed349777004101fab5442a666968a95a..4b0fbabef286a1a3bd436da703970146bee0ab68 100644 (file)
 #define RK_INTMEM_BASE         0xff8c0000
 #define RK_INTMEM_SIZE         0x10000
 
-#define UART_DBG_BASE          0xff690000
-#define UART_DBG_SIZE          0x10000
+#define UART0_BASE             0xff180000
+#define UART0_SIZE             0x10000
+
+#define UART1_BASE             0xff190000
+#define UART1_SIZE             0x10000
+
+#define UART2_BASE             0xff690000
+#define UART2_SIZE             0x10000
+
+#define UART3_BASE             0xff1b0000
+#define UART3_SIZE             0x10000
+
+#define UART4_BASE             0xff1c0000
+#define UART4_SIZE             0x10000
 
 #define CRU_BASE               0xff760000
 
@@ -57,7 +69,6 @@
 /**************************************************************************
  * UART related constants
  **************************************************************************/
-#define RK3368_UART2_BASE      UART_DBG_BASE
 #define RK3368_BAUDRATE                115200
 #define RK3368_UART_CLOCK      24000000